diff options
Diffstat (limited to 'include/llvm/CodeGen/LivePhysRegs.h')
-rw-r--r-- | include/llvm/CodeGen/LivePhysRegs.h | 36 |
1 files changed, 21 insertions, 15 deletions
diff --git a/include/llvm/CodeGen/LivePhysRegs.h b/include/llvm/CodeGen/LivePhysRegs.h index 3bdf5ae8d0132..1cea9d5b90d64 100644 --- a/include/llvm/CodeGen/LivePhysRegs.h +++ b/include/llvm/CodeGen/LivePhysRegs.h @@ -84,12 +84,8 @@ public: void removeReg(unsigned Reg) { assert(TRI && "LivePhysRegs is not initialized."); assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); - for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); - SubRegs.isValid(); ++SubRegs) - LiveRegs.erase(*SubRegs); - for (MCSuperRegIterator SuperRegs(Reg, TRI, /*IncludeSelf=*/false); - SuperRegs.isValid(); ++SuperRegs) - LiveRegs.erase(*SuperRegs); + for (MCRegAliasIterator R(Reg, TRI, true); R.isValid(); ++R) + LiveRegs.erase(*R); } /// \brief Removes physical registers clobbered by the regmask operand @p MO. @@ -97,10 +93,15 @@ public: SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers); /// \brief Returns true if register @p Reg is contained in the set. This also - /// works if only the super register of @p Reg has been defined, because we - /// always add also all sub-registers to the set. + /// works if only the super register of @p Reg has been defined, because + /// addReg() always adds all sub-registers to the set as well. + /// Note: Returns false if just some sub registers are live, use available() + /// when searching a free register. bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } + /// Returns true if register \p Reg and no aliasing register is in the set. + bool available(const MachineRegisterInfo &MRI, unsigned Reg) const; + /// \brief Simulates liveness when stepping backwards over an /// instruction(bundle): Remove Defs, add uses. This is the recommended way of /// calculating liveness. @@ -116,15 +117,20 @@ public: void stepForward(const MachineInstr &MI, SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers); - /// \brief Adds all live-in registers of basic block @p MBB; After prologue/ - /// epilogue insertion \p AddPristines should be set to true to insert the + /// Adds all live-in registers of basic block @p MBB. + /// Live in registers are the registers in the blocks live-in list and the /// pristine registers. - void addLiveIns(const MachineBasicBlock *MBB, bool AddPristines = false); + void addLiveIns(const MachineBasicBlock &MBB); + + /// Adds all live-out registers of basic block @p MBB. + /// Live out registers are the union of the live-in registers of the successor + /// blocks and pristine registers. Live out registers of the end block are the + /// callee saved registers. + void addLiveOuts(const MachineBasicBlock &MBB); - /// \brief Adds all live-out registers of basic block @p MBB; After prologue/ - /// epilogue insertion \p AddPristinesAndCSRs should be set to true. - void addLiveOuts(const MachineBasicBlock *MBB, - bool AddPristinesAndCSRs = false); + /// Like addLiveOuts() but does not add pristine registers/callee saved + /// registers. + void addLiveOutsNoPristines(const MachineBasicBlock &MBB); typedef SparseSet<unsigned>::const_iterator const_iterator; const_iterator begin() const { return LiveRegs.begin(); } |