diff options
Diffstat (limited to 'include/llvm/MC/MCInst.h')
-rw-r--r-- | include/llvm/MC/MCInst.h | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/include/llvm/MC/MCInst.h b/include/llvm/MC/MCInst.h index 25cd5ccb08fd6..2fc5091484039 100644 --- a/include/llvm/MC/MCInst.h +++ b/include/llvm/MC/MCInst.h @@ -28,7 +28,7 @@ class MCInstPrinter; class MCExpr; class MCInst; -/// MCOperand - Instances of this class represent operands of the MCInst class. +/// \brief Instances of this class represent operands of the MCInst class. /// This is a simple discriminated union. class MCOperand { enum MachineOperandType : unsigned char { @@ -59,13 +59,13 @@ public: bool isExpr() const { return Kind == kExpr; } bool isInst() const { return Kind == kInst; } - /// getReg - Returns the register number. + /// \brief Returns the register number. unsigned getReg() const { assert(isReg() && "This is not a register operand!"); return RegVal; } - /// setReg - Set the register number. + /// \brief Set the register number. void setReg(unsigned Reg) { assert(isReg() && "This is not a register operand!"); RegVal = Reg; @@ -108,44 +108,44 @@ public: InstVal = Val; } - static MCOperand CreateReg(unsigned Reg) { + static MCOperand createReg(unsigned Reg) { MCOperand Op; Op.Kind = kRegister; Op.RegVal = Reg; return Op; } - static MCOperand CreateImm(int64_t Val) { + static MCOperand createImm(int64_t Val) { MCOperand Op; Op.Kind = kImmediate; Op.ImmVal = Val; return Op; } - static MCOperand CreateFPImm(double Val) { + static MCOperand createFPImm(double Val) { MCOperand Op; Op.Kind = kFPImmediate; Op.FPImmVal = Val; return Op; } - static MCOperand CreateExpr(const MCExpr *Val) { + static MCOperand createExpr(const MCExpr *Val) { MCOperand Op; Op.Kind = kExpr; Op.ExprVal = Val; return Op; } - static MCOperand CreateInst(const MCInst *Val) { + static MCOperand createInst(const MCInst *Val) { MCOperand Op; Op.Kind = kInst; Op.InstVal = Val; return Op; } - void print(raw_ostream &OS, const MCAsmInfo *MAI) const; + void print(raw_ostream &OS) const; void dump() const; }; template <> struct isPodLike<MCOperand> { static const bool value = true; }; -/// MCInst - Instances of this class represent a single low-level machine +/// \brief Instances of this class represent a single low-level machine /// instruction. class MCInst { unsigned Opcode; @@ -169,7 +169,7 @@ public: } void clear() { Operands.clear(); } - size_t size() { return Operands.size(); } + size_t size() const { return Operands.size(); } typedef SmallVectorImpl<MCOperand>::iterator iterator; typedef SmallVectorImpl<MCOperand>::const_iterator const_iterator; @@ -181,24 +181,23 @@ public: return Operands.insert(I, Op); } - void print(raw_ostream &OS, const MCAsmInfo *MAI) const; + void print(raw_ostream &OS) const; void dump() const; /// \brief Dump the MCInst as prettily as possible using the additional MC /// structures, if given. Operators are separated by the \p Separator /// string. - void dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI = nullptr, - const MCInstPrinter *Printer = nullptr, + void dump_pretty(raw_ostream &OS, const MCInstPrinter *Printer = nullptr, StringRef Separator = " ") const; }; inline raw_ostream& operator<<(raw_ostream &OS, const MCOperand &MO) { - MO.print(OS, nullptr); + MO.print(OS); return OS; } inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) { - MI.print(OS, nullptr); + MI.print(OS); return OS; } |