diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/lldb/Core/ArchSpec.h | 38 | ||||
| -rw-r--r-- | include/lldb/Host/common/NativeRegisterContext.h | 13 | ||||
| -rw-r--r-- | include/lldb/Target/StopInfo.h | 2 |
3 files changed, 51 insertions, 2 deletions
diff --git a/include/lldb/Core/ArchSpec.h b/include/lldb/Core/ArchSpec.h index 0cadd8d8dec60..0b818a0c71236 100644 --- a/include/lldb/Core/ArchSpec.h +++ b/include/lldb/Core/ArchSpec.h @@ -48,7 +48,26 @@ public: eMIPSSubType_mips64r2el, eMIPSSubType_mips64r6el, }; - + + // Masks for the ases word of an ABI flags structure. + enum MIPSASE + { + eMIPSAse_dsp = 0x00000001, // DSP ASE + eMIPSAse_dspr2 = 0x00000002, // DSP R2 ASE + eMIPSAse_eva = 0x00000004, // Enhanced VA Scheme + eMIPSAse_mcu = 0x00000008, // MCU (MicroController) ASE + eMIPSAse_mdmx = 0x00000010, // MDMX ASE + eMIPSAse_mips3d = 0x00000020, // MIPS-3D ASE + eMIPSAse_mt = 0x00000040, // MT ASE + eMIPSAse_smartmips = 0x00000080, // SmartMIPS ASE + eMIPSAse_virt = 0x00000100, // VZ ASE + eMIPSAse_msa = 0x00000200, // MSA ASE + eMIPSAse_mips16 = 0x00000400, // MIPS16 ASE + eMIPSAse_micromips = 0x00000800, // MICROMIPS ASE + eMIPSAse_xpa = 0x00001000, // XPA ASE + eMIPSAse_mask = 0x00001fff + }; + enum Core { eCore_arm_generic, @@ -546,6 +565,18 @@ public: StopInfoOverrideCallbackType GetStopInfoOverrideCallback () const; + uint32_t + GetFlags () const + { + return m_flags; + } + + void + SetFlags (uint32_t flags) + { + m_flags = flags; + } + protected: bool IsEqualTo (const ArchSpec& rhs, bool exact_match) const; @@ -554,6 +585,11 @@ protected: Core m_core; lldb::ByteOrder m_byte_order; + // Additional arch flags which we cannot get from triple and core + // For MIPS these are application specific extensions like + // micromips, mips16 etc. + uint32_t m_flags; + ConstString m_distribution_id; // Called when m_def or m_entry are changed. Fills in all remaining diff --git a/include/lldb/Host/common/NativeRegisterContext.h b/include/lldb/Host/common/NativeRegisterContext.h index 098f148f95d0a..be79bdff1c912 100644 --- a/include/lldb/Host/common/NativeRegisterContext.h +++ b/include/lldb/Host/common/NativeRegisterContext.h @@ -111,6 +111,19 @@ public: virtual lldb::addr_t GetWatchpointAddress (uint32_t wp_index); + // MIPS Linux kernel returns a masked address (last 3bits are masked) + // when a HW watchpoint is hit. However user may not have set a watchpoint + // on this address. This function emulates the instruction at PC and + // finds the base address used in the load/store instruction. This gives the + // exact address used to read/write the variable being watched. + // For example: + // 'n' is at 0x120010d00 and 'm' is 0x120010d04. When a watchpoint is set at 'm', + // then watch exception is generated even when 'n' is read/written. This function + // returns address of 'n' so that client can check whether a watchpoint is set + // on this address or not. + virtual lldb::addr_t + GetWatchpointHitAddress (uint32_t wp_index); + virtual bool HardwareSingleStep (bool enable); diff --git a/include/lldb/Target/StopInfo.h b/include/lldb/Target/StopInfo.h index d09900f7637d5..2553887fa3d97 100644 --- a/include/lldb/Target/StopInfo.h +++ b/include/lldb/Target/StopInfo.h @@ -161,7 +161,7 @@ public: CreateStopReasonWithBreakpointSiteID (Thread &thread, lldb::break_id_t break_id, bool should_stop); static lldb::StopInfoSP - CreateStopReasonWithWatchpointID (Thread &thread, lldb::break_id_t watch_id); + CreateStopReasonWithWatchpointID (Thread &thread, lldb::break_id_t watch_id, lldb::addr_t watch_hit_addr = LLDB_INVALID_ADDRESS); static lldb::StopInfoSP CreateStopReasonWithSignal (Thread &thread, int signo, const char *description = nullptr); |