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-rw-r--r--ld/testsuite/ld-arm/arm-app-abs32.d4
-rw-r--r--ld/testsuite/ld-arm/arm-app-abs32.r2
-rw-r--r--ld/testsuite/ld-arm/arm-app.d6
-rw-r--r--ld/testsuite/ld-arm/arm-app.r2
-rw-r--r--ld/testsuite/ld-arm/arm-call.d58
-rw-r--r--ld/testsuite/ld-arm/arm-call1.s30
-rw-r--r--ld/testsuite/ld-arm/arm-call2.s24
-rw-r--r--ld/testsuite/ld-arm/arm-dyn.ld199
-rw-r--r--ld/testsuite/ld-arm/arm-elf.exp77
-rw-r--r--ld/testsuite/ld-arm/arm-lib-plt32.d2
-rw-r--r--ld/testsuite/ld-arm/arm-lib-plt32.r2
-rw-r--r--ld/testsuite/ld-arm/arm-lib.d2
-rw-r--r--ld/testsuite/ld-arm/arm-lib.ld192
-rw-r--r--ld/testsuite/ld-arm/arm-lib.r2
-rw-r--r--ld/testsuite/ld-arm/arm-rel31.d7
-rw-r--r--ld/testsuite/ld-arm/arm-rel31.s11
-rw-r--r--ld/testsuite/ld-arm/arm-static-app.d2
-rw-r--r--ld/testsuite/ld-arm/arm-static-app.r2
-rw-r--r--ld/testsuite/ld-arm/arm-target1-abs.d7
-rw-r--r--ld/testsuite/ld-arm/arm-target1-rel.d7
-rw-r--r--ld/testsuite/ld-arm/arm-target1.s6
-rw-r--r--ld/testsuite/ld-arm/arm-target2-abs.d7
-rw-r--r--ld/testsuite/ld-arm/arm-target2-got-rel.d9
-rw-r--r--ld/testsuite/ld-arm/arm-target2-rel.d7
-rw-r--r--ld/testsuite/ld-arm/arm-target2.s6
-rw-r--r--ld/testsuite/ld-arm/arm.ld18
-rw-r--r--ld/testsuite/ld-arm/mixed-app-v5.d56
-rw-r--r--ld/testsuite/ld-arm/mixed-app.d57
-rw-r--r--ld/testsuite/ld-arm/mixed-app.r10
-rw-r--r--ld/testsuite/ld-arm/mixed-app.s39
-rw-r--r--ld/testsuite/ld-arm/mixed-app.sym18
-rw-r--r--ld/testsuite/ld-arm/mixed-lib.d38
-rw-r--r--ld/testsuite/ld-arm/mixed-lib.r8
-rw-r--r--ld/testsuite/ld-arm/mixed-lib.s28
-rw-r--r--ld/testsuite/ld-arm/mixed-lib.sym18
-rw-r--r--ld/testsuite/ld-arm/thumb-entry.d3
-rw-r--r--ld/testsuite/ld-arm/thumb-entry.s8
-rw-r--r--ld/testsuite/ld-arm/thumb-rel32.d7
-rw-r--r--ld/testsuite/ld-arm/thumb-rel32.s18
-rw-r--r--ld/testsuite/ld-arm/tls-app.d18
-rw-r--r--ld/testsuite/ld-arm/tls-app.r10
-rw-r--r--ld/testsuite/ld-arm/tls-app.s34
-rw-r--r--ld/testsuite/ld-arm/tls-lib.d15
-rw-r--r--ld/testsuite/ld-arm/tls-lib.r10
-rw-r--r--ld/testsuite/ld-arm/tls-lib.s22
-rw-r--r--ld/testsuite/ld-arm/vxworks1-lib.dd41
-rw-r--r--ld/testsuite/ld-arm/vxworks1-lib.nd9
-rw-r--r--ld/testsuite/ld-arm/vxworks1-lib.rd12
-rw-r--r--ld/testsuite/ld-arm/vxworks1-lib.s36
-rw-r--r--ld/testsuite/ld-arm/vxworks1-static.d4
-rw-r--r--ld/testsuite/ld-arm/vxworks1.dd37
-rw-r--r--ld/testsuite/ld-arm/vxworks1.ld30
-rw-r--r--ld/testsuite/ld-arm/vxworks1.rd19
-rw-r--r--ld/testsuite/ld-arm/vxworks1.s14
-rw-r--r--ld/testsuite/ld-arm/vxworks2-static.sd9
-rw-r--r--ld/testsuite/ld-arm/vxworks2.s5
-rw-r--r--ld/testsuite/ld-arm/vxworks2.sd13
57 files changed, 1323 insertions, 14 deletions
diff --git a/ld/testsuite/ld-arm/arm-app-abs32.d b/ld/testsuite/ld-arm/arm-app-abs32.d
index 4ebff1e838af5..9a4da22b33f78 100644
--- a/ld/testsuite/ld-arm/arm-app-abs32.d
+++ b/ld/testsuite/ld-arm/arm-app-abs32.d
@@ -1,5 +1,5 @@
-tmpdir/arm-app-abs32: file format elf32-littlearm
+tmpdir/arm-app-abs32: file format elf32-(little|big)arm
architecture: arm, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address .*
@@ -8,7 +8,7 @@ Disassembly of section .plt:
.* <.plt>:
.*: e52de004 str lr, \[sp, #-4\]!
- .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.plt\+0x10>
+ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .* .*
diff --git a/ld/testsuite/ld-arm/arm-app-abs32.r b/ld/testsuite/ld-arm/arm-app-abs32.r
index b9e99661ea0c7..08d668c297953 100644
--- a/ld/testsuite/ld-arm/arm-app-abs32.r
+++ b/ld/testsuite/ld-arm/arm-app-abs32.r
@@ -1,5 +1,5 @@
-tmpdir/arm-app-abs32: file format elf32-littlearm
+tmpdir/arm-app-abs32: file format elf32-(little|big)arm
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
diff --git a/ld/testsuite/ld-arm/arm-app.d b/ld/testsuite/ld-arm/arm-app.d
index ae48f53a0a545..207961ea0fa31 100644
--- a/ld/testsuite/ld-arm/arm-app.d
+++ b/ld/testsuite/ld-arm/arm-app.d
@@ -1,5 +1,5 @@
-tmpdir/arm-app: file format elf32-littlearm
+tmpdir/arm-app: file format elf32-(little|big)arm
architecture: arm, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x.*
@@ -8,7 +8,7 @@ Disassembly of section .plt:
.* <.plt>:
.*: e52de004 str lr, \[sp, #-4\]!
- .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.plt\+0x10>
+ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
.*: .*
@@ -27,7 +27,7 @@ Disassembly of section .text:
.* <app_func>:
.*: e1a0c00d mov ip, sp
.*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
- .*: ebfffff4 bl .* <.text-0xc>
+ .*: ebfffff4 bl .* <_start-0xc>
.*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
diff --git a/ld/testsuite/ld-arm/arm-app.r b/ld/testsuite/ld-arm/arm-app.r
index f2433cee2eb2d..a24939281b591 100644
--- a/ld/testsuite/ld-arm/arm-app.r
+++ b/ld/testsuite/ld-arm/arm-app.r
@@ -1,5 +1,5 @@
-tmpdir/arm-app: file format elf32-littlearm
+tmpdir/arm-app: file format elf32-(little|big)arm
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
diff --git a/ld/testsuite/ld-arm/arm-call.d b/ld/testsuite/ld-arm/arm-call.d
new file mode 100644
index 0000000000000..fd4cd1358cc8e
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-call.d
@@ -0,0 +1,58 @@
+
+.*: file format.*
+
+Disassembly of section .text:
+
+00008000 <_start>:
+ 8000: eb00000d bl 803c <arm>
+ 8004: fa00000d blx 8040 <t1>
+ 8008: fb00000c blx 8042 <t2>
+ 800c: fb00000d blx 804a <t5>
+ 8010: fa00000a blx 8040 <t1>
+ 8014: fb000009 blx 8042 <t2>
+ 8018: ea00000f b 805c <__t1_from_arm>
+ 801c: ea000011 b 8068 <__t2_from_arm>
+ 8020: 1b00000d blne 805c <__t1_from_arm>
+ 8024: 1b00000f blne 8068 <__t2_from_arm>
+ 8028: 1b000003 blne 803c <arm>
+ 802c: eb000002 bl 803c <arm>
+ 8030: faffffff blx 8034 <thumblocal>
+
+00008034 <thumblocal>:
+ 8034: 4770 bx lr
+
+00008036 <t3>:
+ 8036: 4770 bx lr
+
+00008038 <t4>:
+ 8038: 4770 bx lr
+ 803a: 46c0 nop \(mov r8, r8\)
+
+0000803c <arm>:
+ 803c: e12fff1e bx lr
+
+00008040 <t1>:
+ 8040: 4770 bx lr
+
+00008042 <t2>:
+ 8042: f7ff fff8 bl 8036 <t3>
+ 8046: f7ff fff7 bl 8038 <t4>
+
+0000804a <t5>:
+ 804a: f000 f801 bl 8050 <local_thumb>
+ 804e: 46c0 nop \(mov r8, r8\)
+
+00008050 <local_thumb>:
+ 8050: f7ff fff1 bl 8036 <t3>
+ 8054: f7ff efd4 blx 8000 <_start>
+ 8058: f7ff efd2 blx 8000 <_start>
+
+0000805c <__t1_from_arm>:
+ 805c: e59fc000 ldr ip, \[pc, #0\] ; 8064 <__t1_from_arm\+0x8>
+ 8060: e12fff1c bx ip
+ 8064: 00008041 andeq r8, r0, r1, asr #32
+
+00008068 <__t2_from_arm>:
+ 8068: e59fc000 ldr ip, \[pc, #0\] ; 8070 <__t2_from_arm\+0x8>
+ 806c: e12fff1c bx ip
+ 8070: 00008043 andeq r8, r0, r3, asr #32
diff --git a/ld/testsuite/ld-arm/arm-call1.s b/ld/testsuite/ld-arm/arm-call1.s
new file mode 100644
index 0000000000000..e6ea1f2ec5c44
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-call1.s
@@ -0,0 +1,30 @@
+# Test R_ARM_CALL and R_ARM_JUMP24 relocations and interworking
+ .text
+ .arch armv5t
+ .global _start
+_start:
+ bl arm
+ bl t1
+ bl t2
+ bl t5
+ blx t1
+ blx t2
+ b t1
+ b t2
+ blne t1
+ blne t2
+ blne arm
+ blx arm
+ blx thumblocal
+ .thumb
+thumblocal:
+ bx lr
+ .global t3
+ .thumb_func
+t3:
+ bx lr
+ .global t4
+ .thumb_func
+t4:
+ bx lr
+ nop
diff --git a/ld/testsuite/ld-arm/arm-call2.s b/ld/testsuite/ld-arm/arm-call2.s
new file mode 100644
index 0000000000000..30ae349572a2e
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-call2.s
@@ -0,0 +1,24 @@
+ .text
+ .arch armv5t
+ .global arm
+ .global t1
+ .global t2
+ .global t5
+arm:
+ bx lr
+ .thumb
+ .thumb_func
+t1:
+ bx lr
+ .thumb_func
+t2:
+ bl t3
+ bl t4
+ .thumb_func
+t5:
+ bl local_thumb
+ nop
+local_thumb:
+ blx t3
+ bl _start
+ blx _start
diff --git a/ld/testsuite/ld-arm/arm-dyn.ld b/ld/testsuite/ld-arm/arm-dyn.ld
new file mode 100644
index 0000000000000..96bc10c0c4c5a
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-dyn.ld
@@ -0,0 +1,199 @@
+/* Script for -z combreloc: combine and sort reloc sections */
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x8000); . = 0x8000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+ .rel.dyn :
+ {
+ *(.rel.init)
+ *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+ *(.rel.fini)
+ *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+ *(.rel.data.rel.ro*)
+ *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+ *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+ *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+ *(.rel.ctors)
+ *(.rel.dtors)
+ *(.rel.got)
+ *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+ }
+ .rela.dyn :
+ {
+ *(.rela.init)
+ *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+ *(.rela.fini)
+ *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+ *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+ *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+ *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+ *(.rela.ctors)
+ *(.rela.dtors)
+ *(.rela.got)
+ *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+ }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init :
+ {
+ KEEP (*(.init))
+ } =0
+ .plt : { *(.plt) }
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.glue_7t) *(.glue_7)
+ } =0
+ .fini :
+ {
+ KEEP (*(.fini))
+ } =0
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
+ .rodata1 : { *(.rodata1) }
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) }
+ __exidx_start = .;
+ .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
+ __exidx_end = .;
+ .eh_frame_hdr : { *(.eh_frame_hdr) }
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }
+ /* Adjust the address for the data segment. We want to adjust up to
+ the same address within the page on the next page up. */
+ . = ALIGN (0x8000) - ((0x8000 - .) & (0x8000 - 1)); . = DATA_SEGMENT_ALIGN (0x8000, 0x1000);
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ . = ALIGN(32 / 8);
+ PROVIDE (__preinit_array_start = .);
+ .preinit_array : { KEEP (*(.preinit_array)) }
+ PROVIDE (__preinit_array_end = .);
+ PROVIDE (__init_array_start = .);
+ .init_array : { KEEP (*(.init_array)) }
+ PROVIDE (__init_array_end = .);
+ PROVIDE (__fini_array_start = .);
+ .fini_array : { KEEP (*(.fini_array)) }
+ PROVIDE (__fini_array_end = .);
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ }
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ }
+ .jcr : { KEEP (*(.jcr)) }
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }
+ .dynamic : { *(.dynamic) }
+ .got : { *(.got.plt) *(.got) }
+ .data :
+ {
+ __data_start = . ;
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ }
+ .data1 : { *(.data1) }
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ __bss_start__ = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(32 / 8);
+ }
+ . = ALIGN(32 / 8);
+ _end = .;
+ _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
+ PROVIDE (end = .);
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack 0x80000 :
+ {
+ _stack = .;
+ *(.stack)
+ }
+ .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
+
+
diff --git a/ld/testsuite/ld-arm/arm-elf.exp b/ld/testsuite/ld-arm/arm-elf.exp
index 2f32a11de3424..1a9fc00aeb8c0 100644
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -13,9 +13,36 @@
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
#
+if {[istarget "arm-*-vxworks"]} {
+ set armvxworkstests {
+ {"VxWorks shared library test 1" "-shared -Tvxworks1.ld"
+ "" {vxworks1-lib.s}
+ {{readelf --relocs vxworks1-lib.rd} {objdump -dr vxworks1-lib.dd}
+ {readelf --symbols vxworks1-lib.nd}}
+ "libvxworks1.so"}
+ {"VxWorks executable test 1 (dynamic)" \
+ "tmpdir/libvxworks1.so -Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks1.s}
+ {{readelf --relocs vxworks1.rd} {objdump -dr vxworks1.dd}}
+ "vxworks1"}
+ {"VxWorks executable test 2 (dynamic)" \
+ "-Tvxworks1.ld -q --force-dynamic"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2.sd}}
+ "vxworks2"}
+ {"VxWorks executable test 2 (static)"
+ "-Tvxworks1.ld"
+ "" {vxworks2.s}
+ {{readelf --segments vxworks2-static.sd}}
+ "vxworks2"}
+ }
+ run_ld_link_tests $armvxworkstests
+ run_dump_test "vxworks1-static"
+}
+
# Exclude non-ARM-ELF targets.
if { ![is_elf_format] || ![istarget "arm*-*-*"] } {
@@ -47,6 +74,54 @@ set armelftests {
{"Non-pcrel function reference" "tmpdir/arm-lib.so" "" {arm-app-abs32.s}
{{objdump -fdw arm-app-abs32.d} {objdump -Rw arm-app-abs32.r}}
"arm-app-abs32"}
+ {"Mixed ARM/Thumb shared library" "-shared -T arm-lib.ld" ""
+ {mixed-lib.s}
+ {{objdump -fdw mixed-lib.d} {objdump -Rw mixed-lib.r}
+ {readelf -Ds mixed-lib.sym}}
+ "mixed-lib.so"}
+ {"Mixed ARM/Thumb dynamic application" "tmpdir/mixed-lib.so -T arm-dyn.ld" ""
+ {mixed-app.s}
+ {{objdump -fdw mixed-app.d} {objdump -Rw mixed-app.r}
+ {readelf -Ds mixed-app.sym}}
+ "mixed-app"}
+ {"Mixed ARM/Thumb arch5 dynamic application" "tmpdir/mixed-lib.so -T arm-dyn.ld --use-blx" ""
+ {mixed-app.s}
+ {{objdump -fdw mixed-app-v5.d} {objdump -Rw mixed-app.r}
+ {readelf -Ds mixed-app.sym}}
+ "mixed-app-v5"}
+ {"target1-abs" "-static --target1-abs -T arm.ld" "" {arm-target1.s}
+ {{objdump -s arm-target1-abs.d}}
+ "arm-target1-abs"}
+ {"target1-rel" "-static --target1-rel -T arm.ld" "" {arm-target1.s}
+ {{objdump -s arm-target1-rel.d}}
+ "arm-target1-rel"}
+ {"target2-rel" "-static --target2=rel -T arm.ld" "" {arm-target2.s}
+ {{objdump -s arm-target2-rel.d}}
+ "arm-target2-rel"}
+ {"target2-abs" "-static --target2=abs -T arm.ld" "" {arm-target2.s}
+ {{objdump -s arm-target2-abs.d}}
+ "arm-target2-abs"}
+ {"target2-got-rel" "-static --target2=got-rel -T arm.ld" "" {arm-target2.s}
+ {{objdump -s arm-target2-got-rel.d}}
+ "arm-target2-got-rel"}
+ {"arm-rel31" "-static -T arm.ld" "" {arm-rel31.s}
+ {{objdump -s arm-rel31.d}}
+ "arm-rel31"}
+ {"arm-call" "-static -T arm.ld" "-meabi=4" {arm-call1.s arm-call2.s}
+ {{objdump -d arm-call.d}}
+ "arm-call"}
+ {"TLS shared library" "-shared -T arm-lib.ld" "" {tls-lib.s}
+ {{objdump -fdw tls-lib.d} {objdump -Rw tls-lib.r}}
+ "tls-lib.so"}
+ {"TLS dynamic application" "-T arm-dyn.ld tmpdir/tls-lib.so" "" {tls-app.s}
+ {{objdump -fdw tls-app.d} {objdump -Rw tls-app.r}}
+ "tls-app"}
+ {"Thumb entry point" "-T arm.ld" "" {thumb-entry.s}
+ {{readelf -h thumb-entry.d}}
+ "thumb-entry"}
+ {"thumb-rel32" "-static -T arm.ld" "" {thumb-rel32.s}
+ {{objdump -s thumb-rel32.d}}
+ "thumb-rel32"}
}
run_ld_link_tests $armelftests
diff --git a/ld/testsuite/ld-arm/arm-lib-plt32.d b/ld/testsuite/ld-arm/arm-lib-plt32.d
index 449b0f9c0f0e5..58206f43796cf 100644
--- a/ld/testsuite/ld-arm/arm-lib-plt32.d
+++ b/ld/testsuite/ld-arm/arm-lib-plt32.d
@@ -1,5 +1,5 @@
-tmpdir/arm-lib-plt32.so: file format elf32-littlearm
+tmpdir/arm-lib-plt32.so: file format elf32-(little|big)arm
architecture: arm, flags 0x00000150:
HAS_SYMS, DYNAMIC, D_PAGED
start address 0x.*
diff --git a/ld/testsuite/ld-arm/arm-lib-plt32.r b/ld/testsuite/ld-arm/arm-lib-plt32.r
index 2212493b1733b..35155397103d7 100644
--- a/ld/testsuite/ld-arm/arm-lib-plt32.r
+++ b/ld/testsuite/ld-arm/arm-lib-plt32.r
@@ -1,5 +1,5 @@
-tmpdir/arm-lib-plt32.so: file format elf32-littlearm
+tmpdir/arm-lib-plt32.so: file format elf32-(little|big)arm
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
diff --git a/ld/testsuite/ld-arm/arm-lib.d b/ld/testsuite/ld-arm/arm-lib.d
index b7be230a41204..e3257c9551496 100644
--- a/ld/testsuite/ld-arm/arm-lib.d
+++ b/ld/testsuite/ld-arm/arm-lib.d
@@ -1,5 +1,5 @@
-tmpdir/arm-lib.so: file format elf32-littlearm
+tmpdir/arm-lib.so: file format elf32-(little|big)arm
architecture: arm, flags 0x00000150:
HAS_SYMS, DYNAMIC, D_PAGED
start address 0x.*
diff --git a/ld/testsuite/ld-arm/arm-lib.ld b/ld/testsuite/ld-arm/arm-lib.ld
new file mode 100644
index 0000000000000..0415d20d8a676
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-lib.ld
@@ -0,0 +1,192 @@
+/* Script for --shared -z combreloc: shared library, combine & sort relocs */
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = 0 + SIZEOF_HEADERS;
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+ .rel.dyn :
+ {
+ *(.rel.init)
+ *(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
+ *(.rel.fini)
+ *(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
+ *(.rel.data.rel.ro*)
+ *(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
+ *(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
+ *(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
+ *(.rel.ctors)
+ *(.rel.dtors)
+ *(.rel.got)
+ *(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
+ }
+ .rela.dyn :
+ {
+ *(.rela.init)
+ *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
+ *(.rela.fini)
+ *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
+ *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
+ *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
+ *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
+ *(.rela.ctors)
+ *(.rela.dtors)
+ *(.rela.got)
+ *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
+ }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init :
+ {
+ KEEP (*(.init))
+ } =0
+ .plt : { *(.plt) }
+ .text :
+ {
+ *(.text .stub .text.* .gnu.linkonce.t.*)
+ KEEP (*(.text.*personality*))
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.glue_7t) *(.glue_7)
+ } =0
+ .fini :
+ {
+ KEEP (*(.fini))
+ } =0
+ PROVIDE (__etext = .);
+ PROVIDE (_etext = .);
+ PROVIDE (etext = .);
+ .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
+ .rodata1 : { *(.rodata1) }
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) }
+ __exidx_start = .;
+ .ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) }
+ __exidx_end = .;
+ .eh_frame_hdr : { *(.eh_frame_hdr) }
+ .eh_frame : ONLY_IF_RO { KEEP (*(.eh_frame)) }
+ .gcc_except_table : ONLY_IF_RO { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }
+ /* Adjust the address for the data segment. We want to adjust up to
+ the same address within the page on the next page up. */
+ . = ALIGN (0x8000) - ((0x8000 - .) & (0x8000 - 1)); . = DATA_SEGMENT_ALIGN (0x8000, 0x1000);
+ /* Exception handling */
+ .eh_frame : ONLY_IF_RW { KEEP (*(.eh_frame)) }
+ .gcc_except_table : ONLY_IF_RW { KEEP (*(.gcc_except_table)) *(.gcc_except_table.*) }
+ /* Thread Local Storage sections */
+ .tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
+ .tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
+ /* Ensure the __preinit_array_start label is properly aligned. We
+ could instead move the label definition inside the section, but
+ the linker would then create the section even if it turns out to
+ be empty, which isn't pretty. */
+ . = ALIGN(32 / 8);
+ .preinit_array : { KEEP (*(.preinit_array)) }
+ .init_array : { KEEP (*(.init_array)) }
+ .fini_array : { KEEP (*(.fini_array)) }
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin*.o(.ctors))
+ /* We don't want to include the .ctor section from
+ from the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ }
+ .dtors :
+ {
+ KEEP (*crtbegin*.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend*.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ }
+ .jcr : { KEEP (*(.jcr)) }
+ .data.rel.ro : { *(.data.rel.ro.local) *(.data.rel.ro*) }
+ .dynamic : { *(.dynamic) }
+ .got : { *(.got.plt) *(.got) }
+ .data :
+ {
+ __data_start = . ;
+ *(.data .data.* .gnu.linkonce.d.*)
+ KEEP (*(.gnu.linkonce.d.*personality*))
+ SORT(CONSTRUCTORS)
+ }
+ .data1 : { *(.data1) }
+ _edata = .;
+ PROVIDE (edata = .);
+ __bss_start = .;
+ __bss_start__ = .;
+ .bss :
+ {
+ *(.dynbss)
+ *(.bss .bss.* .gnu.linkonce.b.*)
+ *(COMMON)
+ /* Align here to ensure that the .bss section occupies space up to
+ _end. Align after .bss to ensure correct alignment even if the
+ .bss section disappears because there are no input sections. */
+ . = ALIGN(32 / 8);
+ }
+ . = ALIGN(32 / 8);
+ _end = .;
+ _bss_end__ = . ; __bss_end__ = . ; __end__ = . ;
+ PROVIDE (end = .);
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ .stack 0x80000 :
+ {
+ _stack = .;
+ *(.stack)
+ }
+ .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+ /DISCARD/ : { *(.note.GNU-stack) }
+}
+
+
diff --git a/ld/testsuite/ld-arm/arm-lib.r b/ld/testsuite/ld-arm/arm-lib.r
index cd1a5b76d5bab..a7dde47457271 100644
--- a/ld/testsuite/ld-arm/arm-lib.r
+++ b/ld/testsuite/ld-arm/arm-lib.r
@@ -1,5 +1,5 @@
-tmpdir/arm-lib.so: file format elf32-littlearm
+tmpdir/arm-lib.so: file format elf32-(little|big)arm
DYNAMIC RELOCATION RECORDS
OFFSET TYPE VALUE
diff --git a/ld/testsuite/ld-arm/arm-rel31.d b/ld/testsuite/ld-arm/arm-rel31.d
new file mode 100644
index 0000000000000..ac99e9252d518
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-rel31.d
@@ -0,0 +1,7 @@
+
+.*: file format.*
+
+Contents of section .text:
+ 8000 (10000000 fcffff7f 08000080 f4ffffff|00000010 7ffffffc 80000008 fffffff4) .*
+# Ignore .ARM.attributes section
+#...
diff --git a/ld/testsuite/ld-arm/arm-rel31.s b/ld/testsuite/ld-arm/arm-rel31.s
new file mode 100644
index 0000000000000..37eee66c0de81
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-rel31.s
@@ -0,0 +1,11 @@
+# Test the R_ARM_REL31 relocation
+ .section .before
+ .global _start
+_start:
+ .text
+ .rel31 0, foo
+ .rel31 0, _start
+ .rel31 1, foo
+ .rel31 1, _start
+ .section .after
+foo:
diff --git a/ld/testsuite/ld-arm/arm-static-app.d b/ld/testsuite/ld-arm/arm-static-app.d
index 2d39b55c2e839..9a3309d6136b2 100644
--- a/ld/testsuite/ld-arm/arm-static-app.d
+++ b/ld/testsuite/ld-arm/arm-static-app.d
@@ -1,5 +1,5 @@
-tmpdir/arm-static-app: file format elf32-littlearm
+tmpdir/arm-static-app: file format elf32-(little|big)arm
architecture: arm, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x.*
diff --git a/ld/testsuite/ld-arm/arm-static-app.r b/ld/testsuite/ld-arm/arm-static-app.r
index 7c350dcb97e96..6034b7f8d8517 100644
--- a/ld/testsuite/ld-arm/arm-static-app.r
+++ b/ld/testsuite/ld-arm/arm-static-app.r
@@ -1,3 +1,3 @@
-tmpdir/arm-static-app: file format elf32-littlearm
+tmpdir/arm-static-app: file format elf32-(little|big)arm
diff --git a/ld/testsuite/ld-arm/arm-target1-abs.d b/ld/testsuite/ld-arm/arm-target1-abs.d
new file mode 100644
index 0000000000000..af64e60a2f677
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-target1-abs.d
@@ -0,0 +1,7 @@
+
+.*: file format.*
+
+Contents of section .text:
+ 8000 (04800000|00008004) .*
+# Ignore .ARM.attributes section
+#...
diff --git a/ld/testsuite/ld-arm/arm-target1-rel.d b/ld/testsuite/ld-arm/arm-target1-rel.d
new file mode 100644
index 0000000000000..fcd6c1a36723e
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-target1-rel.d
@@ -0,0 +1,7 @@
+
+.*: file format .*
+
+Contents of section .text:
+ 8000 (04000000|00000004) .*
+# Ignore .ARM.attributes section
+#...
diff --git a/ld/testsuite/ld-arm/arm-target1.s b/ld/testsuite/ld-arm/arm-target1.s
new file mode 100644
index 0000000000000..5a7ba91459bba
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-target1.s
@@ -0,0 +1,6 @@
+# Test the R_ARM_TARGET1 relocation
+ .text
+ .global _start
+_start:
+ .word foo(target1)
+foo:
diff --git a/ld/testsuite/ld-arm/arm-target2-abs.d b/ld/testsuite/ld-arm/arm-target2-abs.d
new file mode 100644
index 0000000000000..af64e60a2f677
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-target2-abs.d
@@ -0,0 +1,7 @@
+
+.*: file format.*
+
+Contents of section .text:
+ 8000 (04800000|00008004) .*
+# Ignore .ARM.attributes section
+#...
diff --git a/ld/testsuite/ld-arm/arm-target2-got-rel.d b/ld/testsuite/ld-arm/arm-target2-got-rel.d
new file mode 100644
index 0000000000000..1a996f0c202c3
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-target2-got-rel.d
@@ -0,0 +1,9 @@
+
+.*: file format.*
+
+Contents of section .text:
+ 8000 (00100000|00001000) .*
+Contents of section .got:
+ 9000 (04800000|00008004) .*
+# Ignore .ARM.attributes section
+#...
diff --git a/ld/testsuite/ld-arm/arm-target2-rel.d b/ld/testsuite/ld-arm/arm-target2-rel.d
new file mode 100644
index 0000000000000..569d6b595b111
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-target2-rel.d
@@ -0,0 +1,7 @@
+
+.*: file format.*
+
+Contents of section .text:
+ 8000 (04000000|00000004) .*
+# Ignore .ARM.attributes section
+#...
diff --git a/ld/testsuite/ld-arm/arm-target2.s b/ld/testsuite/ld-arm/arm-target2.s
new file mode 100644
index 0000000000000..0c343ef6e878e
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm-target2.s
@@ -0,0 +1,6 @@
+# Test the R_ARM_TARGET2 relocation
+ .text
+ .global _start
+_start:
+ .word foo(target2)
+foo:
diff --git a/ld/testsuite/ld-arm/arm.ld b/ld/testsuite/ld-arm/arm.ld
new file mode 100644
index 0000000000000..4ef7d824ec223
--- /dev/null
+++ b/ld/testsuite/ld-arm/arm.ld
@@ -0,0 +1,18 @@
+/* Script for ld testsuite */
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ PROVIDE (__executable_start = 0x8000); . = 0x8000;
+ .text :
+ {
+ *(.before)
+ *(.text)
+ *(.after)
+ *(.glue_7)
+ } =0
+ . = 0x9000;
+ .got : { *(.got) *(.got.plt)}
+ .ARM.attribues 0 : { *(.ARM.atttributes) }
+}
diff --git a/ld/testsuite/ld-arm/mixed-app-v5.d b/ld/testsuite/ld-arm/mixed-app-v5.d
new file mode 100644
index 0000000000000..9e8d4dd194bf5
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-app-v5.d
@@ -0,0 +1,56 @@
+
+tmpdir/mixed-app-v5: file format elf32-(little|big)arm
+architecture: arm, flags 0x00000112:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x.*
+
+Disassembly of section .plt:
+
+.* <.plt>:
+ .*: e52de004 str lr, \[sp, #-4\]!
+ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x20>
+ .*: e08fe00e add lr, pc, lr
+ .*: e5bef008 ldr pc, \[lr, #8\]!
+ .*: .*
+ .*: e28fc6.* add ip, pc, #.* ; 0x.*
+ .*: e28cca.* add ip, ip, #.* ; 0x.*
+ .*: e5bcf.* ldr pc, \[ip, #.*\]!
+ .*: e28fc6.* add ip, pc, #.* ; 0x.*
+ .*: e28cca.* add ip, ip, #.* ; 0x.*
+ .*: e5bcf.* ldr pc, \[ip, #.*\]!
+Disassembly of section .text:
+
+.* <_start>:
+ .*: e1a0c00d mov ip, sp
+ .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
+ .*: eb000004 bl .* <app_func>
+ .*: e89d6800 ldmia sp, {fp, sp, lr}
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+
+.* <app_func>:
+ .*: e1a0c00d mov ip, sp
+ .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
+ .*: ebfffff. bl .*
+ .*: e89d6800 ldmia sp, {fp, sp, lr}
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+
+.* <app_func2>:
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+
+.* <app_tfunc>:
+ .*: b500 push {lr}
+ .*: f7ff efc. blx .* <_start-0x..>
+ .*: bd00 pop {pc}
+ .*: 4770 bx lr
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
diff --git a/ld/testsuite/ld-arm/mixed-app.d b/ld/testsuite/ld-arm/mixed-app.d
new file mode 100644
index 0000000000000..381222727e692
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-app.d
@@ -0,0 +1,57 @@
+
+tmpdir/mixed-app: file format elf32-(little|big)arm
+architecture: arm, flags 0x00000112:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x.*
+
+Disassembly of section .plt:
+
+.* <.plt>:
+ .*: e52de004 str lr, \[sp, #-4\]!
+ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <_start-0x20>
+ .*: e08fe00e add lr, pc, lr
+ .*: e5bef008 ldr pc, \[lr, #8\]!
+ .*: .*
+ .*: (46c04778 undefined|477846c0 ldrmib r4, \[r8, -r0, asr #13\]!)
+ .*: e28fc6.* add ip, pc, #.* ; 0x.*
+ .*: e28cca.* add ip, ip, #.* ; 0x.*
+ .*: e5bcf.* ldr pc, \[ip, #.*\]!
+ .*: e28fc6.* add ip, pc, #.* ; 0x.*
+ .*: e28cca.* add ip, ip, #.* ; 0x.*
+ .*: e5bcf.* ldr pc, \[ip, #.*\]!
+Disassembly of section .text:
+
+.* <_start>:
+ .*: e1a0c00d mov ip, sp
+ .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
+ .*: eb000004 bl .* <app_func>
+ .*: e89d6800 ldmia sp, {fp, sp, lr}
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+
+.* <app_func>:
+ .*: e1a0c00d mov ip, sp
+ .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
+ .*: ebfffff. bl .*
+ .*: e89d6800 ldmia sp, {fp, sp, lr}
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+
+.* <app_func2>:
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+
+.* <app_tfunc>:
+ .*: b500 push {lr}
+ .*: f7ff ffc. bl .* <_start-0x..>
+ .*: bd00 pop {pc}
+ .*: 4770 bx lr
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
diff --git a/ld/testsuite/ld-arm/mixed-app.r b/ld/testsuite/ld-arm/mixed-app.r
new file mode 100644
index 0000000000000..648e92f771b3d
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-app.r
@@ -0,0 +1,10 @@
+
+tmpdir/mixed-app.*: file format elf32-(little|big)arm
+
+DYNAMIC RELOCATION RECORDS
+OFFSET TYPE VALUE
+.* R_ARM_COPY data_obj
+.* R_ARM_JUMP_SLOT lib_func2
+.* R_ARM_JUMP_SLOT lib_func1
+
+
diff --git a/ld/testsuite/ld-arm/mixed-app.s b/ld/testsuite/ld-arm/mixed-app.s
new file mode 100644
index 0000000000000..ce82487b76683
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-app.s
@@ -0,0 +1,39 @@
+ .text
+ .p2align 4
+ .globl _start
+_start:
+ mov ip, sp
+ stmdb sp!, {r11, ip, lr, pc}
+ bl app_func
+ ldmia sp, {r11, sp, lr}
+ bx lr
+
+ .p2align 4
+ .globl app_func
+ .type app_func,%function
+app_func:
+ mov ip, sp
+ stmdb sp!, {r11, ip, lr, pc}
+ bl lib_func1
+ ldmia sp, {r11, sp, lr}
+ bx lr
+
+ .p2align 4
+ .globl app_func2
+ .type app_func2,%function
+app_func2:
+ bx lr
+
+ .p2align 4
+ .globl app_tfunc
+ .type app_tfunc,%function
+ .thumb_func
+ .code 16
+app_tfunc:
+ push {lr}
+ bl lib_func2
+ pop {pc}
+ bx lr
+
+ .data
+ .long data_obj
diff --git a/ld/testsuite/ld-arm/mixed-app.sym b/ld/testsuite/ld-arm/mixed-app.sym
new file mode 100644
index 0000000000000..49c5edf1c5b1d
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-app.sym
@@ -0,0 +1,18 @@
+
+Symbol table for image:
+ Num Buc: Value Size Type Bind Vis Ndx Name
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end
+ .. ..: ........ 4 OBJECT GLOBAL DEFAULT 12 data_obj
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__
+ .. ..: 0*[^0]*.* 20 FUNC GLOBAL DEFAULT UND lib_func1
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 11 __data_start
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _stack
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ .. ..: .......0 0 FUNC GLOBAL DEFAULT 8 app_func2
+ .. ..: 0*[^0]*.* 2 FUNC GLOBAL DEFAULT UND lib_func2
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end
diff --git a/ld/testsuite/ld-arm/mixed-lib.d b/ld/testsuite/ld-arm/mixed-lib.d
new file mode 100644
index 0000000000000..b261c67fae283
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-lib.d
@@ -0,0 +1,38 @@
+
+tmpdir/mixed-lib.so: file format elf32-(little|big)arm
+architecture: arm, flags 0x00000150:
+HAS_SYMS, DYNAMIC, D_PAGED
+start address 0x.*
+
+Disassembly of section .plt:
+
+.* <.plt>:
+ .*: e52de004 str lr, \[sp, #-4\]!
+ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <lib_func1-0x1.>
+ .*: e08fe00e add lr, pc, lr
+ .*: e5bef008 ldr pc, \[lr, #8\]!
+ .*: .*
+ .*: e28fc6.* add ip, pc, #.* ; 0x.*
+ .*: e28cca.* add ip, ip, #.* ; 0x.*
+ .*: e5bcf.* ldr pc, \[ip, #.*\]!
+Disassembly of section .text:
+
+.* <lib_func1>:
+ .*: e1a0c00d mov ip, sp
+ .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
+ .*: ebfffff. bl .* <lib_func1-0x..>
+ .*: e89d6800 ldmia sp, {fp, sp, lr}
+ .*: e12fff1e bx lr
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+
+.* <lib_func2>:
+ .*: 4770 bx lr
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
+ .*: 46c0 nop \(mov r8, r8\)
diff --git a/ld/testsuite/ld-arm/mixed-lib.r b/ld/testsuite/ld-arm/mixed-lib.r
new file mode 100644
index 0000000000000..013788009750b
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-lib.r
@@ -0,0 +1,8 @@
+
+tmpdir/mixed-lib.so: file format elf32-(little|big)arm
+
+DYNAMIC RELOCATION RECORDS
+OFFSET TYPE VALUE
+.* R_ARM_JUMP_SLOT app_func2
+
+
diff --git a/ld/testsuite/ld-arm/mixed-lib.s b/ld/testsuite/ld-arm/mixed-lib.s
new file mode 100644
index 0000000000000..86f5aced13000
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-lib.s
@@ -0,0 +1,28 @@
+ .text
+
+ .p2align 4
+ .globl lib_func1
+ .type lib_func1, %function
+lib_func1:
+ mov ip, sp
+ stmdb sp!, {r11, ip, lr, pc}
+ bl app_func2
+ ldmia sp, {r11, sp, lr}
+ bx lr
+ .size lib_func1, . - lib_func1
+
+ .p2align 4
+ .globl lib_func2
+ .type lib_func2, %function
+ .thumb_func
+ .code 16
+lib_func2:
+ bx lr
+ .size lib_func2, . - lib_func2
+
+ .data
+ .globl data_obj
+ .type data_obj, %object
+data_obj:
+ .long 0
+ .size data_obj, . - data_obj
diff --git a/ld/testsuite/ld-arm/mixed-lib.sym b/ld/testsuite/ld-arm/mixed-lib.sym
new file mode 100644
index 0000000000000..4ccccdb35aff6
--- /dev/null
+++ b/ld/testsuite/ld-arm/mixed-lib.sym
@@ -0,0 +1,18 @@
+
+Symbol table for image:
+ Num Buc: Value Size Type Bind Vis Ndx Name
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _edata
+ .. ..: .......0 20 FUNC GLOBAL DEFAULT 6 lib_func1
+ .. ..: .......1 2 FUNC GLOBAL DEFAULT 6 lib_func2
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _bss_end__
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_end__
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _stack
+ .. ..: ........ 4 OBJECT GLOBAL DEFAULT 9 data_obj
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start__
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __bss_start
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS _end
+ .. ..: 00000000 0 NOTYPE GLOBAL DEFAULT UND app_func2
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_end
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT 9 __data_start
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __end__
+ .. ..: ........ 0 NOTYPE GLOBAL DEFAULT ABS __exidx_start
diff --git a/ld/testsuite/ld-arm/thumb-entry.d b/ld/testsuite/ld-arm/thumb-entry.d
new file mode 100644
index 0000000000000..602fd6cfb70c4
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-entry.d
@@ -0,0 +1,3 @@
+#...
+ Entry point address: 0x8001
+#...
diff --git a/ld/testsuite/ld-arm/thumb-entry.s b/ld/testsuite/ld-arm/thumb-entry.s
new file mode 100644
index 0000000000000..5b3659d9c0e25
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-entry.s
@@ -0,0 +1,8 @@
+ .text
+ .arch armv4t
+ .thumb
+ .global _start
+ .thumb_func
+_start:
+ bx lr
+
diff --git a/ld/testsuite/ld-arm/thumb-rel32.d b/ld/testsuite/ld-arm/thumb-rel32.d
new file mode 100644
index 0000000000000..34cde4d729e96
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-rel32.d
@@ -0,0 +1,7 @@
+
+.*: file format.*
+
+Contents of section .text:
+ 8000 (00000011 fffffffd 00ffffff f8000000|11000000 fdffffff 00f8ffff ff000000) .*
+# Ignore .ARM.attributes section
+#...
diff --git a/ld/testsuite/ld-arm/thumb-rel32.s b/ld/testsuite/ld-arm/thumb-rel32.s
new file mode 100644
index 0000000000000..83eb0e527d355
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb-rel32.s
@@ -0,0 +1,18 @@
+ .text
+ .arch armv4t
+ .global _start
+ .type _start, %function
+ .thumb_func
+_start:
+ .word bar - .
+ .word _start - .
+ .byte 0
+ .4byte (_start - .) + 1
+ .byte 0, 0, 0
+ .section .after, "ax", %progbits
+ .global bar
+ .type bar, %function
+ .thumb_func
+bar:
+ .word 0
+ .ident "GCC: (GNU) 4.1.0 (CodeSourcery ARM)"
diff --git a/ld/testsuite/ld-arm/tls-app.d b/ld/testsuite/ld-arm/tls-app.d
new file mode 100644
index 0000000000000..67e5de4dca5e5
--- /dev/null
+++ b/ld/testsuite/ld-arm/tls-app.d
@@ -0,0 +1,18 @@
+
+.*: file format elf32-.*arm
+architecture: arm, flags 0x00000112:
+EXEC_P, HAS_SYMS, D_PAGED
+start address 0x00008220
+
+Disassembly of section .text:
+
+00008220 <foo>:
+ 8220: e1a00000 nop \(mov r0,r0\)
+ 8224: e1a00000 nop \(mov r0,r0\)
+ 8228: e1a0f00e mov pc, lr
+ 822c: 000080bc streqh r8, \[r0\], -ip
+ 8230: 000080b4 streqh r8, \[r0\], -r4
+ 8234: 000080ac andeq r8, r0, ip, lsr #1
+ 8238: 00000004 andeq r0, r0, r4
+ 823c: 000080c4 andeq r8, r0, r4, asr #1
+ 8240: 00000014 andeq r0, r0, r4, lsl r0
diff --git a/ld/testsuite/ld-arm/tls-app.r b/ld/testsuite/ld-arm/tls-app.r
new file mode 100644
index 0000000000000..af6c2d7ac41eb
--- /dev/null
+++ b/ld/testsuite/ld-arm/tls-app.r
@@ -0,0 +1,10 @@
+
+.*: file format elf32-.*arm
+
+DYNAMIC RELOCATION RECORDS
+OFFSET TYPE VALUE
+[0-9a-f]+ R_ARM_TLS_DTPMOD32 app_gd
+[0-9a-f]+ R_ARM_TLS_DTPOFF32 app_gd
+[0-9a-f]+ R_ARM_TLS_DTPMOD32 lib_gd
+[0-9a-f]+ R_ARM_TLS_DTPOFF32 lib_gd
+[0-9a-f]+ R_ARM_TLS_TPOFF32 app_ie
diff --git a/ld/testsuite/ld-arm/tls-app.s b/ld/testsuite/ld-arm/tls-app.s
new file mode 100644
index 0000000000000..d505295f09de4
--- /dev/null
+++ b/ld/testsuite/ld-arm/tls-app.s
@@ -0,0 +1,34 @@
+ .text
+ .globl foo
+ .type foo, %function
+foo:
+ nop
+.L2:
+ nop
+ mov pc, lr
+
+.Lpool:
+ .word lib_gd(tlsgd) + (. - .L2 - 8)
+ .word app_gd(tlsgd) + (. - .L2 - 8)
+ .word app_ld(tlsldm) + (. - .L2 - 8)
+ .word app_ld(tlsldo)
+ .word app_ie(gottpoff) + (. - .L2 - 8)
+ .word app_le(tpoff)
+
+ .section .tdata,"awT"
+ .global app_gd
+app_gd:
+ .space 4
+
+ .global app_ld
+app_ld:
+ .space 4
+
+ .section .tbss,"awT",%nobits
+ .global app_ie
+app_ie:
+ .space 4
+
+ .global app_le
+app_le:
+ .space 4
diff --git a/ld/testsuite/ld-arm/tls-lib.d b/ld/testsuite/ld-arm/tls-lib.d
new file mode 100644
index 0000000000000..76dcfd0c94680
--- /dev/null
+++ b/ld/testsuite/ld-arm/tls-lib.d
@@ -0,0 +1,15 @@
+
+.*: file format elf32-.*arm
+architecture: arm, flags 0x00000150:
+HAS_SYMS, DYNAMIC, D_PAGED
+start address 0x.*
+
+Disassembly of section .text:
+
+.* <foo>:
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a00000 nop \(mov r0,r0\)
+ .*: e1a0f00e mov pc, lr
+ .*: 00008098 muleq r0, r8, r0
+ .*: 0000808c andeq r8, r0, ip, lsl #1
+ .*: 00000004 andeq r0, r0, r4
diff --git a/ld/testsuite/ld-arm/tls-lib.r b/ld/testsuite/ld-arm/tls-lib.r
new file mode 100644
index 0000000000000..279b80540e803
--- /dev/null
+++ b/ld/testsuite/ld-arm/tls-lib.r
@@ -0,0 +1,10 @@
+
+.*: file format elf32-.*arm
+
+DYNAMIC RELOCATION RECORDS
+OFFSET TYPE VALUE
+.* R_ARM_TLS_DTPMOD32 \*ABS\*
+.* R_ARM_TLS_DTPMOD32 lib_gd
+.* R_ARM_TLS_DTPOFF32 lib_gd
+
+
diff --git a/ld/testsuite/ld-arm/tls-lib.s b/ld/testsuite/ld-arm/tls-lib.s
new file mode 100644
index 0000000000000..fa928c087e843
--- /dev/null
+++ b/ld/testsuite/ld-arm/tls-lib.s
@@ -0,0 +1,22 @@
+ .text
+ .globl foo
+ .type foo, %function
+foo:
+ nop
+.L2:
+ nop
+ mov pc, lr
+
+.Lpool:
+ .word lib_gd(tlsgd) + (. - .L2 - 8)
+ .word lib_ld(tlsldm) + (. - .L2 - 8)
+ .word lib_ld(tlsldo)
+
+ .section .tdata,"awT"
+ .global lib_gd
+lib_gd:
+ .space 4
+
+ .global lib_ld
+lib_ld:
+ .space 4
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.dd b/ld/testsuite/ld-arm/vxworks1-lib.dd
new file mode 100644
index 0000000000000..e13254d908eea
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.dd
@@ -0,0 +1,41 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: e59fc000 ldr ip, \[pc, #0\] ; 80808 <_PROCEDURE_LINKAGE_TABLE_\+0x8>
+ 80804: e79cf009 ldr pc, \[ip, r9\]
+ 80808: 0000000c andeq r0, r0, ip
+ 8080c: e59fc000 ldr ip, \[pc, #0\] ; 80814 <_PROCEDURE_LINKAGE_TABLE_\+0x14>
+ 80810: e599f008 ldr pc, \[r9, #8\]
+ 80814: 00000000 andeq r0, r0, r0
+ 80818: e59fc000 ldr ip, \[pc, #0\] ; 80820 <_PROCEDURE_LINKAGE_TABLE_\+0x20>
+ 8081c: e79cf009 ldr pc, \[ip, r9\]
+ 80820: 00000010 andeq r0, r0, r0, lsl r0
+ 80824: e59fc000 ldr ip, \[pc, #0\] ; 8082c <_PROCEDURE_LINKAGE_TABLE_\+0x2c>
+ 80828: e599f008 ldr pc, \[r9, #8\]
+ 8082c: 0000000c andeq r0, r0, ip
+Disassembly of section \.text:
+
+00080c00 <foo>:
+ 80c00: e92dc200 stmdb sp!, {r9, lr, pc}
+ 80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <\.text\+0x30>
+ 80c08: e5999000 ldr r9, \[r9\]
+ 80c0c: e5999000 ldr r9, \[r9\]
+ 80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <\.text\+0x34>
+ 80c14: e7991000 ldr r1, \[r9, r0\]
+ 80c18: e2811001 add r1, r1, #1 ; 0x1
+ 80c1c: e7891000 str r1, \[r9, r0\]
+ 80c20: eb000004 bl 80c38 <slocal>
+ 80c24: ebfffefb bl 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
+ 80c28: ebfffef4 bl 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80c2c: e8bd8200 ldmia sp!, {r9, pc}
+ 80c30: 00000000 andeq r0, r0, r0
+ 80c34: 00000014 andeq r0, r0, r4, lsl r0
+
+00080c38 <slocal>:
+ 80c38: e1a0f00e mov pc, lr
+
+00080c3c <sglobal>:
+ 80c3c: e1a0f00e mov pc, lr
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.nd b/ld/testsuite/ld-arm/vxworks1-lib.nd
new file mode 100644
index 0000000000000..edf3db3994059
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.nd
@@ -0,0 +1,9 @@
+#...
+Symbol table '\.dynsym' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#...
+Symbol table '\.symtab' .*:
+#...
+.*: 00081400 * 0 * OBJECT * GLOBAL * DEFAULT * [0-9]+ _GLOBAL_OFFSET_TABLE_
+#pass
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.rd b/ld/testsuite/ld-arm/vxworks1-lib.rd
new file mode 100644
index 0000000000000..c4c46f69098fd
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.rd
@@ -0,0 +1,12 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0008140c .*16 R_ARM_JUMP_SLOT 00000000 sexternal \+ 0
+00081410 .*16 R_ARM_JUMP_SLOT 00080c3c sglobal \+ 0
+
+Relocation section '\.rela\.dyn' at offset .* contains 4 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+00081c00 00000017 R_ARM_RELATIVE * 00080c38
+00080c0c .*06 R_ARM_ABS12 00000000 __GOTT_INDEX__ \+ 0
+00080c30 .*02 R_ARM_ABS32 00000000 __GOTT_BASE__ \+ 0
+00081414 .*15 R_ARM_GLOB_DAT 00081800 x \+ 0
diff --git a/ld/testsuite/ld-arm/vxworks1-lib.s b/ld/testsuite/ld-arm/vxworks1-lib.s
new file mode 100644
index 0000000000000..66dfd1e80e1ff
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-lib.s
@@ -0,0 +1,36 @@
+ .text
+ .globl foo
+ .type foo, %function
+foo:
+ stmfd sp!, {r9, lr, pc}
+ ldr r9, 1f
+ ldr r9, [r9]
+ ldr r9, [r9, #__GOTT_INDEX__]
+ ldr r0, 1f + 4
+ ldr r1, [r9, r0]
+ add r1, r1, #1
+ str r1, [r9, r0]
+ bl slocal(PLT)
+ bl sglobal(PLT)
+ bl sexternal(PLT)
+ ldmfd sp!, {r9, pc}
+1:
+ .word __GOTT_BASE__
+ .word x(got)
+ .size foo, .-foo
+
+ .type slocal, %function
+slocal:
+ mov pc,lr
+ .size slocal, .-slocal
+
+ .globl sglobal
+ .type sglobal, %function
+sglobal:
+ mov pc,lr
+ .size sglobal, .-sglobal
+
+ .data
+ .4byte slocal
+
+ .comm x,4,4
diff --git a/ld/testsuite/ld-arm/vxworks1-static.d b/ld/testsuite/ld-arm/vxworks1-static.d
new file mode 100644
index 0000000000000..88c0baf1bbb5c
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1-static.d
@@ -0,0 +1,4 @@
+#name: VxWorks executable test 1 (static)
+#source: vxworks1.s
+#ld: tmpdir/libvxworks1.so -Tvxworks1.ld
+#error: Dynamic sections created in non-dynamic link
diff --git a/ld/testsuite/ld-arm/vxworks1.dd b/ld/testsuite/ld-arm/vxworks1.dd
new file mode 100644
index 0000000000000..529e3a564079d
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.dd
@@ -0,0 +1,37 @@
+
+.*: file format .*
+
+Disassembly of section \.plt:
+
+00080800 <_PROCEDURE_LINKAGE_TABLE_>:
+ 80800: e52dc008 str ip, \[sp, #-8\]!
+ 80804: e59fc000 ldr ip, \[pc, #0\] ; 8080c <_PROCEDURE_LINKAGE_TABLE_\+0xc>
+ 80808: e59cf008 ldr pc, \[ip, #8\]
+ 8080c: 00081400 andeq r1, r8, r0, lsl #8
+ 8080c: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_
+ 80810: e59fc000 ldr ip, \[pc, #0\] ; 80818 <_PROCEDURE_LINKAGE_TABLE_\+0x18>
+ 80814: e59cf000 ldr pc, \[ip\]
+ 80818: 0008140c andeq r1, r8, ip, lsl #8
+ 80818: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0xc
+ 8081c: e59fc000 ldr ip, \[pc, #0\] ; 80824 <_PROCEDURE_LINKAGE_TABLE_\+0x24>
+ 80820: eafffff6 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 80824: 00000000 andeq r0, r0, r0
+ 80828: e59fc000 ldr ip, \[pc, #0\] ; 80830 <_PROCEDURE_LINKAGE_TABLE_\+0x30>
+ 8082c: e59cf000 ldr pc, \[ip\]
+ 80830: 00081410 andeq r1, r8, r0, lsl r4
+ 80830: R_ARM_ABS32 _GLOBAL_OFFSET_TABLE_\+0x10
+ 80834: e59fc000 ldr ip, \[pc, #0\] ; 8083c <_PROCEDURE_LINKAGE_TABLE_\+0x3c>
+ 80838: eafffff0 b 80800 <_PROCEDURE_LINKAGE_TABLE_>
+ 8083c: 0000000c andeq r0, r0, ip
+Disassembly of section \.text:
+
+00080c00 <_start>:
+ 80c00: ebffff08 bl 80428 <_PROCEDURE_LINKAGE_TABLE_-0x3d8>
+ 80c00: R_ARM_PC24 \.plt\+0x20
+ 80c04: eb000000 bl 80c14 <sexternal\+0x8>
+ 80c04: R_ARM_PC24 sexternal\+0xfffffff8
+ 80c08: eaffff00 b 80408 <_PROCEDURE_LINKAGE_TABLE_-0x3f8>
+ 80c08: R_ARM_PC24 \.plt\+0x8
+
+00080c0c <sexternal>:
+ 80c0c: e1a0f00e mov pc, lr
diff --git a/ld/testsuite/ld-arm/vxworks1.ld b/ld/testsuite/ld-arm/vxworks1.ld
new file mode 100644
index 0000000000000..ec5039d47ed30
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.ld
@@ -0,0 +1,30 @@
+SECTIONS
+{
+ . = 0x80000;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+
+ . = ALIGN (0x400);
+ .rela.dyn : { *(.rela.dyn) }
+ .rela.plt : { *(.rela.plt) }
+
+ . = ALIGN (0x400);
+ .plt : { *(.plt) }
+
+ . = ALIGN (0x400);
+ .text : { *(.text) }
+
+ . = ALIGN (0x1000);
+ .dynamic : { *(.dynamic) }
+
+ . = ALIGN (0x400);
+ .got : { *(.got.plt) *(.got) }
+
+ . = ALIGN (0x400);
+ .bss : { *(.bss) *(.dynbss) }
+
+ . = ALIGN (0x400);
+ .data : { *(.data) }
+}
diff --git a/ld/testsuite/ld-arm/vxworks1.rd b/ld/testsuite/ld-arm/vxworks1.rd
new file mode 100644
index 0000000000000..8d7d5cb1a3a72
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.rd
@@ -0,0 +1,19 @@
+
+Relocation section '\.rela\.plt' at offset .* contains 2 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0008140c .*16 R_ARM_JUMP_SLOT 00080810 sglobal \+ 0
+00081410 .*16 R_ARM_JUMP_SLOT 00080828 foo \+ 0
+
+Relocation section '\.rela\.text' at offset .* contains 3 entries:
+ Offset Info Type Sym.Value Sym. Name \+ Addend
+00080c00 .*01 R_ARM_PC24 00080800 \.plt \+ 20
+00080c04 .*01 R_ARM_PC24 00080c0c sexternal \+ fffffff8
+00080c08 .*01 R_ARM_PC24 00080800 \.plt \+ 8
+
+Relocation section '\.rela\.plt\.unloaded' at offset .* contains 5 entries:
+ Offset Info Type Sym\.Value Sym\. Name \+ Addend
+0008080c .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 0
+00080818 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ c
+0008140c .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0
+00080830 .*02 R_ARM_ABS32 00081400 _GLOBAL_OFFSET_TABLE_ \+ 10
+00081410 .*02 R_ARM_ABS32 00080800 _PROCEDURE_LINKAGE_TAB.* \+ 0
diff --git a/ld/testsuite/ld-arm/vxworks1.s b/ld/testsuite/ld-arm/vxworks1.s
new file mode 100644
index 0000000000000..0139a1199e874
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks1.s
@@ -0,0 +1,14 @@
+ .text
+ .globl _start
+ .type _start, %function
+_start:
+ bl foo
+ bl sexternal
+ b sglobal
+ .size _start, .-_start
+
+ .globl sexternal
+ .type sexternal, %function
+sexternal:
+ mov pc, lr
+ .size sexternal, .-sexternal
diff --git a/ld/testsuite/ld-arm/vxworks2-static.sd b/ld/testsuite/ld-arm/vxworks2-static.sd
new file mode 100644
index 0000000000000..912755bc472d1
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks2-static.sd
@@ -0,0 +1,9 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80000
+#...
+Program Headers:
+ Type .*
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+
+#...
diff --git a/ld/testsuite/ld-arm/vxworks2.s b/ld/testsuite/ld-arm/vxworks2.s
new file mode 100644
index 0000000000000..1bd207bf04d14
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks2.s
@@ -0,0 +1,5 @@
+ .globl _start
+ .type _start, %function
+_start:
+ mov pc, lr
+ .end _start
diff --git a/ld/testsuite/ld-arm/vxworks2.sd b/ld/testsuite/ld-arm/vxworks2.sd
new file mode 100644
index 0000000000000..5ff87d3bef81d
--- /dev/null
+++ b/ld/testsuite/ld-arm/vxworks2.sd
@@ -0,0 +1,13 @@
+#...
+Elf file type is EXEC \(Executable file\)
+Entry point 0x80400
+#...
+Program Headers:
+ Type .*
+ PHDR .*
+#...
+ LOAD .* 0x00080000 0x00080000 .* R E 0x1000
+ LOAD .* 0x00081000 0x00081000 .* RW 0x1000
+ DYNAMIC .*
+
+#...