diff options
Diffstat (limited to 'lib/Headers/mmintrin.h')
-rw-r--r-- | lib/Headers/mmintrin.h | 160 |
1 files changed, 81 insertions, 79 deletions
diff --git a/lib/Headers/mmintrin.h b/lib/Headers/mmintrin.h index 4b38d51713d86..a73539942a92e 100644 --- a/lib/Headers/mmintrin.h +++ b/lib/Headers/mmintrin.h @@ -32,27 +32,27 @@ typedef short __v4hi __attribute__((__vector_size__(8))); typedef char __v8qi __attribute__((__vector_size__(8))); /* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mmx"))) +#define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mmx"), __min_vector_width__(64))) -/// \brief Clears the MMX state by setting the state of the x87 stack registers +/// Clears the MMX state by setting the state of the x87 stack registers /// to empty. /// /// \headerfile <x86intrin.h> /// /// This intrinsic corresponds to the <c> EMMS </c> instruction. /// -static __inline__ void __DEFAULT_FN_ATTRS +static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("mmx"))) _mm_empty(void) { __builtin_ia32_emms(); } -/// \brief Constructs a 64-bit integer vector, setting the lower 32 bits to the +/// Constructs a 64-bit integer vector, setting the lower 32 bits to the /// value of the 32-bit integer parameter and setting the upper 32 bits to 0. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction. +/// This intrinsic corresponds to the <c> MOVD </c> instruction. /// /// \param __i /// A 32-bit integer value. @@ -64,12 +64,12 @@ _mm_cvtsi32_si64(int __i) return (__m64)__builtin_ia32_vec_init_v2si(__i, 0); } -/// \brief Returns the lower 32 bits of a 64-bit integer vector as a 32-bit +/// Returns the lower 32 bits of a 64-bit integer vector as a 32-bit /// signed integer. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction. +/// This intrinsic corresponds to the <c> MOVD </c> instruction. /// /// \param __m /// A 64-bit integer vector. @@ -81,11 +81,11 @@ _mm_cvtsi64_si32(__m64 __m) return __builtin_ia32_vec_ext_v2si((__v2si)__m, 0); } -/// \brief Casts a 64-bit signed integer value into a 64-bit integer vector. +/// Casts a 64-bit signed integer value into a 64-bit integer vector. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction. +/// This intrinsic corresponds to the <c> MOVQ </c> instruction. /// /// \param __i /// A 64-bit signed integer. @@ -97,11 +97,11 @@ _mm_cvtsi64_m64(long long __i) return (__m64)__i; } -/// \brief Casts a 64-bit integer vector into a 64-bit signed integer value. +/// Casts a 64-bit integer vector into a 64-bit signed integer value. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction. +/// This intrinsic corresponds to the <c> MOVQ </c> instruction. /// /// \param __m /// A 64-bit integer vector. @@ -113,7 +113,7 @@ _mm_cvtm64_si64(__m64 __m) return (long long)__m; } -/// \brief Converts 16-bit signed integers from both 64-bit integer vector +/// Converts 16-bit signed integers from both 64-bit integer vector /// parameters of [4 x i16] into 8-bit signed integer values, and constructs /// a 64-bit integer vector of [8 x i8] as the result. Positive values /// greater than 0x7F are saturated to 0x7F. Negative values less than 0x80 @@ -143,7 +143,7 @@ _mm_packs_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_packsswb((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Converts 32-bit signed integers from both 64-bit integer vector +/// Converts 32-bit signed integers from both 64-bit integer vector /// parameters of [2 x i32] into 16-bit signed integer values, and constructs /// a 64-bit integer vector of [4 x i16] as the result. Positive values /// greater than 0x7FFF are saturated to 0x7FFF. Negative values less than @@ -173,7 +173,7 @@ _mm_packs_pi32(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_packssdw((__v2si)__m1, (__v2si)__m2); } -/// \brief Converts 16-bit signed integers from both 64-bit integer vector +/// Converts 16-bit signed integers from both 64-bit integer vector /// parameters of [4 x i16] into 8-bit unsigned integer values, and /// constructs a 64-bit integer vector of [8 x i8] as the result. Values /// greater than 0xFF are saturated to 0xFF. Values less than 0 are saturated @@ -203,7 +203,7 @@ _mm_packs_pu16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_packuswb((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8] +/// Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8] /// and interleaves them into a 64-bit integer vector of [8 x i8]. /// /// \headerfile <x86intrin.h> @@ -230,7 +230,7 @@ _mm_unpackhi_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_punpckhbw((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Unpacks the upper 32 bits from two 64-bit integer vectors of +/// Unpacks the upper 32 bits from two 64-bit integer vectors of /// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16]. /// /// \headerfile <x86intrin.h> @@ -253,7 +253,7 @@ _mm_unpackhi_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_punpckhwd((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Unpacks the upper 32 bits from two 64-bit integer vectors of +/// Unpacks the upper 32 bits from two 64-bit integer vectors of /// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32]. /// /// \headerfile <x86intrin.h> @@ -274,7 +274,7 @@ _mm_unpackhi_pi32(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_punpckhdq((__v2si)__m1, (__v2si)__m2); } -/// \brief Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8] +/// Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8] /// and interleaves them into a 64-bit integer vector of [8 x i8]. /// /// \headerfile <x86intrin.h> @@ -301,7 +301,7 @@ _mm_unpacklo_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_punpcklbw((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Unpacks the lower 32 bits from two 64-bit integer vectors of +/// Unpacks the lower 32 bits from two 64-bit integer vectors of /// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16]. /// /// \headerfile <x86intrin.h> @@ -324,7 +324,7 @@ _mm_unpacklo_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_punpcklwd((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Unpacks the lower 32 bits from two 64-bit integer vectors of +/// Unpacks the lower 32 bits from two 64-bit integer vectors of /// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32]. /// /// \headerfile <x86intrin.h> @@ -345,7 +345,7 @@ _mm_unpacklo_pi32(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_punpckldq((__v2si)__m1, (__v2si)__m2); } -/// \brief Adds each 8-bit integer element of the first 64-bit integer vector +/// Adds each 8-bit integer element of the first 64-bit integer vector /// of [8 x i8] to the corresponding 8-bit integer element of the second /// 64-bit integer vector of [8 x i8]. The lower 8 bits of the results are /// packed into a 64-bit integer vector of [8 x i8]. @@ -366,7 +366,7 @@ _mm_add_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_paddb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Adds each 16-bit integer element of the first 64-bit integer vector +/// Adds each 16-bit integer element of the first 64-bit integer vector /// of [4 x i16] to the corresponding 16-bit integer element of the second /// 64-bit integer vector of [4 x i16]. The lower 16 bits of the results are /// packed into a 64-bit integer vector of [4 x i16]. @@ -387,7 +387,7 @@ _mm_add_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_paddw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Adds each 32-bit integer element of the first 64-bit integer vector +/// Adds each 32-bit integer element of the first 64-bit integer vector /// of [2 x i32] to the corresponding 32-bit integer element of the second /// 64-bit integer vector of [2 x i32]. The lower 32 bits of the results are /// packed into a 64-bit integer vector of [2 x i32]. @@ -408,7 +408,7 @@ _mm_add_pi32(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_paddd((__v2si)__m1, (__v2si)__m2); } -/// \brief Adds each 8-bit signed integer element of the first 64-bit integer +/// Adds each 8-bit signed integer element of the first 64-bit integer /// vector of [8 x i8] to the corresponding 8-bit signed integer element of /// the second 64-bit integer vector of [8 x i8]. Positive sums greater than /// 0x7F are saturated to 0x7F. Negative sums less than 0x80 are saturated to @@ -430,7 +430,7 @@ _mm_adds_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_paddsb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Adds each 16-bit signed integer element of the first 64-bit integer +/// Adds each 16-bit signed integer element of the first 64-bit integer /// vector of [4 x i16] to the corresponding 16-bit signed integer element of /// the second 64-bit integer vector of [4 x i16]. Positive sums greater than /// 0x7FFF are saturated to 0x7FFF. Negative sums less than 0x8000 are @@ -453,7 +453,7 @@ _mm_adds_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_paddsw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Adds each 8-bit unsigned integer element of the first 64-bit integer +/// Adds each 8-bit unsigned integer element of the first 64-bit integer /// vector of [8 x i8] to the corresponding 8-bit unsigned integer element of /// the second 64-bit integer vector of [8 x i8]. Sums greater than 0xFF are /// saturated to 0xFF. The results are packed into a 64-bit integer vector of @@ -475,7 +475,7 @@ _mm_adds_pu8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_paddusb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Adds each 16-bit unsigned integer element of the first 64-bit integer +/// Adds each 16-bit unsigned integer element of the first 64-bit integer /// vector of [4 x i16] to the corresponding 16-bit unsigned integer element /// of the second 64-bit integer vector of [4 x i16]. Sums greater than /// 0xFFFF are saturated to 0xFFFF. The results are packed into a 64-bit @@ -497,7 +497,7 @@ _mm_adds_pu16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_paddusw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Subtracts each 8-bit integer element of the second 64-bit integer +/// Subtracts each 8-bit integer element of the second 64-bit integer /// vector of [8 x i8] from the corresponding 8-bit integer element of the /// first 64-bit integer vector of [8 x i8]. The lower 8 bits of the results /// are packed into a 64-bit integer vector of [8 x i8]. @@ -518,7 +518,7 @@ _mm_sub_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_psubb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Subtracts each 16-bit integer element of the second 64-bit integer +/// Subtracts each 16-bit integer element of the second 64-bit integer /// vector of [4 x i16] from the corresponding 16-bit integer element of the /// first 64-bit integer vector of [4 x i16]. The lower 16 bits of the /// results are packed into a 64-bit integer vector of [4 x i16]. @@ -539,7 +539,7 @@ _mm_sub_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_psubw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Subtracts each 32-bit integer element of the second 64-bit integer +/// Subtracts each 32-bit integer element of the second 64-bit integer /// vector of [2 x i32] from the corresponding 32-bit integer element of the /// first 64-bit integer vector of [2 x i32]. The lower 32 bits of the /// results are packed into a 64-bit integer vector of [2 x i32]. @@ -560,7 +560,7 @@ _mm_sub_pi32(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_psubd((__v2si)__m1, (__v2si)__m2); } -/// \brief Subtracts each 8-bit signed integer element of the second 64-bit +/// Subtracts each 8-bit signed integer element of the second 64-bit /// integer vector of [8 x i8] from the corresponding 8-bit signed integer /// element of the first 64-bit integer vector of [8 x i8]. Positive results /// greater than 0x7F are saturated to 0x7F. Negative results less than 0x80 @@ -583,7 +583,7 @@ _mm_subs_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_psubsb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Subtracts each 16-bit signed integer element of the second 64-bit +/// Subtracts each 16-bit signed integer element of the second 64-bit /// integer vector of [4 x i16] from the corresponding 16-bit signed integer /// element of the first 64-bit integer vector of [4 x i16]. Positive results /// greater than 0x7FFF are saturated to 0x7FFF. Negative results less than @@ -606,7 +606,7 @@ _mm_subs_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_psubsw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Subtracts each 8-bit unsigned integer element of the second 64-bit +/// Subtracts each 8-bit unsigned integer element of the second 64-bit /// integer vector of [8 x i8] from the corresponding 8-bit unsigned integer /// element of the first 64-bit integer vector of [8 x i8]. /// @@ -630,7 +630,7 @@ _mm_subs_pu8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_psubusb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Subtracts each 16-bit unsigned integer element of the second 64-bit +/// Subtracts each 16-bit unsigned integer element of the second 64-bit /// integer vector of [4 x i16] from the corresponding 16-bit unsigned /// integer element of the first 64-bit integer vector of [4 x i16]. /// @@ -654,7 +654,7 @@ _mm_subs_pu16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_psubusw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Multiplies each 16-bit signed integer element of the first 64-bit +/// Multiplies each 16-bit signed integer element of the first 64-bit /// integer vector of [4 x i16] by the corresponding 16-bit signed integer /// element of the second 64-bit integer vector of [4 x i16] and get four /// 32-bit products. Adds adjacent pairs of products to get two 32-bit sums. @@ -681,7 +681,7 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pmaddwd((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Multiplies each 16-bit signed integer element of the first 64-bit +/// Multiplies each 16-bit signed integer element of the first 64-bit /// integer vector of [4 x i16] by the corresponding 16-bit signed integer /// element of the second 64-bit integer vector of [4 x i16]. Packs the upper /// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16]. @@ -702,7 +702,7 @@ _mm_mulhi_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pmulhw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Multiplies each 16-bit signed integer element of the first 64-bit +/// Multiplies each 16-bit signed integer element of the first 64-bit /// integer vector of [4 x i16] by the corresponding 16-bit signed integer /// element of the second 64-bit integer vector of [4 x i16]. Packs the lower /// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16]. @@ -723,7 +723,7 @@ _mm_mullo_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pmullw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Left-shifts each 16-bit signed integer element of the first +/// Left-shifts each 16-bit signed integer element of the first /// parameter, which is a 64-bit integer vector of [4 x i16], by the number /// of bits specified by the second parameter, which is a 64-bit integer. The /// lower 16 bits of the results are packed into a 64-bit integer vector of @@ -746,7 +746,7 @@ _mm_sll_pi16(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_psllw((__v4hi)__m, __count); } -/// \brief Left-shifts each 16-bit signed integer element of a 64-bit integer +/// Left-shifts each 16-bit signed integer element of a 64-bit integer /// vector of [4 x i16] by the number of bits specified by a 32-bit integer. /// The lower 16 bits of the results are packed into a 64-bit integer vector /// of [4 x i16]. @@ -768,7 +768,7 @@ _mm_slli_pi16(__m64 __m, int __count) return (__m64)__builtin_ia32_psllwi((__v4hi)__m, __count); } -/// \brief Left-shifts each 32-bit signed integer element of the first +/// Left-shifts each 32-bit signed integer element of the first /// parameter, which is a 64-bit integer vector of [2 x i32], by the number /// of bits specified by the second parameter, which is a 64-bit integer. The /// lower 32 bits of the results are packed into a 64-bit integer vector of @@ -791,7 +791,7 @@ _mm_sll_pi32(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_pslld((__v2si)__m, __count); } -/// \brief Left-shifts each 32-bit signed integer element of a 64-bit integer +/// Left-shifts each 32-bit signed integer element of a 64-bit integer /// vector of [2 x i32] by the number of bits specified by a 32-bit integer. /// The lower 32 bits of the results are packed into a 64-bit integer vector /// of [2 x i32]. @@ -813,7 +813,7 @@ _mm_slli_pi32(__m64 __m, int __count) return (__m64)__builtin_ia32_pslldi((__v2si)__m, __count); } -/// \brief Left-shifts the first 64-bit integer parameter by the number of bits +/// Left-shifts the first 64-bit integer parameter by the number of bits /// specified by the second 64-bit integer parameter. The lower 64 bits of /// result are returned. /// @@ -833,7 +833,7 @@ _mm_sll_si64(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_psllq((__v1di)__m, __count); } -/// \brief Left-shifts the first parameter, which is a 64-bit integer, by the +/// Left-shifts the first parameter, which is a 64-bit integer, by the /// number of bits specified by the second parameter, which is a 32-bit /// integer. The lower 64 bits of result are returned. /// @@ -853,7 +853,7 @@ _mm_slli_si64(__m64 __m, int __count) return (__m64)__builtin_ia32_psllqi((__v1di)__m, __count); } -/// \brief Right-shifts each 16-bit integer element of the first parameter, +/// Right-shifts each 16-bit integer element of the first parameter, /// which is a 64-bit integer vector of [4 x i16], by the number of bits /// specified by the second parameter, which is a 64-bit integer. /// @@ -877,7 +877,7 @@ _mm_sra_pi16(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_psraw((__v4hi)__m, __count); } -/// \brief Right-shifts each 16-bit integer element of a 64-bit integer vector +/// Right-shifts each 16-bit integer element of a 64-bit integer vector /// of [4 x i16] by the number of bits specified by a 32-bit integer. /// /// High-order bits are filled with the sign bit of the initial value of each @@ -900,7 +900,7 @@ _mm_srai_pi16(__m64 __m, int __count) return (__m64)__builtin_ia32_psrawi((__v4hi)__m, __count); } -/// \brief Right-shifts each 32-bit integer element of the first parameter, +/// Right-shifts each 32-bit integer element of the first parameter, /// which is a 64-bit integer vector of [2 x i32], by the number of bits /// specified by the second parameter, which is a 64-bit integer. /// @@ -924,7 +924,7 @@ _mm_sra_pi32(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_psrad((__v2si)__m, __count); } -/// \brief Right-shifts each 32-bit integer element of a 64-bit integer vector +/// Right-shifts each 32-bit integer element of a 64-bit integer vector /// of [2 x i32] by the number of bits specified by a 32-bit integer. /// /// High-order bits are filled with the sign bit of the initial value of each @@ -947,7 +947,7 @@ _mm_srai_pi32(__m64 __m, int __count) return (__m64)__builtin_ia32_psradi((__v2si)__m, __count); } -/// \brief Right-shifts each 16-bit integer element of the first parameter, +/// Right-shifts each 16-bit integer element of the first parameter, /// which is a 64-bit integer vector of [4 x i16], by the number of bits /// specified by the second parameter, which is a 64-bit integer. /// @@ -970,7 +970,7 @@ _mm_srl_pi16(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_psrlw((__v4hi)__m, __count); } -/// \brief Right-shifts each 16-bit integer element of a 64-bit integer vector +/// Right-shifts each 16-bit integer element of a 64-bit integer vector /// of [4 x i16] by the number of bits specified by a 32-bit integer. /// /// High-order bits are cleared. The 16-bit results are packed into a 64-bit @@ -992,7 +992,7 @@ _mm_srli_pi16(__m64 __m, int __count) return (__m64)__builtin_ia32_psrlwi((__v4hi)__m, __count); } -/// \brief Right-shifts each 32-bit integer element of the first parameter, +/// Right-shifts each 32-bit integer element of the first parameter, /// which is a 64-bit integer vector of [2 x i32], by the number of bits /// specified by the second parameter, which is a 64-bit integer. /// @@ -1015,7 +1015,7 @@ _mm_srl_pi32(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_psrld((__v2si)__m, __count); } -/// \brief Right-shifts each 32-bit integer element of a 64-bit integer vector +/// Right-shifts each 32-bit integer element of a 64-bit integer vector /// of [2 x i32] by the number of bits specified by a 32-bit integer. /// /// High-order bits are cleared. The 32-bit results are packed into a 64-bit @@ -1037,7 +1037,7 @@ _mm_srli_pi32(__m64 __m, int __count) return (__m64)__builtin_ia32_psrldi((__v2si)__m, __count); } -/// \brief Right-shifts the first 64-bit integer parameter by the number of bits +/// Right-shifts the first 64-bit integer parameter by the number of bits /// specified by the second 64-bit integer parameter. /// /// High-order bits are cleared. @@ -1057,7 +1057,7 @@ _mm_srl_si64(__m64 __m, __m64 __count) return (__m64)__builtin_ia32_psrlq((__v1di)__m, __count); } -/// \brief Right-shifts the first parameter, which is a 64-bit integer, by the +/// Right-shifts the first parameter, which is a 64-bit integer, by the /// number of bits specified by the second parameter, which is a 32-bit /// integer. /// @@ -1078,7 +1078,7 @@ _mm_srli_si64(__m64 __m, int __count) return (__m64)__builtin_ia32_psrlqi((__v1di)__m, __count); } -/// \brief Performs a bitwise AND of two 64-bit integer vectors. +/// Performs a bitwise AND of two 64-bit integer vectors. /// /// \headerfile <x86intrin.h> /// @@ -1096,7 +1096,7 @@ _mm_and_si64(__m64 __m1, __m64 __m2) return __builtin_ia32_pand((__v1di)__m1, (__v1di)__m2); } -/// \brief Performs a bitwise NOT of the first 64-bit integer vector, and then +/// Performs a bitwise NOT of the first 64-bit integer vector, and then /// performs a bitwise AND of the intermediate result and the second 64-bit /// integer vector. /// @@ -1117,7 +1117,7 @@ _mm_andnot_si64(__m64 __m1, __m64 __m2) return __builtin_ia32_pandn((__v1di)__m1, (__v1di)__m2); } -/// \brief Performs a bitwise OR of two 64-bit integer vectors. +/// Performs a bitwise OR of two 64-bit integer vectors. /// /// \headerfile <x86intrin.h> /// @@ -1135,7 +1135,7 @@ _mm_or_si64(__m64 __m1, __m64 __m2) return __builtin_ia32_por((__v1di)__m1, (__v1di)__m2); } -/// \brief Performs a bitwise exclusive OR of two 64-bit integer vectors. +/// Performs a bitwise exclusive OR of two 64-bit integer vectors. /// /// \headerfile <x86intrin.h> /// @@ -1153,7 +1153,7 @@ _mm_xor_si64(__m64 __m1, __m64 __m2) return __builtin_ia32_pxor((__v1di)__m1, (__v1di)__m2); } -/// \brief Compares the 8-bit integer elements of two 64-bit integer vectors of +/// Compares the 8-bit integer elements of two 64-bit integer vectors of /// [8 x i8] to determine if the element of the first vector is equal to the /// corresponding element of the second vector. /// @@ -1175,7 +1175,7 @@ _mm_cmpeq_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pcmpeqb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Compares the 16-bit integer elements of two 64-bit integer vectors of +/// Compares the 16-bit integer elements of two 64-bit integer vectors of /// [4 x i16] to determine if the element of the first vector is equal to the /// corresponding element of the second vector. /// @@ -1197,7 +1197,7 @@ _mm_cmpeq_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pcmpeqw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Compares the 32-bit integer elements of two 64-bit integer vectors of +/// Compares the 32-bit integer elements of two 64-bit integer vectors of /// [2 x i32] to determine if the element of the first vector is equal to the /// corresponding element of the second vector. /// @@ -1219,7 +1219,7 @@ _mm_cmpeq_pi32(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pcmpeqd((__v2si)__m1, (__v2si)__m2); } -/// \brief Compares the 8-bit integer elements of two 64-bit integer vectors of +/// Compares the 8-bit integer elements of two 64-bit integer vectors of /// [8 x i8] to determine if the element of the first vector is greater than /// the corresponding element of the second vector. /// @@ -1241,7 +1241,7 @@ _mm_cmpgt_pi8(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pcmpgtb((__v8qi)__m1, (__v8qi)__m2); } -/// \brief Compares the 16-bit integer elements of two 64-bit integer vectors of +/// Compares the 16-bit integer elements of two 64-bit integer vectors of /// [4 x i16] to determine if the element of the first vector is greater than /// the corresponding element of the second vector. /// @@ -1263,7 +1263,7 @@ _mm_cmpgt_pi16(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pcmpgtw((__v4hi)__m1, (__v4hi)__m2); } -/// \brief Compares the 32-bit integer elements of two 64-bit integer vectors of +/// Compares the 32-bit integer elements of two 64-bit integer vectors of /// [2 x i32] to determine if the element of the first vector is greater than /// the corresponding element of the second vector. /// @@ -1285,20 +1285,20 @@ _mm_cmpgt_pi32(__m64 __m1, __m64 __m2) return (__m64)__builtin_ia32_pcmpgtd((__v2si)__m1, (__v2si)__m2); } -/// \brief Constructs a 64-bit integer vector initialized to zero. +/// Constructs a 64-bit integer vector initialized to zero. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction. +/// This intrinsic corresponds to the <c> PXOR </c> instruction. /// /// \returns An initialized 64-bit integer vector with all elements set to zero. static __inline__ __m64 __DEFAULT_FN_ATTRS _mm_setzero_si64(void) { - return (__m64){ 0LL }; + return __extension__ (__m64){ 0LL }; } -/// \brief Constructs a 64-bit integer vector initialized with the specified +/// Constructs a 64-bit integer vector initialized with the specified /// 32-bit integer values. /// /// \headerfile <x86intrin.h> @@ -1319,7 +1319,7 @@ _mm_set_pi32(int __i1, int __i0) return (__m64)__builtin_ia32_vec_init_v2si(__i0, __i1); } -/// \brief Constructs a 64-bit integer vector initialized with the specified +/// Constructs a 64-bit integer vector initialized with the specified /// 16-bit integer values. /// /// \headerfile <x86intrin.h> @@ -1342,7 +1342,7 @@ _mm_set_pi16(short __s3, short __s2, short __s1, short __s0) return (__m64)__builtin_ia32_vec_init_v4hi(__s0, __s1, __s2, __s3); } -/// \brief Constructs a 64-bit integer vector initialized with the specified +/// Constructs a 64-bit integer vector initialized with the specified /// 8-bit integer values. /// /// \headerfile <x86intrin.h> @@ -1375,13 +1375,14 @@ _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, __b4, __b5, __b6, __b7); } -/// \brief Constructs a 64-bit integer vector of [2 x i32], with each of the +/// Constructs a 64-bit integer vector of [2 x i32], with each of the /// 32-bit integer vector elements set to the specified 32-bit integer /// value. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction. +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. /// /// \param __i /// A 32-bit integer value used to initialize each vector element of the @@ -1393,13 +1394,14 @@ _mm_set1_pi32(int __i) return _mm_set_pi32(__i, __i); } -/// \brief Constructs a 64-bit integer vector of [4 x i16], with each of the +/// Constructs a 64-bit integer vector of [4 x i16], with each of the /// 16-bit integer vector elements set to the specified 16-bit integer /// value. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction. +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. /// /// \param __w /// A 16-bit integer value used to initialize each vector element of the @@ -1411,13 +1413,13 @@ _mm_set1_pi16(short __w) return _mm_set_pi16(__w, __w, __w, __w); } -/// \brief Constructs a 64-bit integer vector of [8 x i8], with each of the +/// Constructs a 64-bit integer vector of [8 x i8], with each of the /// 8-bit integer vector elements set to the specified 8-bit integer value. /// /// \headerfile <x86intrin.h> /// -/// This intrinsic corresponds to the <c> VPUNPCKLBW + VPSHUFLW / PUNPCKLBW + -/// PSHUFLW </c> instruction. +/// This intrinsic is a utility function and does not correspond to a specific +/// instruction. /// /// \param __b /// An 8-bit integer value used to initialize each vector element of the @@ -1429,7 +1431,7 @@ _mm_set1_pi8(char __b) return _mm_set_pi8(__b, __b, __b, __b, __b, __b, __b, __b); } -/// \brief Constructs a 64-bit integer vector, initialized in reverse order with +/// Constructs a 64-bit integer vector, initialized in reverse order with /// the specified 32-bit integer values. /// /// \headerfile <x86intrin.h> @@ -1450,7 +1452,7 @@ _mm_setr_pi32(int __i0, int __i1) return _mm_set_pi32(__i1, __i0); } -/// \brief Constructs a 64-bit integer vector, initialized in reverse order with +/// Constructs a 64-bit integer vector, initialized in reverse order with /// the specified 16-bit integer values. /// /// \headerfile <x86intrin.h> @@ -1473,7 +1475,7 @@ _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3) return _mm_set_pi16(__w3, __w2, __w1, __w0); } -/// \brief Constructs a 64-bit integer vector, initialized in reverse order with +/// Constructs a 64-bit integer vector, initialized in reverse order with /// the specified 8-bit integer values. /// /// \headerfile <x86intrin.h> |