diff options
Diffstat (limited to 'lib/Target/ARM/ARMMachineFunctionInfo.h')
-rw-r--r-- | lib/Target/ARM/ARMMachineFunctionInfo.h | 69 |
1 files changed, 30 insertions, 39 deletions
diff --git a/lib/Target/ARM/ARMMachineFunctionInfo.h b/lib/Target/ARM/ARMMachineFunctionInfo.h index 8c485e89bf547..8161167729954 100644 --- a/lib/Target/ARM/ARMMachineFunctionInfo.h +++ b/lib/Target/ARM/ARMMachineFunctionInfo.h @@ -14,11 +14,11 @@ #ifndef LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H #define LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H -#include "ARMSubtarget.h" #include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/SmallPtrSet.h" #include "llvm/CodeGen/MachineFunction.h" -#include "llvm/Target/TargetMachine.h" -#include "llvm/Target/TargetRegisterInfo.h" +#include "llvm/Support/ErrorHandling.h" +#include <utility> namespace llvm { @@ -29,42 +29,42 @@ class ARMFunctionInfo : public MachineFunctionInfo { /// isThumb - True if this function is compiled under Thumb mode. /// Used to initialized Align, so must precede it. - bool isThumb; + bool isThumb = false; /// hasThumb2 - True if the target architecture supports Thumb2. Do not use /// to determine if function is compiled under Thumb mode, for that use /// 'isThumb'. - bool hasThumb2; + bool hasThumb2 = false; /// StByValParamsPadding - For parameter that is split between /// GPRs and memory; while recovering GPRs part, when /// StackAlignment > 4, and GPRs-part-size mod StackAlignment != 0, /// we need to insert gap before parameter start address. It allows to /// "attach" GPR-part to the part that was passed via stack. - unsigned StByValParamsPadding; + unsigned StByValParamsPadding = 0; /// VarArgsRegSaveSize - Size of the register save area for vararg functions. /// - unsigned ArgRegsSaveSize; + unsigned ArgRegsSaveSize = 0; /// ReturnRegsCount - Number of registers used up in the return. - unsigned ReturnRegsCount; + unsigned ReturnRegsCount = 0; /// HasStackFrame - True if this function has a stack frame. Set by /// determineCalleeSaves(). - bool HasStackFrame; + bool HasStackFrame = false; /// RestoreSPFromFP - True if epilogue should restore SP from FP. Set by /// emitPrologue. - bool RestoreSPFromFP; + bool RestoreSPFromFP = false; /// LRSpilledForFarJump - True if the LR register has been for spilled to /// enable far jump. - bool LRSpilledForFarJump; + bool LRSpilledForFarJump = false; /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer /// spill stack offset. - unsigned FramePtrSpillOffset; + unsigned FramePtrSpillOffset = 0; /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved /// register spills areas. For Mac OS X: @@ -77,16 +77,16 @@ class ARMFunctionInfo : public MachineFunctionInfo { /// /// Also see AlignedDPRCSRegs below. Not all D-regs need to go in area 3. /// Some may be spilled after the stack has been realigned. - unsigned GPRCS1Offset; - unsigned GPRCS2Offset; - unsigned DPRCSOffset; + unsigned GPRCS1Offset = 0; + unsigned GPRCS2Offset = 0; + unsigned DPRCSOffset = 0; /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills /// areas. - unsigned GPRCS1Size; - unsigned GPRCS2Size; - unsigned DPRCSAlignGapSize; - unsigned DPRCSSize; + unsigned GPRCS1Size = 0; + unsigned GPRCS2Size = 0; + unsigned DPRCSAlignGapSize = 0; + unsigned DPRCSSize = 0; /// NumAlignedDPRCS2Regs - The number of callee-saved DPRs that are saved in /// the aligned portion of the stack frame. This is always a contiguous @@ -95,15 +95,15 @@ class ARMFunctionInfo : public MachineFunctionInfo { /// We do not keep track of the frame indices used for these registers - they /// behave like any other frame index in the aligned stack frame. These /// registers also aren't included in DPRCSSize above. - unsigned NumAlignedDPRCS2Regs; + unsigned NumAlignedDPRCS2Regs = 0; - unsigned PICLabelUId; + unsigned PICLabelUId = 0; /// VarArgsFrameIndex - FrameIndex for start of varargs area. - int VarArgsFrameIndex; + int VarArgsFrameIndex = 0; /// HasITBlocks - True if IT blocks have been inserted. - bool HasITBlocks; + bool HasITBlocks = false; /// CPEClones - Track constant pool entries clones created by Constant Island /// pass. @@ -111,7 +111,7 @@ class ARMFunctionInfo : public MachineFunctionInfo { /// ArgumentStackSize - amount of bytes on stack consumed by the arguments /// being passed on the stack - unsigned ArgumentStackSize; + unsigned ArgumentStackSize = 0; /// CoalescedWeights - mapping of basic blocks to the rolling counter of /// coalesced weights. @@ -119,26 +119,16 @@ class ARMFunctionInfo : public MachineFunctionInfo { /// True if this function has a subset of CSRs that is handled explicitly via /// copies. - bool IsSplitCSR; + bool IsSplitCSR = false; /// Globals that have had their storage promoted into the constant pool. SmallPtrSet<const GlobalVariable*,2> PromotedGlobals; /// The amount the literal pool has been increasedby due to promoted globals. - int PromotedGlobalsIncrease; + int PromotedGlobalsIncrease = 0; public: - ARMFunctionInfo() : - isThumb(false), - hasThumb2(false), - ArgRegsSaveSize(0), ReturnRegsCount(0), HasStackFrame(false), - RestoreSPFromFP(false), - LRSpilledForFarJump(false), - FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0), - GPRCS1Size(0), GPRCS2Size(0), DPRCSAlignGapSize(0), DPRCSSize(0), - NumAlignedDPRCS2Regs(0), PICLabelUId(0), - VarArgsFrameIndex(0), HasITBlocks(false), IsSplitCSR(false), - PromotedGlobalsIncrease(0) {} + ARMFunctionInfo() = default; explicit ARMFunctionInfo(MachineFunction &MF); @@ -250,6 +240,7 @@ public: PromotedGlobalsIncrease = Sz; } }; -} // End llvm namespace -#endif +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_ARM_ARMMACHINEFUNCTIONINFO_H |