diff options
Diffstat (limited to 'lib/Target/Mips/MipsSchedule.td')
| -rw-r--r-- | lib/Target/Mips/MipsSchedule.td | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsSchedule.td b/lib/Target/Mips/MipsSchedule.td index c0de59ba15f55..8ec55ab6284da 100644 --- a/lib/Target/Mips/MipsSchedule.td +++ b/lib/Target/Mips/MipsSchedule.td @@ -84,6 +84,7 @@ def II_DIVU : InstrItinClass; def II_DIV_D : InstrItinClass; def II_DIV_S : InstrItinClass; def II_DMFC0 : InstrItinClass; +def II_DMT : InstrItinClass; def II_DMTC0 : InstrItinClass; def II_DMFC1 : InstrItinClass; def II_DMTC1 : InstrItinClass; @@ -113,8 +114,12 @@ def II_DSBH : InstrItinClass; def II_DSHD : InstrItinClass; def II_DSUBU : InstrItinClass; def II_DSUB : InstrItinClass; +def II_DVPE : InstrItinClass; +def II_EMT : InstrItinClass; +def II_EVPE : InstrItinClass; def II_EXT : InstrItinClass; // Any EXT instruction def II_FLOOR : InstrItinClass; +def II_FORK : InstrItinClass; def II_INS : InstrItinClass; // Any INS instruction def II_IndirectBranchPseudo : InstrItinClass; // Indirect branch pseudo. def II_J : InstrItinClass; @@ -221,6 +226,7 @@ def II_MFC1 : InstrItinClass; def II_MFHC1 : InstrItinClass; def II_MFC2 : InstrItinClass; def II_MFHI_MFLO : InstrItinClass; // mfhi and mflo +def II_MFTR : InstrItinClass; def II_MOD : InstrItinClass; def II_MODU : InstrItinClass; def II_MOVE : InstrItinClass; @@ -250,6 +256,7 @@ def II_MTC1 : InstrItinClass; def II_MTHC1 : InstrItinClass; def II_MTC2 : InstrItinClass; def II_MTHI_MTLO : InstrItinClass; // mthi and mtlo +def II_MTTR : InstrItinClass; def II_MUL : InstrItinClass; def II_MUH : InstrItinClass; def II_MUHU : InstrItinClass; @@ -345,6 +352,7 @@ def II_WRPGPR : InstrItinClass; def II_RDPGPR : InstrItinClass; def II_DVP : InstrItinClass; def II_EVP : InstrItinClass; +def II_YIELD : InstrItinClass; //===----------------------------------------------------------------------===// // Mips Generic instruction itineraries. @@ -386,6 +394,7 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ InstrItinData<II_DCLZ , [InstrStage<1, [ALU]>]>, InstrItinData<II_DMOD , [InstrStage<17, [IMULDIV]>]>, InstrItinData<II_DMODU , [InstrStage<17, [IMULDIV]>]>, + InstrItinData<II_DMT , [InstrStage<2, [ALU]>]>, InstrItinData<II_DSLL , [InstrStage<1, [ALU]>]>, InstrItinData<II_DSLL32 , [InstrStage<1, [ALU]>]>, InstrItinData<II_DSRL , [InstrStage<1, [ALU]>]>, @@ -404,7 +413,11 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ InstrItinData<II_DSHD , [InstrStage<1, [ALU]>]>, InstrItinData<II_DCLO , [InstrStage<1, [ALU]>]>, InstrItinData<II_DCLZ , [InstrStage<1, [ALU]>]>, + InstrItinData<II_DVPE , [InstrStage<2, [ALU]>]>, + InstrItinData<II_EMT , [InstrStage<2, [ALU]>]>, + InstrItinData<II_EVPE , [InstrStage<2, [ALU]>]>, InstrItinData<II_EXT , [InstrStage<1, [ALU]>]>, + InstrItinData<II_FORK , [InstrStage<1, [ALU]>]>, InstrItinData<II_INS , [InstrStage<1, [ALU]>]>, InstrItinData<II_LUI , [InstrStage<1, [ALU]>]>, InstrItinData<II_MOVE , [InstrStage<1, [ALU]>]>, @@ -653,12 +666,14 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ InstrItinData<II_MFHC0 , [InstrStage<2, [ALU]>]>, InstrItinData<II_MFC1 , [InstrStage<2, [ALU]>]>, InstrItinData<II_MFC2 , [InstrStage<2, [ALU]>]>, + InstrItinData<II_MFTR , [InstrStage<2, [ALU]>]>, InstrItinData<II_MTC0 , [InstrStage<2, [ALU]>]>, InstrItinData<II_MTHC0 , [InstrStage<2, [ALU]>]>, InstrItinData<II_MTC1 , [InstrStage<2, [ALU]>]>, InstrItinData<II_MTC2 , [InstrStage<2, [ALU]>]>, InstrItinData<II_MFHC1 , [InstrStage<2, [ALU]>]>, InstrItinData<II_MTHC1 , [InstrStage<2, [ALU]>]>, + InstrItinData<II_MTTR , [InstrStage<2, [ALU]>]>, InstrItinData<II_CACHE , [InstrStage<1, [ALU]>]>, InstrItinData<II_PREF , [InstrStage<1, [ALU]>]>, InstrItinData<II_CACHEE , [InstrStage<1, [ALU]>]>, @@ -670,5 +685,6 @@ def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [ InstrItinData<II_WRPGPR , [InstrStage<1, [ALU]>]>, InstrItinData<II_RDPGPR , [InstrStage<1, [ALU]>]>, InstrItinData<II_DVP , [InstrStage<1, [ALU]>]>, - InstrItinData<II_EVP , [InstrStage<1, [ALU]>]> + InstrItinData<II_EVP , [InstrStage<1, [ALU]>]>, + InstrItinData<II_YIELD , [InstrStage<5, [ALU]>]> ]>; |