diff options
Diffstat (limited to 'lib/Target/RISCV/RISCVISelLowering.h')
| -rw-r--r-- | lib/Target/RISCV/RISCVISelLowering.h | 24 | 
1 files changed, 21 insertions, 3 deletions
diff --git a/lib/Target/RISCV/RISCVISelLowering.h b/lib/Target/RISCV/RISCVISelLowering.h index 280adb29fd02b..6970900bb0622 100644 --- a/lib/Target/RISCV/RISCVISelLowering.h +++ b/lib/Target/RISCV/RISCVISelLowering.h @@ -43,6 +43,9 @@ public:    explicit RISCVTargetLowering(const TargetMachine &TM,                                 const RISCVSubtarget &STI); +  bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I, +                          MachineFunction &MF, +                          unsigned Intrinsic) const override;    bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,                               unsigned AS,                               Instruction *I = nullptr) const override; @@ -51,10 +54,13 @@ public:    bool isTruncateFree(Type *SrcTy, Type *DstTy) const override;    bool isTruncateFree(EVT SrcVT, EVT DstVT) const override;    bool isZExtFree(SDValue Val, EVT VT2) const override; +  bool isSExtCheaperThanZExt(EVT SrcVT, EVT DstVT) const override;    // Provide custom lowering hooks for some operations.    SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; +  SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; +    // This method returns the name of a target specific DAG node.    const char *getTargetNodeName(unsigned Opcode) const override; @@ -107,15 +113,27 @@ private:    SDValue lowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;    SDValue lowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;    SDValue lowerConstantPool(SDValue Op, SelectionDAG &DAG) const; -  SDValue lowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;    SDValue lowerSELECT(SDValue Op, SelectionDAG &DAG) const;    SDValue lowerVASTART(SDValue Op, SelectionDAG &DAG) const; -  SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; -  SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const; +  SDValue lowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; +  SDValue lowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;    bool IsEligibleForTailCallOptimization(CCState &CCInfo,      CallLoweringInfo &CLI, MachineFunction &MF,      const SmallVector<CCValAssign, 16> &ArgLocs) const; + +  TargetLowering::AtomicExpansionKind +  shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const override; +  virtual Value *emitMaskedAtomicRMWIntrinsic( +      IRBuilder<> &Builder, AtomicRMWInst *AI, Value *AlignedAddr, Value *Incr, +      Value *Mask, Value *ShiftAmt, AtomicOrdering Ord) const override; +  TargetLowering::AtomicExpansionKind +  shouldExpandAtomicCmpXchgInIR(AtomicCmpXchgInst *CI) const override; +  virtual Value * +  emitMaskedAtomicCmpXchgIntrinsic(IRBuilder<> &Builder, AtomicCmpXchgInst *CI, +                                   Value *AlignedAddr, Value *CmpVal, +                                   Value *NewVal, Value *Mask, +                                   AtomicOrdering Ord) const override;  };  }  | 
