diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMInstrFormats.td')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrFormats.td | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrFormats.td b/llvm/lib/Target/ARM/ARMInstrFormats.td index 1da32ad2af6ce..e13f3437cc7bd 100644 --- a/llvm/lib/Target/ARM/ARMInstrFormats.td +++ b/llvm/lib/Target/ARM/ARMInstrFormats.td @@ -205,7 +205,6 @@ def VPTPredROperand : AsmOperandClass { let Name = "VPTPredR"; let PredicateMethod = "isVPTPred"; } -def undef_tied_input; // Operand classes for the cluster of MC operands describing a // VPT-predicated MVE instruction. @@ -409,6 +408,9 @@ class InstTemplate<AddrMode am, int sz, IndexMode im, bit thumbArithFlagSetting = 0; bit validForTailPredication = 0; + bit retainsPreviousHalfElement = 0; + bit horizontalReduction = 0; + bit doubleWidthResult = 0; // If this is a pseudo instruction, mark it isCodeGenOnly. let isCodeGenOnly = !eq(!cast<string>(f), "Pseudo"); @@ -422,6 +424,9 @@ class InstTemplate<AddrMode am, int sz, IndexMode im, let TSFlags{18-15} = D.Value; let TSFlags{19} = thumbArithFlagSetting; let TSFlags{20} = validForTailPredication; + let TSFlags{21} = retainsPreviousHalfElement; + let TSFlags{22} = horizontalReduction; + let TSFlags{23} = doubleWidthResult; let Constraints = cstr; let Itinerary = itin; @@ -1123,6 +1128,9 @@ class Thumb2DSPPat<dag pattern, dag result> : Pat<pattern, result> { class Thumb2DSPMulPat<dag pattern, dag result> : Pat<pattern, result> { list<Predicate> Predicates = [IsThumb2, UseMulOps, HasDSP]; } +class FPRegs16Pat<dag pattern, dag result> : Pat<pattern, result> { + list<Predicate> Predicates = [HasFPRegs16]; +} class FP16Pat<dag pattern, dag result> : Pat<pattern, result> { list<Predicate> Predicates = [HasFP16]; } |