diff options
Diffstat (limited to 'llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp')
-rw-r--r-- | llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp | 33 |
1 files changed, 30 insertions, 3 deletions
diff --git a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp index 832112406155a..42fac5e2e000e 100644 --- a/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp +++ b/llvm/lib/Target/AVR/MCTargetDesc/AVRInstPrinter.cpp @@ -78,7 +78,7 @@ void AVRInstPrinter::printInst(const MCInst *MI, uint64_t Address, printOperand(MI, 2, O); break; default: - if (!printAliasInstr(MI, O)) + if (!printAliasInstr(MI, Address, O)) printInstruction(MI, Address, O); printAnnotation(O, Annot); @@ -100,8 +100,25 @@ const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum, void AVRInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) { - const MCOperand &Op = MI->getOperand(OpNo); const MCOperandInfo &MOI = this->MII.get(MI->getOpcode()).OpInfo[OpNo]; + if (MOI.RegClass == AVR::ZREGRegClassID) { + // Special case for the Z register, which sometimes doesn't have an operand + // in the MCInst. + O << "Z"; + return; + } + + if (OpNo >= MI->size()) { + // Not all operands are correctly disassembled at the moment. This means + // that some machine instructions won't have all the necessary operands + // set. + // To avoid asserting, print <unknown> instead until the necessary support + // has been implemented. + O << "<unknown>"; + return; + } + + const MCOperand &Op = MI->getOperand(OpNo); if (Op.isReg()) { bool isPtrReg = (MOI.RegClass == AVR::PTRREGSRegClassID) || @@ -114,7 +131,7 @@ void AVRInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, O << getPrettyRegisterName(Op.getReg(), MRI); } } else if (Op.isImm()) { - O << Op.getImm(); + O << formatImm(Op.getImm()); } else { assert(Op.isExpr() && "Unknown operand kind in printOperand"); O << *Op.getExpr(); @@ -125,6 +142,16 @@ void AVRInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, /// being encoded as a pc-relative value. void AVRInstPrinter::printPCRelImm(const MCInst *MI, unsigned OpNo, raw_ostream &O) { + if (OpNo >= MI->size()) { + // Not all operands are correctly disassembled at the moment. This means + // that some machine instructions won't have all the necessary operands + // set. + // To avoid asserting, print <unknown> instead until the necessary support + // has been implemented. + O << "<unknown>"; + return; + } + const MCOperand &Op = MI->getOperand(OpNo); if (Op.isImm()) { |