diff options
Diffstat (limited to 'llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index 79c47d1b65084..de582bd60cbfb 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -12,6 +12,7 @@ #include "MipsMCTargetDesc.h" #include "MipsAsmBackend.h" +#include "MipsBaseInfo.h" #include "MipsELFStreamer.h" #include "MipsInstPrinter.h" #include "MipsMCAsmInfo.h" @@ -44,7 +45,6 @@ using namespace llvm; #include "MipsGenRegisterInfo.inc" /// Select the Mips CPU for the given triple and cpu name. -/// FIXME: Merge with the copy in MipsSubtarget.cpp StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { if (CPU.empty() || CPU == "generic") { if (TT.getSubArch() == llvm::Triple::MipsSubArch_r6) { @@ -81,8 +81,9 @@ static MCSubtargetInfo *createMipsMCSubtargetInfo(const Triple &TT, } static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, - const Triple &TT) { - MCAsmInfo *MAI = new MipsMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions &Options) { + MCAsmInfo *MAI = new MipsMCAsmInfo(TT, Options); unsigned SP = MRI.getDwarfRegNum(Mips::SP, true); MCCFIInstruction Inst = MCCFIInstruction::createDefCfaRegister(nullptr, SP); @@ -165,7 +166,7 @@ static MCInstrAnalysis *createMipsMCInstrAnalysis(const MCInstrInfo *Info) { return new MipsMCInstrAnalysis(Info); } -extern "C" void LLVMInitializeMipsTargetMC() { +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMipsTargetMC() { for (Target *T : {&getTheMipsTarget(), &getTheMipselTarget(), &getTheMips64Target(), &getTheMips64elTarget()}) { // Register the MC asm info. |