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path: root/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
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Diffstat (limited to 'llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp')
-rw-r--r--llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp15
1 files changed, 14 insertions, 1 deletions
diff --git a/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp b/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
index f9d93ca29658c..310e54b0ea8d5 100644
--- a/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp
@@ -44,9 +44,22 @@ bool MipsPreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer,
return false;
case TargetOpcode::G_LOAD:
case TargetOpcode::G_SEXTLOAD:
- case TargetOpcode::G_ZEXTLOAD:
+ case TargetOpcode::G_ZEXTLOAD: {
+ // Don't attempt to combine non power of 2 loads or unaligned loads when
+ // subtarget doesn't support them.
+ auto MMO = *MI.memoperands_begin();
+ const MipsSubtarget &STI =
+ static_cast<const MipsSubtarget &>(MI.getMF()->getSubtarget());
+ if (!isPowerOf2_64(MMO->getSize()))
+ return false;
+ bool isUnaligned = MMO->getAlign() < MMO->getSize();
+ if (!STI.systemSupportsUnalignedAccess() && isUnaligned)
+ return false;
+
return Helper.tryCombineExtendingLoads(MI);
}
+ }
+
return false;
}