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path: root/llvm/lib/Target/XCore/XCoreISelLowering.cpp
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Diffstat (limited to 'llvm/lib/Target/XCore/XCoreISelLowering.cpp')
-rw-r--r--llvm/lib/Target/XCore/XCoreISelLowering.cpp40
1 files changed, 20 insertions, 20 deletions
diff --git a/llvm/lib/Target/XCore/XCoreISelLowering.cpp b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
index 70770f4c8e7cd..c32653137a10b 100644
--- a/llvm/lib/Target/XCore/XCoreISelLowering.cpp
+++ b/llvm/lib/Target/XCore/XCoreISelLowering.cpp
@@ -107,6 +107,7 @@ XCoreTargetLowering::XCoreTargetLowering(const TargetMachine &TM,
setOperationAction(ISD::CTPOP, MVT::i32, Expand);
setOperationAction(ISD::ROTL , MVT::i32, Expand);
setOperationAction(ISD::ROTR , MVT::i32, Expand);
+ setOperationAction(ISD::BITREVERSE , MVT::i32, Legal);
setOperationAction(ISD::TRAP, MVT::Other, Legal);
@@ -328,10 +329,10 @@ LowerConstantPool(SDValue Op, SelectionDAG &DAG) const
SDValue Res;
if (CP->isMachineConstantPoolEntry()) {
Res = DAG.getTargetConstantPool(CP->getMachineCPVal(), PtrVT,
- CP->getAlignment(), CP->getOffset());
+ CP->getAlign(), CP->getOffset());
} else {
- Res = DAG.getTargetConstantPool(CP->getConstVal(), PtrVT,
- CP->getAlignment(), CP->getOffset());
+ Res = DAG.getTargetConstantPool(CP->getConstVal(), PtrVT, CP->getAlign(),
+ CP->getOffset());
}
return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res);
}
@@ -434,7 +435,7 @@ SDValue XCoreTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
Offset, DAG);
}
if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) &&
- MinAlign(GV->getAlignment(), 4) == 4) {
+ GV->getPointerAlignment(DAG.getDataLayout()) >= 4) {
SDValue NewBasePtr = DAG.getGlobalAddress(GV, DL,
BasePtr->getValueType(0));
return lowerLoadWordFromAlignedBasePlusOffset(DL, Chain, NewBasePtr,
@@ -996,7 +997,7 @@ LowerATOMIC_STORE(SDValue Op, SelectionDAG &DAG) const {
}
MachineMemOperand::Flags
-XCoreTargetLowering::getMMOFlags(const Instruction &I) const {
+XCoreTargetLowering::getTargetMMOFlags(const Instruction &I) const {
// Because of how we convert atomic_load and atomic_store to normal loads and
// stores in the DAG, we need to ensure that the MMOs are marked volatile
// since DAGCombine hasn't been updated to account for atomic, but non
@@ -1118,7 +1119,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
// The ABI dictates there should be one stack slot available to the callee
// on function entry (for saving lr).
- CCInfo.AllocateStack(4, 4);
+ CCInfo.AllocateStack(4, Align(4));
CCInfo.AnalyzeCallOperands(Outs, CC_XCore);
@@ -1126,7 +1127,7 @@ SDValue XCoreTargetLowering::LowerCCCCallTo(
// Analyze return values to determine the number of bytes of stack required.
CCState RetCCInfo(CallConv, isVarArg, DAG.getMachineFunction(), RVLocs,
*DAG.getContext());
- RetCCInfo.AllocateStack(CCInfo.getNextStackOffset(), 4);
+ RetCCInfo.AllocateStack(CCInfo.getNextStackOffset(), Align(4));
RetCCInfo.AnalyzeCallResult(Ins, RetCC_XCore);
// Get a count of how many bytes are to be pushed on the stack.
@@ -1391,16 +1392,16 @@ SDValue XCoreTargetLowering::LowerCCCArguments(
ArgDI != ArgDE; ++ArgDI) {
if (ArgDI->Flags.isByVal() && ArgDI->Flags.getByValSize()) {
unsigned Size = ArgDI->Flags.getByValSize();
- unsigned Align = std::max(StackSlotSize, ArgDI->Flags.getByValAlign());
+ Align Alignment =
+ std::max(Align(StackSlotSize), ArgDI->Flags.getNonZeroByValAlign());
// Create a new object on the stack and copy the pointee into it.
- int FI = MFI.CreateStackObject(Size, Align, false);
+ int FI = MFI.CreateStackObject(Size, Alignment, false);
SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
InVals.push_back(FIN);
- MemOps.push_back(DAG.getMemcpy(Chain, dl, FIN, ArgDI->SDV,
- DAG.getConstant(Size, dl, MVT::i32),
- Align, false, false, false,
- MachinePointerInfo(),
- MachinePointerInfo()));
+ MemOps.push_back(DAG.getMemcpy(
+ Chain, dl, FIN, ArgDI->SDV, DAG.getConstant(Size, dl, MVT::i32),
+ Alignment, false, false, false, MachinePointerInfo(),
+ MachinePointerInfo()));
} else {
InVals.push_back(ArgDI->SDV);
}
@@ -1454,7 +1455,7 @@ XCoreTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
// Analyze return values.
if (!isVarArg)
- CCInfo.AllocateStack(XFI->getReturnStackOffset(), 4);
+ CCInfo.AllocateStack(XFI->getReturnStackOffset(), Align(4));
CCInfo.AnalyzeReturn(Outs, RetCC_XCore);
@@ -1800,11 +1801,10 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N,
!LD->isVolatile() && !LD->isIndexed() &&
Chain.reachesChainWithoutSideEffects(SDValue(LD, 1))) {
bool isTail = isInTailCallPosition(DAG, ST, Chain);
- return DAG.getMemmove(Chain, dl, ST->getBasePtr(),
- LD->getBasePtr(),
- DAG.getConstant(StoreBits/8, dl, MVT::i32),
- Alignment, false, isTail, ST->getPointerInfo(),
- LD->getPointerInfo());
+ return DAG.getMemmove(Chain, dl, ST->getBasePtr(), LD->getBasePtr(),
+ DAG.getConstant(StoreBits / 8, dl, MVT::i32),
+ Align(Alignment), false, isTail,
+ ST->getPointerInfo(), LD->getPointerInfo());
}
}
break;