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-rw-r--r--source/Utility/ArchSpec.cpp1485
-rw-r--r--source/Utility/CMakeLists.txt46
-rw-r--r--source/Utility/DataEncoder.cpp44
-rw-r--r--source/Utility/DataExtractor.cpp111
-rw-r--r--source/Utility/FileSpec.cpp12
-rw-r--r--source/Utility/JSON.cpp5
-rw-r--r--source/Utility/Log.cpp19
-rw-r--r--source/Utility/Logging.cpp2
-rw-r--r--source/Utility/PPC64LE_DWARF_Registers.h194
-rw-r--r--source/Utility/PPC64LE_ehframe_Registers.h194
-rw-r--r--source/Utility/SelectHelper.cpp1
-rw-r--r--source/Utility/Status.cpp10
-rw-r--r--source/Utility/StringExtractorGDBRemote.cpp1
-rw-r--r--source/Utility/StructuredData.cpp1
-rw-r--r--source/Utility/TaskPool.cpp98
-rw-r--r--source/Utility/UUID.cpp28
-rw-r--r--source/Utility/UriParser.cpp4
17 files changed, 2004 insertions, 251 deletions
diff --git a/source/Utility/ArchSpec.cpp b/source/Utility/ArchSpec.cpp
new file mode 100644
index 0000000000000..a10fe78260bb3
--- /dev/null
+++ b/source/Utility/ArchSpec.cpp
@@ -0,0 +1,1485 @@
+//===-- ArchSpec.cpp --------------------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "lldb/Utility/ArchSpec.h"
+
+#include "lldb/Utility/NameMatches.h"
+#include "lldb/Utility/Stream.h" // for Stream
+#include "lldb/Utility/StringList.h"
+#include "lldb/lldb-defines.h" // for LLDB_INVALID_C...
+#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/Twine.h" // for Twine
+#include "llvm/BinaryFormat/COFF.h"
+#include "llvm/BinaryFormat/ELF.h"
+#include "llvm/BinaryFormat/MachO.h" // for CPUType::CPU_T...
+#include "llvm/Support/Compiler.h" // for LLVM_FALLTHROUGH
+#include "llvm/Support/Host.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
+ bool try_inverse, bool enforce_exact_match);
+
+namespace lldb_private {
+
+struct CoreDefinition {
+ ByteOrder default_byte_order;
+ uint32_t addr_byte_size;
+ uint32_t min_opcode_byte_size;
+ uint32_t max_opcode_byte_size;
+ llvm::Triple::ArchType machine;
+ ArchSpec::Core core;
+ const char *const name;
+};
+
+} // namespace lldb_private
+
+// This core information can be looked using the ArchSpec::Core as the index
+static const CoreDefinition g_core_definitions[] = {
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_generic,
+ "arm"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv4,
+ "armv4"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv4t,
+ "armv4t"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv5,
+ "armv5"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv5e,
+ "armv5e"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv5t,
+ "armv5t"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv6,
+ "armv6"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv6m,
+ "armv6m"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7,
+ "armv7"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7f,
+ "armv7f"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7s,
+ "armv7s"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7k,
+ "armv7k"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7m,
+ "armv7m"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_armv7em,
+ "armv7em"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::arm, ArchSpec::eCore_arm_xscale,
+ "xscale"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumb,
+ "thumb"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv4t,
+ "thumbv4t"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv5,
+ "thumbv5"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv5e,
+ "thumbv5e"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv6,
+ "thumbv6"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv6m,
+ "thumbv6m"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7,
+ "thumbv7"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7f,
+ "thumbv7f"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7s,
+ "thumbv7s"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7k,
+ "thumbv7k"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7m,
+ "thumbv7m"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::thumb, ArchSpec::eCore_thumbv7em,
+ "thumbv7em"},
+ {eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64,
+ ArchSpec::eCore_arm_arm64, "arm64"},
+ {eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64,
+ ArchSpec::eCore_arm_armv8, "armv8"},
+ {eByteOrderLittle, 8, 4, 4, llvm::Triple::aarch64,
+ ArchSpec::eCore_arm_aarch64, "aarch64"},
+
+ // mips32, mips32r2, mips32r3, mips32r5, mips32r6
+ {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32,
+ "mips"},
+ {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r2,
+ "mipsr2"},
+ {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r3,
+ "mipsr3"},
+ {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r5,
+ "mipsr5"},
+ {eByteOrderBig, 4, 2, 4, llvm::Triple::mips, ArchSpec::eCore_mips32r6,
+ "mipsr6"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::mipsel, ArchSpec::eCore_mips32el,
+ "mipsel"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::mipsel,
+ ArchSpec::eCore_mips32r2el, "mipsr2el"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::mipsel,
+ ArchSpec::eCore_mips32r3el, "mipsr3el"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::mipsel,
+ ArchSpec::eCore_mips32r5el, "mipsr5el"},
+ {eByteOrderLittle, 4, 2, 4, llvm::Triple::mipsel,
+ ArchSpec::eCore_mips32r6el, "mipsr6el"},
+
+ // mips64, mips64r2, mips64r3, mips64r5, mips64r6
+ {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64,
+ "mips64"},
+ {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r2,
+ "mips64r2"},
+ {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r3,
+ "mips64r3"},
+ {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r5,
+ "mips64r5"},
+ {eByteOrderBig, 8, 2, 4, llvm::Triple::mips64, ArchSpec::eCore_mips64r6,
+ "mips64r6"},
+ {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
+ ArchSpec::eCore_mips64el, "mips64el"},
+ {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
+ ArchSpec::eCore_mips64r2el, "mips64r2el"},
+ {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
+ ArchSpec::eCore_mips64r3el, "mips64r3el"},
+ {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
+ ArchSpec::eCore_mips64r5el, "mips64r5el"},
+ {eByteOrderLittle, 8, 2, 4, llvm::Triple::mips64el,
+ ArchSpec::eCore_mips64r6el, "mips64r6el"},
+
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_generic,
+ "powerpc"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc601,
+ "ppc601"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc602,
+ "ppc602"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc603,
+ "ppc603"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc603e,
+ "ppc603e"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc603ev,
+ "ppc603ev"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc604,
+ "ppc604"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc604e,
+ "ppc604e"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc620,
+ "ppc620"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc750,
+ "ppc750"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc7400,
+ "ppc7400"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc7450,
+ "ppc7450"},
+ {eByteOrderBig, 4, 4, 4, llvm::Triple::ppc, ArchSpec::eCore_ppc_ppc970,
+ "ppc970"},
+
+ {eByteOrderLittle, 8, 4, 4, llvm::Triple::ppc64le,
+ ArchSpec::eCore_ppc64le_generic, "powerpc64le"},
+ {eByteOrderBig, 8, 4, 4, llvm::Triple::ppc64, ArchSpec::eCore_ppc64_generic,
+ "powerpc64"},
+ {eByteOrderBig, 8, 4, 4, llvm::Triple::ppc64,
+ ArchSpec::eCore_ppc64_ppc970_64, "ppc970-64"},
+
+ {eByteOrderBig, 8, 2, 6, llvm::Triple::systemz,
+ ArchSpec::eCore_s390x_generic, "s390x"},
+
+ {eByteOrderLittle, 4, 4, 4, llvm::Triple::sparc,
+ ArchSpec::eCore_sparc_generic, "sparc"},
+ {eByteOrderLittle, 8, 4, 4, llvm::Triple::sparcv9,
+ ArchSpec::eCore_sparc9_generic, "sparcv9"},
+
+ {eByteOrderLittle, 4, 1, 15, llvm::Triple::x86, ArchSpec::eCore_x86_32_i386,
+ "i386"},
+ {eByteOrderLittle, 4, 1, 15, llvm::Triple::x86, ArchSpec::eCore_x86_32_i486,
+ "i486"},
+ {eByteOrderLittle, 4, 1, 15, llvm::Triple::x86,
+ ArchSpec::eCore_x86_32_i486sx, "i486sx"},
+ {eByteOrderLittle, 4, 1, 15, llvm::Triple::x86, ArchSpec::eCore_x86_32_i686,
+ "i686"},
+
+ {eByteOrderLittle, 8, 1, 15, llvm::Triple::x86_64,
+ ArchSpec::eCore_x86_64_x86_64, "x86_64"},
+ {eByteOrderLittle, 8, 1, 15, llvm::Triple::x86_64,
+ ArchSpec::eCore_x86_64_x86_64h, "x86_64h"},
+ {eByteOrderLittle, 4, 4, 4, llvm::Triple::hexagon,
+ ArchSpec::eCore_hexagon_generic, "hexagon"},
+ {eByteOrderLittle, 4, 4, 4, llvm::Triple::hexagon,
+ ArchSpec::eCore_hexagon_hexagonv4, "hexagonv4"},
+ {eByteOrderLittle, 4, 4, 4, llvm::Triple::hexagon,
+ ArchSpec::eCore_hexagon_hexagonv5, "hexagonv5"},
+
+ {eByteOrderLittle, 4, 4, 4, llvm::Triple::UnknownArch,
+ ArchSpec::eCore_uknownMach32, "unknown-mach-32"},
+ {eByteOrderLittle, 8, 4, 4, llvm::Triple::UnknownArch,
+ ArchSpec::eCore_uknownMach64, "unknown-mach-64"},
+
+ {eByteOrderBig, 4, 1, 1, llvm::Triple::kalimba, ArchSpec::eCore_kalimba3,
+ "kalimba3"},
+ {eByteOrderLittle, 4, 1, 1, llvm::Triple::kalimba, ArchSpec::eCore_kalimba4,
+ "kalimba4"},
+ {eByteOrderLittle, 4, 1, 1, llvm::Triple::kalimba, ArchSpec::eCore_kalimba5,
+ "kalimba5"}};
+
+// Ensure that we have an entry in the g_core_definitions for each core. If you
+// comment out an entry above,
+// you will need to comment out the corresponding ArchSpec::Core enumeration.
+static_assert(sizeof(g_core_definitions) / sizeof(CoreDefinition) ==
+ ArchSpec::kNumCores,
+ "make sure we have one core definition for each core");
+
+struct ArchDefinitionEntry {
+ ArchSpec::Core core;
+ uint32_t cpu;
+ uint32_t sub;
+ uint32_t cpu_mask;
+ uint32_t sub_mask;
+};
+
+struct ArchDefinition {
+ ArchitectureType type;
+ size_t num_entries;
+ const ArchDefinitionEntry *entries;
+ const char *name;
+};
+
+size_t ArchSpec::AutoComplete(llvm::StringRef name, StringList &matches) {
+ if (!name.empty()) {
+ for (uint32_t i = 0; i < llvm::array_lengthof(g_core_definitions); ++i) {
+ if (NameMatches(g_core_definitions[i].name, NameMatch::StartsWith, name))
+ matches.AppendString(g_core_definitions[i].name);
+ }
+ } else {
+ for (uint32_t i = 0; i < llvm::array_lengthof(g_core_definitions); ++i)
+ matches.AppendString(g_core_definitions[i].name);
+ }
+ return matches.GetSize();
+}
+
+#define CPU_ANY (UINT32_MAX)
+
+//===----------------------------------------------------------------------===//
+// A table that gets searched linearly for matches. This table is used to
+// convert cpu type and subtypes to architecture names, and to convert
+// architecture names to cpu types and subtypes. The ordering is important and
+// allows the precedence to be set when the table is built.
+#define SUBTYPE_MASK 0x00FFFFFFu
+
+static const ArchDefinitionEntry g_macho_arch_entries[] = {
+ {ArchSpec::eCore_arm_generic, llvm::MachO::CPU_TYPE_ARM, CPU_ANY,
+ UINT32_MAX, UINT32_MAX},
+ {ArchSpec::eCore_arm_generic, llvm::MachO::CPU_TYPE_ARM, 0, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv4, llvm::MachO::CPU_TYPE_ARM, 5, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv4t, llvm::MachO::CPU_TYPE_ARM, 5, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv6, llvm::MachO::CPU_TYPE_ARM, 6, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv6m, llvm::MachO::CPU_TYPE_ARM, 14, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv5, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv5e, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv5t, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_xscale, llvm::MachO::CPU_TYPE_ARM, 8, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv7, llvm::MachO::CPU_TYPE_ARM, 9, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv7f, llvm::MachO::CPU_TYPE_ARM, 10, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv7s, llvm::MachO::CPU_TYPE_ARM, 11, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv7k, llvm::MachO::CPU_TYPE_ARM, 12, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv7m, llvm::MachO::CPU_TYPE_ARM, 15, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_armv7em, llvm::MachO::CPU_TYPE_ARM, 16, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, 1, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, 0, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, 13, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_arm_arm64, llvm::MachO::CPU_TYPE_ARM64, CPU_ANY,
+ UINT32_MAX, SUBTYPE_MASK},
+ {ArchSpec::eCore_thumb, llvm::MachO::CPU_TYPE_ARM, 0, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv4t, llvm::MachO::CPU_TYPE_ARM, 5, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv5, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv5e, llvm::MachO::CPU_TYPE_ARM, 7, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv6, llvm::MachO::CPU_TYPE_ARM, 6, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv6m, llvm::MachO::CPU_TYPE_ARM, 14, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv7, llvm::MachO::CPU_TYPE_ARM, 9, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv7f, llvm::MachO::CPU_TYPE_ARM, 10, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv7s, llvm::MachO::CPU_TYPE_ARM, 11, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv7k, llvm::MachO::CPU_TYPE_ARM, 12, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv7m, llvm::MachO::CPU_TYPE_ARM, 15, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_thumbv7em, llvm::MachO::CPU_TYPE_ARM, 16, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_generic, llvm::MachO::CPU_TYPE_POWERPC, CPU_ANY,
+ UINT32_MAX, UINT32_MAX},
+ {ArchSpec::eCore_ppc_generic, llvm::MachO::CPU_TYPE_POWERPC, 0, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc601, llvm::MachO::CPU_TYPE_POWERPC, 1, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc602, llvm::MachO::CPU_TYPE_POWERPC, 2, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc603, llvm::MachO::CPU_TYPE_POWERPC, 3, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc603e, llvm::MachO::CPU_TYPE_POWERPC, 4, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc603ev, llvm::MachO::CPU_TYPE_POWERPC, 5, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc604, llvm::MachO::CPU_TYPE_POWERPC, 6, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc604e, llvm::MachO::CPU_TYPE_POWERPC, 7, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc620, llvm::MachO::CPU_TYPE_POWERPC, 8, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc750, llvm::MachO::CPU_TYPE_POWERPC, 9, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc7400, llvm::MachO::CPU_TYPE_POWERPC, 10, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc7450, llvm::MachO::CPU_TYPE_POWERPC, 11, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc_ppc970, llvm::MachO::CPU_TYPE_POWERPC, 100, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc64_generic, llvm::MachO::CPU_TYPE_POWERPC64, 0,
+ UINT32_MAX, SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc64le_generic, llvm::MachO::CPU_TYPE_POWERPC64, CPU_ANY,
+ UINT32_MAX, SUBTYPE_MASK},
+ {ArchSpec::eCore_ppc64_ppc970_64, llvm::MachO::CPU_TYPE_POWERPC64, 100,
+ UINT32_MAX, SUBTYPE_MASK},
+ {ArchSpec::eCore_x86_32_i386, llvm::MachO::CPU_TYPE_I386, 3, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_x86_32_i486, llvm::MachO::CPU_TYPE_I386, 4, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_x86_32_i486sx, llvm::MachO::CPU_TYPE_I386, 0x84,
+ UINT32_MAX, SUBTYPE_MASK},
+ {ArchSpec::eCore_x86_32_i386, llvm::MachO::CPU_TYPE_I386, CPU_ANY,
+ UINT32_MAX, UINT32_MAX},
+ {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, 3, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, 4, UINT32_MAX,
+ SUBTYPE_MASK},
+ {ArchSpec::eCore_x86_64_x86_64h, llvm::MachO::CPU_TYPE_X86_64, 8,
+ UINT32_MAX, SUBTYPE_MASK},
+ {ArchSpec::eCore_x86_64_x86_64, llvm::MachO::CPU_TYPE_X86_64, CPU_ANY,
+ UINT32_MAX, UINT32_MAX},
+ // Catch any unknown mach architectures so we can always use the object and
+ // symbol mach-o files
+ {ArchSpec::eCore_uknownMach32, 0, 0, 0xFF000000u, 0x00000000u},
+ {ArchSpec::eCore_uknownMach64, llvm::MachO::CPU_ARCH_ABI64, 0, 0xFF000000u,
+ 0x00000000u}};
+
+static const ArchDefinition g_macho_arch_def = {
+ eArchTypeMachO, llvm::array_lengthof(g_macho_arch_entries),
+ g_macho_arch_entries, "mach-o"};
+
+//===----------------------------------------------------------------------===//
+// A table that gets searched linearly for matches. This table is used to
+// convert cpu type and subtypes to architecture names, and to convert
+// architecture names to cpu types and subtypes. The ordering is important and
+// allows the precedence to be set when the table is built.
+static const ArchDefinitionEntry g_elf_arch_entries[] = {
+ {ArchSpec::eCore_sparc_generic, llvm::ELF::EM_SPARC, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // Sparc
+ {ArchSpec::eCore_x86_32_i386, llvm::ELF::EM_386, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // Intel 80386
+ {ArchSpec::eCore_x86_32_i486, llvm::ELF::EM_IAMCU, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // Intel MCU // FIXME: is this correct?
+ {ArchSpec::eCore_ppc_generic, llvm::ELF::EM_PPC, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC
+ {ArchSpec::eCore_ppc64le_generic, llvm::ELF::EM_PPC64, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC64le
+ {ArchSpec::eCore_ppc64_generic, llvm::ELF::EM_PPC64, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC64
+ {ArchSpec::eCore_arm_generic, llvm::ELF::EM_ARM, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // ARM
+ {ArchSpec::eCore_arm_aarch64, llvm::ELF::EM_AARCH64, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // ARM64
+ {ArchSpec::eCore_s390x_generic, llvm::ELF::EM_S390, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // SystemZ
+ {ArchSpec::eCore_sparc9_generic, llvm::ELF::EM_SPARCV9,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // SPARC V9
+ {ArchSpec::eCore_x86_64_x86_64, llvm::ELF::EM_X86_64, LLDB_INVALID_CPUTYPE,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // AMD64
+ {ArchSpec::eCore_mips32, llvm::ELF::EM_MIPS, ArchSpec::eMIPSSubType_mips32,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32
+ {ArchSpec::eCore_mips32r2, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips32r2, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r2
+ {ArchSpec::eCore_mips32r6, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips32r6, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r6
+ {ArchSpec::eCore_mips32el, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips32el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32el
+ {ArchSpec::eCore_mips32r2el, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips32r2el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r2el
+ {ArchSpec::eCore_mips32r6el, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips32r6el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips32r6el
+ {ArchSpec::eCore_mips64, llvm::ELF::EM_MIPS, ArchSpec::eMIPSSubType_mips64,
+ 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64
+ {ArchSpec::eCore_mips64r2, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips64r2, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r2
+ {ArchSpec::eCore_mips64r6, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips64r6, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r6
+ {ArchSpec::eCore_mips64el, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips64el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64el
+ {ArchSpec::eCore_mips64r2el, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips64r2el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r2el
+ {ArchSpec::eCore_mips64r6el, llvm::ELF::EM_MIPS,
+ ArchSpec::eMIPSSubType_mips64r6el, 0xFFFFFFFFu, 0xFFFFFFFFu}, // mips64r6el
+ {ArchSpec::eCore_hexagon_generic, llvm::ELF::EM_HEXAGON,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // HEXAGON
+ {ArchSpec::eCore_kalimba3, llvm::ELF::EM_CSR_KALIMBA,
+ llvm::Triple::KalimbaSubArch_v3, 0xFFFFFFFFu, 0xFFFFFFFFu}, // KALIMBA
+ {ArchSpec::eCore_kalimba4, llvm::ELF::EM_CSR_KALIMBA,
+ llvm::Triple::KalimbaSubArch_v4, 0xFFFFFFFFu, 0xFFFFFFFFu}, // KALIMBA
+ {ArchSpec::eCore_kalimba5, llvm::ELF::EM_CSR_KALIMBA,
+ llvm::Triple::KalimbaSubArch_v5, 0xFFFFFFFFu, 0xFFFFFFFFu} // KALIMBA
+};
+
+static const ArchDefinition g_elf_arch_def = {
+ eArchTypeELF,
+ llvm::array_lengthof(g_elf_arch_entries),
+ g_elf_arch_entries,
+ "elf",
+};
+
+static const ArchDefinitionEntry g_coff_arch_entries[] = {
+ {ArchSpec::eCore_x86_32_i386, llvm::COFF::IMAGE_FILE_MACHINE_I386,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // Intel 80x86
+ {ArchSpec::eCore_ppc_generic, llvm::COFF::IMAGE_FILE_MACHINE_POWERPC,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC
+ {ArchSpec::eCore_ppc_generic, llvm::COFF::IMAGE_FILE_MACHINE_POWERPCFP,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // PowerPC (with FPU)
+ {ArchSpec::eCore_arm_generic, llvm::COFF::IMAGE_FILE_MACHINE_ARM,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // ARM
+ {ArchSpec::eCore_arm_armv7, llvm::COFF::IMAGE_FILE_MACHINE_ARMNT,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // ARMv7
+ {ArchSpec::eCore_thumb, llvm::COFF::IMAGE_FILE_MACHINE_THUMB,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu}, // ARMv7
+ {ArchSpec::eCore_x86_64_x86_64, llvm::COFF::IMAGE_FILE_MACHINE_AMD64,
+ LLDB_INVALID_CPUTYPE, 0xFFFFFFFFu, 0xFFFFFFFFu} // AMD64
+};
+
+static const ArchDefinition g_coff_arch_def = {
+ eArchTypeCOFF,
+ llvm::array_lengthof(g_coff_arch_entries),
+ g_coff_arch_entries,
+ "pe-coff",
+};
+
+//===----------------------------------------------------------------------===//
+// Table of all ArchDefinitions
+static const ArchDefinition *g_arch_definitions[] = {
+ &g_macho_arch_def, &g_elf_arch_def, &g_coff_arch_def};
+
+static const size_t k_num_arch_definitions =
+ llvm::array_lengthof(g_arch_definitions);
+
+//===----------------------------------------------------------------------===//
+// Static helper functions.
+
+// Get the architecture definition for a given object type.
+static const ArchDefinition *FindArchDefinition(ArchitectureType arch_type) {
+ for (unsigned int i = 0; i < k_num_arch_definitions; ++i) {
+ const ArchDefinition *def = g_arch_definitions[i];
+ if (def->type == arch_type)
+ return def;
+ }
+ return nullptr;
+}
+
+// Get an architecture definition by name.
+static const CoreDefinition *FindCoreDefinition(llvm::StringRef name) {
+ for (unsigned int i = 0; i < llvm::array_lengthof(g_core_definitions); ++i) {
+ if (name.equals_lower(g_core_definitions[i].name))
+ return &g_core_definitions[i];
+ }
+ return nullptr;
+}
+
+static inline const CoreDefinition *FindCoreDefinition(ArchSpec::Core core) {
+ if (core < llvm::array_lengthof(g_core_definitions))
+ return &g_core_definitions[core];
+ return nullptr;
+}
+
+// Get a definition entry by cpu type and subtype.
+static const ArchDefinitionEntry *
+FindArchDefinitionEntry(const ArchDefinition *def, uint32_t cpu, uint32_t sub) {
+ if (def == nullptr)
+ return nullptr;
+
+ const ArchDefinitionEntry *entries = def->entries;
+ for (size_t i = 0; i < def->num_entries; ++i) {
+ if (entries[i].cpu == (cpu & entries[i].cpu_mask))
+ if (entries[i].sub == (sub & entries[i].sub_mask))
+ return &entries[i];
+ }
+ return nullptr;
+}
+
+static const ArchDefinitionEntry *
+FindArchDefinitionEntry(const ArchDefinition *def, ArchSpec::Core core) {
+ if (def == nullptr)
+ return nullptr;
+
+ const ArchDefinitionEntry *entries = def->entries;
+ for (size_t i = 0; i < def->num_entries; ++i) {
+ if (entries[i].core == core)
+ return &entries[i];
+ }
+ return nullptr;
+}
+
+//===----------------------------------------------------------------------===//
+// Constructors and destructors.
+
+ArchSpec::ArchSpec() {}
+
+ArchSpec::ArchSpec(const char *triple_cstr) {
+ if (triple_cstr)
+ SetTriple(triple_cstr);
+}
+
+ArchSpec::ArchSpec(llvm::StringRef triple_str) { SetTriple(triple_str); }
+
+ArchSpec::ArchSpec(const llvm::Triple &triple) { SetTriple(triple); }
+
+ArchSpec::ArchSpec(ArchitectureType arch_type, uint32_t cpu, uint32_t subtype) {
+ SetArchitecture(arch_type, cpu, subtype);
+}
+
+ArchSpec::~ArchSpec() = default;
+
+//===----------------------------------------------------------------------===//
+// Assignment and initialization.
+
+const ArchSpec &ArchSpec::operator=(const ArchSpec &rhs) {
+ if (this != &rhs) {
+ m_triple = rhs.m_triple;
+ m_core = rhs.m_core;
+ m_byte_order = rhs.m_byte_order;
+ m_distribution_id = rhs.m_distribution_id;
+ m_flags = rhs.m_flags;
+ }
+ return *this;
+}
+
+void ArchSpec::Clear() {
+ m_triple = llvm::Triple();
+ m_core = kCore_invalid;
+ m_byte_order = eByteOrderInvalid;
+ m_distribution_id.Clear();
+ m_flags = 0;
+}
+
+//===----------------------------------------------------------------------===//
+// Predicates.
+
+const char *ArchSpec::GetArchitectureName() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def)
+ return core_def->name;
+ return "unknown";
+}
+
+bool ArchSpec::IsMIPS() const {
+ const llvm::Triple::ArchType machine = GetMachine();
+ if (machine == llvm::Triple::mips || machine == llvm::Triple::mipsel ||
+ machine == llvm::Triple::mips64 || machine == llvm::Triple::mips64el)
+ return true;
+ return false;
+}
+
+std::string ArchSpec::GetTargetABI() const {
+
+ std::string abi;
+
+ if (IsMIPS()) {
+ switch (GetFlags() & ArchSpec::eMIPSABI_mask) {
+ case ArchSpec::eMIPSABI_N64:
+ abi = "n64";
+ return abi;
+ case ArchSpec::eMIPSABI_N32:
+ abi = "n32";
+ return abi;
+ case ArchSpec::eMIPSABI_O32:
+ abi = "o32";
+ return abi;
+ default:
+ return abi;
+ }
+ }
+ return abi;
+}
+
+void ArchSpec::SetFlags(std::string elf_abi) {
+
+ uint32_t flag = GetFlags();
+ if (IsMIPS()) {
+ if (elf_abi == "n64")
+ flag |= ArchSpec::eMIPSABI_N64;
+ else if (elf_abi == "n32")
+ flag |= ArchSpec::eMIPSABI_N32;
+ else if (elf_abi == "o32")
+ flag |= ArchSpec::eMIPSABI_O32;
+ }
+ SetFlags(flag);
+}
+
+std::string ArchSpec::GetClangTargetCPU() const {
+ std::string cpu;
+ const llvm::Triple::ArchType machine = GetMachine();
+
+ if (machine == llvm::Triple::mips || machine == llvm::Triple::mipsel ||
+ machine == llvm::Triple::mips64 || machine == llvm::Triple::mips64el) {
+ switch (m_core) {
+ case ArchSpec::eCore_mips32:
+ case ArchSpec::eCore_mips32el:
+ cpu = "mips32";
+ break;
+ case ArchSpec::eCore_mips32r2:
+ case ArchSpec::eCore_mips32r2el:
+ cpu = "mips32r2";
+ break;
+ case ArchSpec::eCore_mips32r3:
+ case ArchSpec::eCore_mips32r3el:
+ cpu = "mips32r3";
+ break;
+ case ArchSpec::eCore_mips32r5:
+ case ArchSpec::eCore_mips32r5el:
+ cpu = "mips32r5";
+ break;
+ case ArchSpec::eCore_mips32r6:
+ case ArchSpec::eCore_mips32r6el:
+ cpu = "mips32r6";
+ break;
+ case ArchSpec::eCore_mips64:
+ case ArchSpec::eCore_mips64el:
+ cpu = "mips64";
+ break;
+ case ArchSpec::eCore_mips64r2:
+ case ArchSpec::eCore_mips64r2el:
+ cpu = "mips64r2";
+ break;
+ case ArchSpec::eCore_mips64r3:
+ case ArchSpec::eCore_mips64r3el:
+ cpu = "mips64r3";
+ break;
+ case ArchSpec::eCore_mips64r5:
+ case ArchSpec::eCore_mips64r5el:
+ cpu = "mips64r5";
+ break;
+ case ArchSpec::eCore_mips64r6:
+ case ArchSpec::eCore_mips64r6el:
+ cpu = "mips64r6";
+ break;
+ default:
+ break;
+ }
+ }
+ return cpu;
+}
+
+uint32_t ArchSpec::GetMachOCPUType() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def) {
+ const ArchDefinitionEntry *arch_def =
+ FindArchDefinitionEntry(&g_macho_arch_def, core_def->core);
+ if (arch_def) {
+ return arch_def->cpu;
+ }
+ }
+ return LLDB_INVALID_CPUTYPE;
+}
+
+uint32_t ArchSpec::GetMachOCPUSubType() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def) {
+ const ArchDefinitionEntry *arch_def =
+ FindArchDefinitionEntry(&g_macho_arch_def, core_def->core);
+ if (arch_def) {
+ return arch_def->sub;
+ }
+ }
+ return LLDB_INVALID_CPUTYPE;
+}
+
+uint32_t ArchSpec::GetDataByteSize() const {
+ switch (m_core) {
+ case eCore_kalimba3:
+ return 4;
+ case eCore_kalimba4:
+ return 1;
+ case eCore_kalimba5:
+ return 4;
+ default:
+ return 1;
+ }
+ return 1;
+}
+
+uint32_t ArchSpec::GetCodeByteSize() const {
+ switch (m_core) {
+ case eCore_kalimba3:
+ return 4;
+ case eCore_kalimba4:
+ return 1;
+ case eCore_kalimba5:
+ return 1;
+ default:
+ return 1;
+ }
+ return 1;
+}
+
+llvm::Triple::ArchType ArchSpec::GetMachine() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def)
+ return core_def->machine;
+
+ return llvm::Triple::UnknownArch;
+}
+
+const ConstString &ArchSpec::GetDistributionId() const {
+ return m_distribution_id;
+}
+
+void ArchSpec::SetDistributionId(const char *distribution_id) {
+ m_distribution_id.SetCString(distribution_id);
+}
+
+uint32_t ArchSpec::GetAddressByteSize() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def) {
+ if (core_def->machine == llvm::Triple::mips64 ||
+ core_def->machine == llvm::Triple::mips64el) {
+ // For N32/O32 applications Address size is 4 bytes.
+ if (m_flags & (eMIPSABI_N32 | eMIPSABI_O32))
+ return 4;
+ }
+ return core_def->addr_byte_size;
+ }
+ return 0;
+}
+
+ByteOrder ArchSpec::GetDefaultEndian() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def)
+ return core_def->default_byte_order;
+ return eByteOrderInvalid;
+}
+
+bool ArchSpec::CharIsSignedByDefault() const {
+ switch (m_triple.getArch()) {
+ default:
+ return true;
+
+ case llvm::Triple::aarch64:
+ case llvm::Triple::aarch64_be:
+ case llvm::Triple::arm:
+ case llvm::Triple::armeb:
+ case llvm::Triple::thumb:
+ case llvm::Triple::thumbeb:
+ return m_triple.isOSDarwin() || m_triple.isOSWindows();
+
+ case llvm::Triple::ppc:
+ case llvm::Triple::ppc64:
+ return m_triple.isOSDarwin();
+
+ case llvm::Triple::ppc64le:
+ case llvm::Triple::systemz:
+ case llvm::Triple::xcore:
+ return false;
+ }
+}
+
+lldb::ByteOrder ArchSpec::GetByteOrder() const {
+ if (m_byte_order == eByteOrderInvalid)
+ return GetDefaultEndian();
+ return m_byte_order;
+}
+
+//===----------------------------------------------------------------------===//
+// Mutators.
+
+bool ArchSpec::SetTriple(const llvm::Triple &triple) {
+ m_triple = triple;
+ UpdateCore();
+ return IsValid();
+}
+
+bool lldb_private::ParseMachCPUDashSubtypeTriple(llvm::StringRef triple_str,
+ ArchSpec &arch) {
+ // Accept "12-10" or "12.10" as cpu type/subtype
+ if (triple_str.empty())
+ return false;
+
+ size_t pos = triple_str.find_first_of("-.");
+ if (pos == llvm::StringRef::npos)
+ return false;
+
+ llvm::StringRef cpu_str = triple_str.substr(0, pos);
+ llvm::StringRef remainder = triple_str.substr(pos + 1);
+ if (cpu_str.empty() || remainder.empty())
+ return false;
+
+ llvm::StringRef sub_str;
+ llvm::StringRef vendor;
+ llvm::StringRef os;
+ std::tie(sub_str, remainder) = remainder.split('-');
+ std::tie(vendor, os) = remainder.split('-');
+
+ uint32_t cpu = 0;
+ uint32_t sub = 0;
+ if (cpu_str.getAsInteger(10, cpu) || sub_str.getAsInteger(10, sub))
+ return false;
+
+ if (!arch.SetArchitecture(eArchTypeMachO, cpu, sub))
+ return false;
+ if (!vendor.empty() && !os.empty()) {
+ arch.GetTriple().setVendorName(vendor);
+ arch.GetTriple().setOSName(os);
+ }
+
+ return true;
+}
+
+bool ArchSpec::SetTriple(llvm::StringRef triple) {
+ if (triple.empty()) {
+ Clear();
+ return false;
+ }
+
+ if (ParseMachCPUDashSubtypeTriple(triple, *this))
+ return true;
+
+ SetTriple(llvm::Triple(llvm::Triple::normalize(triple)));
+ return IsValid();
+}
+
+bool ArchSpec::ContainsOnlyArch(const llvm::Triple &normalized_triple) {
+ return !normalized_triple.getArchName().empty() &&
+ normalized_triple.getOSName().empty() &&
+ normalized_triple.getVendorName().empty() &&
+ normalized_triple.getEnvironmentName().empty();
+}
+
+void ArchSpec::MergeFrom(const ArchSpec &other) {
+ if (TripleVendorIsUnspecifiedUnknown() &&
+ !other.TripleVendorIsUnspecifiedUnknown())
+ GetTriple().setVendor(other.GetTriple().getVendor());
+ if (TripleOSIsUnspecifiedUnknown() && !other.TripleOSIsUnspecifiedUnknown())
+ GetTriple().setOS(other.GetTriple().getOS());
+ if (GetTriple().getArch() == llvm::Triple::UnknownArch) {
+ GetTriple().setArch(other.GetTriple().getArch());
+ UpdateCore();
+ }
+ if (GetTriple().getEnvironment() == llvm::Triple::UnknownEnvironment &&
+ !TripleVendorWasSpecified()) {
+ if (other.TripleVendorWasSpecified())
+ GetTriple().setEnvironment(other.GetTriple().getEnvironment());
+ }
+ // If this and other are both arm ArchSpecs and this ArchSpec is a generic
+ // "some kind of arm"
+ // spec but the other ArchSpec is a specific arm core, adopt the specific arm
+ // core.
+ if (GetTriple().getArch() == llvm::Triple::arm &&
+ other.GetTriple().getArch() == llvm::Triple::arm &&
+ IsCompatibleMatch(other) && GetCore() == ArchSpec::eCore_arm_generic &&
+ other.GetCore() != ArchSpec::eCore_arm_generic) {
+ m_core = other.GetCore();
+ CoreUpdated(true);
+ }
+ if (GetFlags() == 0) {
+ SetFlags(other.GetFlags());
+ }
+}
+
+bool ArchSpec::SetArchitecture(ArchitectureType arch_type, uint32_t cpu,
+ uint32_t sub, uint32_t os) {
+ m_core = kCore_invalid;
+ bool update_triple = true;
+ const ArchDefinition *arch_def = FindArchDefinition(arch_type);
+ if (arch_def) {
+ const ArchDefinitionEntry *arch_def_entry =
+ FindArchDefinitionEntry(arch_def, cpu, sub);
+ if (arch_def_entry) {
+ const CoreDefinition *core_def = FindCoreDefinition(arch_def_entry->core);
+ if (core_def) {
+ m_core = core_def->core;
+ update_triple = false;
+ // Always use the architecture name because it might be more descriptive
+ // than the architecture enum ("armv7" -> llvm::Triple::arm).
+ m_triple.setArchName(llvm::StringRef(core_def->name));
+ if (arch_type == eArchTypeMachO) {
+ m_triple.setVendor(llvm::Triple::Apple);
+
+ // Don't set the OS. It could be simulator, macosx, ios, watchos,
+ // tvos. We could
+ // get close with the cpu type - but we can't get it right all of the
+ // time. Better
+ // to leave this unset so other sections of code will set it when they
+ // have more
+ // information.
+ // NB: don't call m_triple.setOS (llvm::Triple::UnknownOS). That sets
+ // the OSName to
+ // "unknown" and the ArchSpec::TripleVendorWasSpecified() method says
+ // that any
+ // OSName setting means it was specified.
+ } else if (arch_type == eArchTypeELF) {
+ switch (os) {
+ case llvm::ELF::ELFOSABI_AIX:
+ m_triple.setOS(llvm::Triple::OSType::AIX);
+ break;
+ case llvm::ELF::ELFOSABI_FREEBSD:
+ m_triple.setOS(llvm::Triple::OSType::FreeBSD);
+ break;
+ case llvm::ELF::ELFOSABI_GNU:
+ m_triple.setOS(llvm::Triple::OSType::Linux);
+ break;
+ case llvm::ELF::ELFOSABI_NETBSD:
+ m_triple.setOS(llvm::Triple::OSType::NetBSD);
+ break;
+ case llvm::ELF::ELFOSABI_OPENBSD:
+ m_triple.setOS(llvm::Triple::OSType::OpenBSD);
+ break;
+ case llvm::ELF::ELFOSABI_SOLARIS:
+ m_triple.setOS(llvm::Triple::OSType::Solaris);
+ break;
+ }
+ } else if (arch_type == eArchTypeCOFF && os == llvm::Triple::Win32) {
+ m_triple.setVendor(llvm::Triple::PC);
+ m_triple.setOS(llvm::Triple::Win32);
+ } else {
+ m_triple.setVendor(llvm::Triple::UnknownVendor);
+ m_triple.setOS(llvm::Triple::UnknownOS);
+ }
+ // Fall back onto setting the machine type if the arch by name failed...
+ if (m_triple.getArch() == llvm::Triple::UnknownArch)
+ m_triple.setArch(core_def->machine);
+ }
+ }
+ }
+ CoreUpdated(update_triple);
+ return IsValid();
+}
+
+uint32_t ArchSpec::GetMinimumOpcodeByteSize() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def)
+ return core_def->min_opcode_byte_size;
+ return 0;
+}
+
+uint32_t ArchSpec::GetMaximumOpcodeByteSize() const {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def)
+ return core_def->max_opcode_byte_size;
+ return 0;
+}
+
+bool ArchSpec::IsExactMatch(const ArchSpec &rhs) const {
+ return IsEqualTo(rhs, true);
+}
+
+bool ArchSpec::IsCompatibleMatch(const ArchSpec &rhs) const {
+ return IsEqualTo(rhs, false);
+}
+
+static bool isCompatibleEnvironment(llvm::Triple::EnvironmentType lhs,
+ llvm::Triple::EnvironmentType rhs) {
+ if (lhs == rhs)
+ return true;
+
+ // If any of the environment is unknown then they are compatible
+ if (lhs == llvm::Triple::UnknownEnvironment ||
+ rhs == llvm::Triple::UnknownEnvironment)
+ return true;
+
+ // If one of the environment is Android and the other one is EABI then they
+ // are considered to
+ // be compatible. This is required as a workaround for shared libraries
+ // compiled for Android
+ // without the NOTE section indicating that they are using the Android ABI.
+ if ((lhs == llvm::Triple::Android && rhs == llvm::Triple::EABI) ||
+ (rhs == llvm::Triple::Android && lhs == llvm::Triple::EABI) ||
+ (lhs == llvm::Triple::GNUEABI && rhs == llvm::Triple::EABI) ||
+ (rhs == llvm::Triple::GNUEABI && lhs == llvm::Triple::EABI) ||
+ (lhs == llvm::Triple::GNUEABIHF && rhs == llvm::Triple::EABIHF) ||
+ (rhs == llvm::Triple::GNUEABIHF && lhs == llvm::Triple::EABIHF))
+ return true;
+
+ return false;
+}
+
+bool ArchSpec::IsEqualTo(const ArchSpec &rhs, bool exact_match) const {
+ // explicitly ignoring m_distribution_id in this method.
+
+ if (GetByteOrder() != rhs.GetByteOrder())
+ return false;
+
+ const ArchSpec::Core lhs_core = GetCore();
+ const ArchSpec::Core rhs_core = rhs.GetCore();
+
+ const bool core_match = cores_match(lhs_core, rhs_core, true, exact_match);
+
+ if (core_match) {
+ const llvm::Triple &lhs_triple = GetTriple();
+ const llvm::Triple &rhs_triple = rhs.GetTriple();
+
+ const llvm::Triple::VendorType lhs_triple_vendor = lhs_triple.getVendor();
+ const llvm::Triple::VendorType rhs_triple_vendor = rhs_triple.getVendor();
+ if (lhs_triple_vendor != rhs_triple_vendor) {
+ const bool rhs_vendor_specified = rhs.TripleVendorWasSpecified();
+ const bool lhs_vendor_specified = TripleVendorWasSpecified();
+ // Both architectures had the vendor specified, so if they aren't
+ // equal then we return false
+ if (rhs_vendor_specified && lhs_vendor_specified)
+ return false;
+
+ // Only fail if both vendor types are not unknown
+ if (lhs_triple_vendor != llvm::Triple::UnknownVendor &&
+ rhs_triple_vendor != llvm::Triple::UnknownVendor)
+ return false;
+ }
+
+ const llvm::Triple::OSType lhs_triple_os = lhs_triple.getOS();
+ const llvm::Triple::OSType rhs_triple_os = rhs_triple.getOS();
+ if (lhs_triple_os != rhs_triple_os) {
+ const bool rhs_os_specified = rhs.TripleOSWasSpecified();
+ const bool lhs_os_specified = TripleOSWasSpecified();
+ // Both architectures had the OS specified, so if they aren't
+ // equal then we return false
+ if (rhs_os_specified && lhs_os_specified)
+ return false;
+
+ // Only fail if both os types are not unknown
+ if (lhs_triple_os != llvm::Triple::UnknownOS &&
+ rhs_triple_os != llvm::Triple::UnknownOS)
+ return false;
+ }
+
+ const llvm::Triple::EnvironmentType lhs_triple_env =
+ lhs_triple.getEnvironment();
+ const llvm::Triple::EnvironmentType rhs_triple_env =
+ rhs_triple.getEnvironment();
+
+ if (!isCompatibleEnvironment(lhs_triple_env, rhs_triple_env))
+ return false;
+ return true;
+ }
+ return false;
+}
+
+void ArchSpec::UpdateCore() {
+ llvm::StringRef arch_name(m_triple.getArchName());
+ const CoreDefinition *core_def = FindCoreDefinition(arch_name);
+ if (core_def) {
+ m_core = core_def->core;
+ // Set the byte order to the default byte order for an architecture.
+ // This can be modified if needed for cases when cores handle both
+ // big and little endian
+ m_byte_order = core_def->default_byte_order;
+ } else {
+ Clear();
+ }
+}
+
+//===----------------------------------------------------------------------===//
+// Helper methods.
+
+void ArchSpec::CoreUpdated(bool update_triple) {
+ const CoreDefinition *core_def = FindCoreDefinition(m_core);
+ if (core_def) {
+ if (update_triple)
+ m_triple = llvm::Triple(core_def->name, "unknown", "unknown");
+ m_byte_order = core_def->default_byte_order;
+ } else {
+ if (update_triple)
+ m_triple = llvm::Triple();
+ m_byte_order = eByteOrderInvalid;
+ }
+}
+
+//===----------------------------------------------------------------------===//
+// Operators.
+
+static bool cores_match(const ArchSpec::Core core1, const ArchSpec::Core core2,
+ bool try_inverse, bool enforce_exact_match) {
+ if (core1 == core2)
+ return true;
+
+ switch (core1) {
+ case ArchSpec::kCore_any:
+ return true;
+
+ case ArchSpec::eCore_arm_generic:
+ if (enforce_exact_match)
+ break;
+ LLVM_FALLTHROUGH;
+ case ArchSpec::kCore_arm_any:
+ if (core2 >= ArchSpec::kCore_arm_first && core2 <= ArchSpec::kCore_arm_last)
+ return true;
+ if (core2 >= ArchSpec::kCore_thumb_first &&
+ core2 <= ArchSpec::kCore_thumb_last)
+ return true;
+ if (core2 == ArchSpec::kCore_arm_any)
+ return true;
+ break;
+
+ case ArchSpec::kCore_x86_32_any:
+ if ((core2 >= ArchSpec::kCore_x86_32_first &&
+ core2 <= ArchSpec::kCore_x86_32_last) ||
+ (core2 == ArchSpec::kCore_x86_32_any))
+ return true;
+ break;
+
+ case ArchSpec::kCore_x86_64_any:
+ if ((core2 >= ArchSpec::kCore_x86_64_first &&
+ core2 <= ArchSpec::kCore_x86_64_last) ||
+ (core2 == ArchSpec::kCore_x86_64_any))
+ return true;
+ break;
+
+ case ArchSpec::kCore_ppc_any:
+ if ((core2 >= ArchSpec::kCore_ppc_first &&
+ core2 <= ArchSpec::kCore_ppc_last) ||
+ (core2 == ArchSpec::kCore_ppc_any))
+ return true;
+ break;
+
+ case ArchSpec::kCore_ppc64_any:
+ if ((core2 >= ArchSpec::kCore_ppc64_first &&
+ core2 <= ArchSpec::kCore_ppc64_last) ||
+ (core2 == ArchSpec::kCore_ppc64_any))
+ return true;
+ break;
+
+ case ArchSpec::eCore_arm_armv6m:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_arm_generic)
+ return true;
+ try_inverse = false;
+ if (core2 == ArchSpec::eCore_arm_armv7)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv6m)
+ return true;
+ }
+ break;
+
+ case ArchSpec::kCore_hexagon_any:
+ if ((core2 >= ArchSpec::kCore_hexagon_first &&
+ core2 <= ArchSpec::kCore_hexagon_last) ||
+ (core2 == ArchSpec::kCore_hexagon_any))
+ return true;
+ break;
+
+ // v. https://en.wikipedia.org/wiki/ARM_Cortex-M#Silicon_customization
+ // Cortex-M0 - ARMv6-M - armv6m
+ // Cortex-M3 - ARMv7-M - armv7m
+ // Cortex-M4 - ARMv7E-M - armv7em
+ case ArchSpec::eCore_arm_armv7em:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_arm_generic)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv7m)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv6m)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv7)
+ return true;
+ try_inverse = true;
+ }
+ break;
+
+ // v. https://en.wikipedia.org/wiki/ARM_Cortex-M#Silicon_customization
+ // Cortex-M0 - ARMv6-M - armv6m
+ // Cortex-M3 - ARMv7-M - armv7m
+ // Cortex-M4 - ARMv7E-M - armv7em
+ case ArchSpec::eCore_arm_armv7m:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_arm_generic)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv6m)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv7)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv7em)
+ return true;
+ try_inverse = true;
+ }
+ break;
+
+ case ArchSpec::eCore_arm_armv7f:
+ case ArchSpec::eCore_arm_armv7k:
+ case ArchSpec::eCore_arm_armv7s:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_arm_generic)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv7)
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_x86_64_x86_64h:
+ if (!enforce_exact_match) {
+ try_inverse = false;
+ if (core2 == ArchSpec::eCore_x86_64_x86_64)
+ return true;
+ }
+ break;
+
+ case ArchSpec::eCore_arm_armv8:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_arm_arm64)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_aarch64)
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_arm_aarch64:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_arm_arm64)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv8)
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_arm_arm64:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_arm_aarch64)
+ return true;
+ if (core2 == ArchSpec::eCore_arm_armv8)
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_mips32:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32_first &&
+ core2 <= ArchSpec::kCore_mips32_last)
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_mips32el:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32el_first &&
+ core2 <= ArchSpec::kCore_mips32el_last)
+ return true;
+ try_inverse = true;
+ }
+ break;
+
+ case ArchSpec::eCore_mips64:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32_first &&
+ core2 <= ArchSpec::kCore_mips32_last)
+ return true;
+ if (core2 >= ArchSpec::kCore_mips64_first &&
+ core2 <= ArchSpec::kCore_mips64_last)
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_mips64el:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32el_first &&
+ core2 <= ArchSpec::kCore_mips32el_last)
+ return true;
+ if (core2 >= ArchSpec::kCore_mips64el_first &&
+ core2 <= ArchSpec::kCore_mips64el_last)
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_mips64r2:
+ case ArchSpec::eCore_mips64r3:
+ case ArchSpec::eCore_mips64r5:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32_first && core2 <= (core1 - 10))
+ return true;
+ if (core2 >= ArchSpec::kCore_mips64_first && core2 <= (core1 - 1))
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_mips64r2el:
+ case ArchSpec::eCore_mips64r3el:
+ case ArchSpec::eCore_mips64r5el:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32el_first && core2 <= (core1 - 10))
+ return true;
+ if (core2 >= ArchSpec::kCore_mips64el_first && core2 <= (core1 - 1))
+ return true;
+ try_inverse = false;
+ }
+ break;
+
+ case ArchSpec::eCore_mips32r2:
+ case ArchSpec::eCore_mips32r3:
+ case ArchSpec::eCore_mips32r5:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32_first && core2 <= core1)
+ return true;
+ }
+ break;
+
+ case ArchSpec::eCore_mips32r2el:
+ case ArchSpec::eCore_mips32r3el:
+ case ArchSpec::eCore_mips32r5el:
+ if (!enforce_exact_match) {
+ if (core2 >= ArchSpec::kCore_mips32el_first && core2 <= core1)
+ return true;
+ }
+ break;
+
+ case ArchSpec::eCore_mips32r6:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_mips32 || core2 == ArchSpec::eCore_mips32r6)
+ return true;
+ }
+ break;
+
+ case ArchSpec::eCore_mips32r6el:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_mips32el ||
+ core2 == ArchSpec::eCore_mips32r6el)
+ return true;
+ }
+ break;
+
+ case ArchSpec::eCore_mips64r6:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_mips32 || core2 == ArchSpec::eCore_mips32r6)
+ return true;
+ if (core2 == ArchSpec::eCore_mips64 || core2 == ArchSpec::eCore_mips64r6)
+ return true;
+ }
+ break;
+
+ case ArchSpec::eCore_mips64r6el:
+ if (!enforce_exact_match) {
+ if (core2 == ArchSpec::eCore_mips32el ||
+ core2 == ArchSpec::eCore_mips32r6el)
+ return true;
+ if (core2 == ArchSpec::eCore_mips64el ||
+ core2 == ArchSpec::eCore_mips64r6el)
+ return true;
+ }
+ break;
+
+ default:
+ break;
+ }
+ if (try_inverse)
+ return cores_match(core2, core1, false, enforce_exact_match);
+ return false;
+}
+
+bool lldb_private::operator<(const ArchSpec &lhs, const ArchSpec &rhs) {
+ const ArchSpec::Core lhs_core = lhs.GetCore();
+ const ArchSpec::Core rhs_core = rhs.GetCore();
+ return lhs_core < rhs_core;
+}
+
+bool ArchSpec::IsFullySpecifiedTriple() const {
+ const auto &user_specified_triple = GetTriple();
+
+ bool user_triple_fully_specified = false;
+
+ if ((user_specified_triple.getOS() != llvm::Triple::UnknownOS) ||
+ TripleOSWasSpecified()) {
+ if ((user_specified_triple.getVendor() != llvm::Triple::UnknownVendor) ||
+ TripleVendorWasSpecified()) {
+ const unsigned unspecified = 0;
+ if (user_specified_triple.getOSMajorVersion() != unspecified) {
+ user_triple_fully_specified = true;
+ }
+ }
+ }
+
+ return user_triple_fully_specified;
+}
+
+void ArchSpec::PiecewiseTripleCompare(
+ const ArchSpec &other, bool &arch_different, bool &vendor_different,
+ bool &os_different, bool &os_version_different, bool &env_different) const {
+ const llvm::Triple &me(GetTriple());
+ const llvm::Triple &them(other.GetTriple());
+
+ arch_different = (me.getArch() != them.getArch());
+
+ vendor_different = (me.getVendor() != them.getVendor());
+
+ os_different = (me.getOS() != them.getOS());
+
+ os_version_different = (me.getOSMajorVersion() != them.getOSMajorVersion());
+
+ env_different = (me.getEnvironment() != them.getEnvironment());
+}
+
+bool ArchSpec::IsAlwaysThumbInstructions() const {
+ std::string Status;
+ if (GetTriple().getArch() == llvm::Triple::arm ||
+ GetTriple().getArch() == llvm::Triple::thumb) {
+ // v. https://en.wikipedia.org/wiki/ARM_Cortex-M
+ //
+ // Cortex-M0 through Cortex-M7 are ARM processor cores which can only
+ // execute thumb instructions. We map the cores to arch names like this:
+ //
+ // Cortex-M0, Cortex-M0+, Cortex-M1: armv6m
+ // Cortex-M3: armv7m
+ // Cortex-M4, Cortex-M7: armv7em
+
+ if (GetCore() == ArchSpec::Core::eCore_arm_armv7m ||
+ GetCore() == ArchSpec::Core::eCore_arm_armv7em ||
+ GetCore() == ArchSpec::Core::eCore_arm_armv6m) {
+ return true;
+ }
+ }
+ return false;
+}
+
+void ArchSpec::DumpTriple(Stream &s) const {
+ const llvm::Triple &triple = GetTriple();
+ llvm::StringRef arch_str = triple.getArchName();
+ llvm::StringRef vendor_str = triple.getVendorName();
+ llvm::StringRef os_str = triple.getOSName();
+ llvm::StringRef environ_str = triple.getEnvironmentName();
+
+ s.Printf("%s-%s-%s", arch_str.empty() ? "*" : arch_str.str().c_str(),
+ vendor_str.empty() ? "*" : vendor_str.str().c_str(),
+ os_str.empty() ? "*" : os_str.str().c_str());
+
+ if (!environ_str.empty())
+ s.Printf("-%s", environ_str.str().c_str());
+}
diff --git a/source/Utility/CMakeLists.txt b/source/Utility/CMakeLists.txt
index 78598562692bb..1a0fb6f86c574 100644
--- a/source/Utility/CMakeLists.txt
+++ b/source/Utility/CMakeLists.txt
@@ -1,4 +1,46 @@
+set(LLDB_SYSTEM_LIBS)
+
+# Windows-only libraries
+if ( CMAKE_SYSTEM_NAME MATCHES "Windows" )
+ list(APPEND LLDB_SYSTEM_LIBS
+ ws2_32
+ rpcrt4
+ )
+endif ()
+
+if (NOT LLDB_DISABLE_LIBEDIT)
+ list(APPEND LLDB_SYSTEM_LIBS edit)
+endif()
+if (NOT LLDB_DISABLE_CURSES)
+ list(APPEND LLDB_SYSTEM_LIBS ${CURSES_LIBRARIES})
+ if(LLVM_ENABLE_TERMINFO AND HAVE_TERMINFO)
+ list(APPEND LLDB_SYSTEM_LIBS ${TERMINFO_LIBS})
+ endif()
+endif()
+
+if (NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB )
+ list(APPEND LLDB_SYSTEM_LIBS atomic)
+endif()
+
+list(APPEND LLDB_SYSTEM_LIBS ${Backtrace_LIBRARY})
+
+if (NOT LLDB_DISABLE_PYTHON AND NOT LLVM_BUILD_STATIC)
+ list(APPEND LLDB_SYSTEM_LIBS ${PYTHON_LIBRARIES})
+endif()
+
+list(APPEND LLDB_SYSTEM_LIBS ${system_libs})
+
+if (LLVM_BUILD_STATIC)
+ if (NOT LLDB_DISABLE_PYTHON)
+ list(APPEND LLDB_SYSTEM_LIBS python2.7 util)
+ endif()
+ if (NOT LLDB_DISABLE_CURSES)
+ list(APPEND LLDB_SYSTEM_LIBS gpm)
+ endif()
+endif()
+
add_lldb_library(lldbUtility
+ ArchSpec.cpp
Baton.cpp
Connection.cpp
ConstString.cpp
@@ -29,7 +71,6 @@ add_lldb_library(lldbUtility
StringLexer.cpp
StringList.cpp
StructuredData.cpp
- TaskPool.cpp
TildeExpressionResolver.cpp
Timer.cpp
UserID.cpp
@@ -39,7 +80,8 @@ add_lldb_library(lldbUtility
VMRange.cpp
LINK_LIBS
- # lldbUtility cannot have any dependencies
+ ${LLDB_SYSTEM_LIBS}
+ # lldbUtility does not depend on other LLDB libraries
LINK_COMPONENTS
BinaryFormat
diff --git a/source/Utility/DataEncoder.cpp b/source/Utility/DataEncoder.cpp
index f7ce46889d2f4..433a15bc95230 100644
--- a/source/Utility/DataEncoder.cpp
+++ b/source/Utility/DataEncoder.cpp
@@ -12,6 +12,7 @@
#include "lldb/Utility/DataBuffer.h"
#include "lldb/Utility/Endian.h"
+#include "llvm/Support/Endian.h"
#include "llvm/Support/ErrorHandling.h" // for llvm_unreachable
#include "llvm/Support/MathExtras.h"
@@ -22,36 +23,7 @@
using namespace lldb;
using namespace lldb_private;
-
-static inline void WriteInt16(unsigned char *ptr, unsigned offset,
- uint16_t value) {
- *(uint16_t *)(ptr + offset) = value;
-}
-
-static inline void WriteInt32(unsigned char *ptr, unsigned offset,
- uint32_t value) {
- *(uint32_t *)(ptr + offset) = value;
-}
-
-static inline void WriteInt64(unsigned char *ptr, unsigned offset,
- uint64_t value) {
- *(uint64_t *)(ptr + offset) = value;
-}
-
-static inline void WriteSwappedInt16(unsigned char *ptr, unsigned offset,
- uint16_t value) {
- *(uint16_t *)(ptr + offset) = llvm::ByteSwap_16(value);
-}
-
-static inline void WriteSwappedInt32(unsigned char *ptr, unsigned offset,
- uint32_t value) {
- *(uint32_t *)(ptr + offset) = llvm::ByteSwap_32(value);
-}
-
-static inline void WriteSwappedInt64(unsigned char *ptr, unsigned offset,
- uint64_t value) {
- *(uint64_t *)(ptr + offset) = llvm::ByteSwap_64(value);
-}
+using namespace llvm::support::endian;
//----------------------------------------------------------------------
// Default constructor.
@@ -202,9 +174,9 @@ uint32_t DataEncoder::PutU8(uint32_t offset, uint8_t value) {
uint32_t DataEncoder::PutU16(uint32_t offset, uint16_t value) {
if (ValidOffsetForDataOfSize(offset, sizeof(value))) {
if (m_byte_order != endian::InlHostByteOrder())
- WriteSwappedInt16(m_start, offset, value);
+ write16be(m_start + offset, value);
else
- WriteInt16(m_start, offset, value);
+ write16le(m_start + offset, value);
return offset + sizeof(value);
}
@@ -214,9 +186,9 @@ uint32_t DataEncoder::PutU16(uint32_t offset, uint16_t value) {
uint32_t DataEncoder::PutU32(uint32_t offset, uint32_t value) {
if (ValidOffsetForDataOfSize(offset, sizeof(value))) {
if (m_byte_order != endian::InlHostByteOrder())
- WriteSwappedInt32(m_start, offset, value);
+ write32be(m_start + offset, value);
else
- WriteInt32(m_start, offset, value);
+ write32le(m_start + offset, value);
return offset + sizeof(value);
}
@@ -226,9 +198,9 @@ uint32_t DataEncoder::PutU32(uint32_t offset, uint32_t value) {
uint32_t DataEncoder::PutU64(uint32_t offset, uint64_t value) {
if (ValidOffsetForDataOfSize(offset, sizeof(value))) {
if (m_byte_order != endian::InlHostByteOrder())
- WriteSwappedInt64(m_start, offset, value);
+ write64be(m_start + offset, value);
else
- WriteInt64(m_start, offset, value);
+ write64le(m_start + offset, value);
return offset + sizeof(value);
}
diff --git a/source/Utility/DataExtractor.cpp b/source/Utility/DataExtractor.cpp
index 008aff220945b..84c5f81915212 100644
--- a/source/Utility/DataExtractor.cpp
+++ b/source/Utility/DataExtractor.cpp
@@ -17,6 +17,7 @@
#include "lldb/Utility/DataBuffer.h"
#include "lldb/Utility/DataBufferHeap.h"
#include "lldb/Utility/Endian.h"
+#include "lldb/Utility/LLDBAssert.h"
#include "lldb/Utility/Log.h"
#include "lldb/Utility/Stream.h"
#include "lldb/Utility/StreamString.h"
@@ -105,6 +106,20 @@ static inline uint64_t ReadSwapInt64(const void *ptr) {
return llvm::ByteSwap_64(value);
}
+static inline uint64_t ReadMaxInt64(const uint8_t *data, size_t byte_size,
+ ByteOrder byte_order) {
+ uint64_t res = 0;
+ if (byte_order == eByteOrderBig)
+ for (size_t i = 0; i < byte_size; ++i)
+ res = (res << 8) | data[i];
+ else {
+ assert(byte_order == eByteOrderLittle);
+ for (size_t i = 0; i < byte_size; ++i)
+ res = (res << 8) | data[byte_size - 1 - i];
+ }
+ return res;
+}
+
DataExtractor::DataExtractor()
: m_start(nullptr), m_end(nullptr),
m_byte_order(endian::InlHostByteOrder()), m_addr_size(sizeof(void *)),
@@ -551,107 +566,59 @@ void *DataExtractor::GetU64(offset_t *offset_ptr, void *void_dst,
return nullptr;
}
-//----------------------------------------------------------------------
-// Extract a single integer value from the data and update the offset
-// pointed to by "offset_ptr". The size of the extracted integer
-// is specified by the "byte_size" argument. "byte_size" should have
-// a value between 1 and 4 since the return value is only 32 bits
-// wide. Any "byte_size" values less than 1 or greater than 4 will
-// result in nothing being extracted, and zero being returned.
-//
-// RETURNS the integer value that was extracted, or zero on failure.
-//----------------------------------------------------------------------
uint32_t DataExtractor::GetMaxU32(offset_t *offset_ptr,
size_t byte_size) const {
- switch (byte_size) {
- case 1:
- return GetU8(offset_ptr);
- break;
- case 2:
- return GetU16(offset_ptr);
- break;
- case 4:
- return GetU32(offset_ptr);
- break;
- default:
- assert(false && "GetMaxU32 unhandled case!");
- break;
- }
- return 0;
+ lldbassert(byte_size > 0 && byte_size <= 4 && "GetMaxU32 invalid byte_size!");
+ return GetMaxU64(offset_ptr, byte_size);
}
-//----------------------------------------------------------------------
-// Extract a single integer value from the data and update the offset
-// pointed to by "offset_ptr". The size of the extracted integer
-// is specified by the "byte_size" argument. "byte_size" should have
-// a value >= 1 and <= 8 since the return value is only 64 bits
-// wide. Any "byte_size" values less than 1 or greater than 8 will
-// result in nothing being extracted, and zero being returned.
-//
-// RETURNS the integer value that was extracted, or zero on failure.
-//----------------------------------------------------------------------
-uint64_t DataExtractor::GetMaxU64(offset_t *offset_ptr, size_t size) const {
- switch (size) {
+uint64_t DataExtractor::GetMaxU64(offset_t *offset_ptr,
+ size_t byte_size) const {
+ lldbassert(byte_size > 0 && byte_size <= 8 && "GetMaxU64 invalid byte_size!");
+ switch (byte_size) {
case 1:
return GetU8(offset_ptr);
- break;
case 2:
return GetU16(offset_ptr);
- break;
case 4:
return GetU32(offset_ptr);
- break;
case 8:
return GetU64(offset_ptr);
- break;
- default:
- assert(false && "GetMax64 unhandled case!");
- break;
+ default: {
+ // General case.
+ const uint8_t *data =
+ static_cast<const uint8_t *>(GetData(offset_ptr, byte_size));
+ if (data == nullptr)
+ return 0;
+ return ReadMaxInt64(data, byte_size, m_byte_order);
+ }
}
return 0;
}
uint64_t DataExtractor::GetMaxU64_unchecked(offset_t *offset_ptr,
- size_t size) const {
- switch (size) {
+ size_t byte_size) const {
+ switch (byte_size) {
case 1:
return GetU8_unchecked(offset_ptr);
- break;
case 2:
return GetU16_unchecked(offset_ptr);
- break;
case 4:
return GetU32_unchecked(offset_ptr);
- break;
case 8:
return GetU64_unchecked(offset_ptr);
- break;
- default:
- assert(false && "GetMax64 unhandled case!");
- break;
+ default: {
+ uint64_t res = ReadMaxInt64(&m_start[*offset_ptr], byte_size, m_byte_order);
+ *offset_ptr += byte_size;
+ return res;
+ }
}
return 0;
}
-int64_t DataExtractor::GetMaxS64(offset_t *offset_ptr, size_t size) const {
- switch (size) {
- case 1:
- return (int8_t)GetU8(offset_ptr);
- break;
- case 2:
- return (int16_t)GetU16(offset_ptr);
- break;
- case 4:
- return (int32_t)GetU32(offset_ptr);
- break;
- case 8:
- return (int64_t)GetU64(offset_ptr);
- break;
- default:
- assert(false && "GetMax64 unhandled case!");
- break;
- }
- return 0;
+int64_t DataExtractor::GetMaxS64(offset_t *offset_ptr, size_t byte_size) const {
+ uint64_t u64 = GetMaxU64(offset_ptr, byte_size);
+ return llvm::SignExtend64(u64, 8 * byte_size);
}
uint64_t DataExtractor::GetMaxU64Bitfield(offset_t *offset_ptr, size_t size,
diff --git a/source/Utility/FileSpec.cpp b/source/Utility/FileSpec.cpp
index 3c4e3407ddf65..72f86917b813b 100644
--- a/source/Utility/FileSpec.cpp
+++ b/source/Utility/FileSpec.cpp
@@ -700,18 +700,18 @@ void FileSpec::EnumerateDirectory(llvm::StringRef dir_path,
fs::recursive_directory_iterator End;
for (; Iter != End && !EC; Iter.increment(EC)) {
const auto &Item = *Iter;
- fs::file_status Status;
- if ((EC = Item.status(Status)))
+ llvm::ErrorOr<fs::basic_file_status> Status = Item.status();
+ if (!Status)
break;
- if (!find_files && fs::is_regular_file(Status))
+ if (!find_files && fs::is_regular_file(*Status))
continue;
- if (!find_directories && fs::is_directory(Status))
+ if (!find_directories && fs::is_directory(*Status))
continue;
- if (!find_other && fs::is_other(Status))
+ if (!find_other && fs::is_other(*Status))
continue;
FileSpec Spec(Item.path(), false);
- auto Result = callback(callback_baton, Status.type(), Spec);
+ auto Result = callback(callback_baton, Status->type(), Spec);
if (Result == eEnumerateDirectoryResultQuit)
return;
if (Result == eEnumerateDirectoryResultNext) {
diff --git a/source/Utility/JSON.cpp b/source/Utility/JSON.cpp
index 1520bc7c47ec7..9049f596ab9a5 100644
--- a/source/Utility/JSON.cpp
+++ b/source/Utility/JSON.cpp
@@ -22,7 +22,7 @@
using namespace lldb_private;
std::string JSONString::json_string_quote_metachars(const std::string &s) {
- if (s.find('"') == std::string::npos)
+ if (s.find_first_of("\\\n\"") == std::string::npos)
return s;
std::string output;
@@ -30,8 +30,9 @@ std::string JSONString::json_string_quote_metachars(const std::string &s) {
const char *s_chars = s.c_str();
for (size_t i = 0; i < s_size; i++) {
unsigned char ch = *(s_chars + i);
- if (ch == '"') {
+ if (ch == '"' || ch == '\\' || ch == '\n') {
output.push_back('\\');
+ if (ch == '\n') ch = 'n';
}
output.push_back(ch);
}
diff --git a/source/Utility/Log.cpp b/source/Utility/Log.cpp
index a80b106838bc5..f247124f8d632 100644
--- a/source/Utility/Log.cpp
+++ b/source/Utility/Log.cpp
@@ -32,6 +32,7 @@
#include <process.h> // for getpid
#else
#include <unistd.h>
+#include <pthread.h>
#endif
using namespace lldb_private;
@@ -181,6 +182,13 @@ void Log::Warning(const char *format, ...) {
Printf("warning: %s", Content.c_str());
}
+void Log::Initialize() {
+#ifdef LLVM_ON_UNIX
+ pthread_atfork(nullptr, nullptr, &Log::DisableLoggingChild);
+#endif
+ InitializeLldbChannel();
+}
+
void Log::Register(llvm::StringRef name, Channel &channel) {
auto iter = g_channel_map->try_emplace(name, channel);
assert(iter.second == true);
@@ -279,8 +287,7 @@ void Log::WriteHeader(llvm::raw_ostream &OS, llvm::StringRef file,
if (options.Test(LLDB_LOG_OPTION_PREPEND_THREAD_NAME)) {
llvm::SmallString<32> thread_name;
llvm::get_thread_name(thread_name);
- if (!thread_name.empty())
- OS << thread_name;
+ OS << llvm::formatv("{0,-16} ", thread_name);
}
if (options.Test(LLDB_LOG_OPTION_BACKTRACE))
@@ -321,3 +328,11 @@ void Log::Format(llvm::StringRef file, llvm::StringRef function,
message << payload << "\n";
WriteMessage(message.str());
}
+
+void Log::DisableLoggingChild() {
+ // Disable logging by clearing out the atomic variable after forking -- if we
+ // forked while another thread held the channel mutex, we would deadlock when
+ // trying to write to the log.
+ for (auto &c: *g_channel_map)
+ c.second.m_channel.log_ptr.store(nullptr, std::memory_order_relaxed);
+}
diff --git a/source/Utility/Logging.cpp b/source/Utility/Logging.cpp
index 0bd6d6692e37d..c9a6ef1bd1eae 100644
--- a/source/Utility/Logging.cpp
+++ b/source/Utility/Logging.cpp
@@ -51,7 +51,7 @@ static constexpr Log::Category g_categories[] = {
static Log::Channel g_log_channel(g_categories, LIBLLDB_LOG_DEFAULT);
-void lldb_private::InitializeLog() {
+void lldb_private::InitializeLldbChannel() {
Log::Register("lldb", g_log_channel);
}
diff --git a/source/Utility/PPC64LE_DWARF_Registers.h b/source/Utility/PPC64LE_DWARF_Registers.h
new file mode 100644
index 0000000000000..1a7503790e5da
--- /dev/null
+++ b/source/Utility/PPC64LE_DWARF_Registers.h
@@ -0,0 +1,194 @@
+//===-- PPC64LE_DWARF_Registers.h -------------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef utility_PPC64LE_DWARF_Registers_h_
+#define utility_PPC64LE_DWARF_Registers_h_
+
+#include "lldb/lldb-private.h"
+
+namespace ppc64le_dwarf {
+
+enum {
+ dwarf_r0_ppc64le = 0,
+ dwarf_r1_ppc64le,
+ dwarf_r2_ppc64le,
+ dwarf_r3_ppc64le,
+ dwarf_r4_ppc64le,
+ dwarf_r5_ppc64le,
+ dwarf_r6_ppc64le,
+ dwarf_r7_ppc64le,
+ dwarf_r8_ppc64le,
+ dwarf_r9_ppc64le,
+ dwarf_r10_ppc64le,
+ dwarf_r11_ppc64le,
+ dwarf_r12_ppc64le,
+ dwarf_r13_ppc64le,
+ dwarf_r14_ppc64le,
+ dwarf_r15_ppc64le,
+ dwarf_r16_ppc64le,
+ dwarf_r17_ppc64le,
+ dwarf_r18_ppc64le,
+ dwarf_r19_ppc64le,
+ dwarf_r20_ppc64le,
+ dwarf_r21_ppc64le,
+ dwarf_r22_ppc64le,
+ dwarf_r23_ppc64le,
+ dwarf_r24_ppc64le,
+ dwarf_r25_ppc64le,
+ dwarf_r26_ppc64le,
+ dwarf_r27_ppc64le,
+ dwarf_r28_ppc64le,
+ dwarf_r29_ppc64le,
+ dwarf_r30_ppc64le,
+ dwarf_r31_ppc64le,
+ dwarf_f0_ppc64le,
+ dwarf_f1_ppc64le,
+ dwarf_f2_ppc64le,
+ dwarf_f3_ppc64le,
+ dwarf_f4_ppc64le,
+ dwarf_f5_ppc64le,
+ dwarf_f6_ppc64le,
+ dwarf_f7_ppc64le,
+ dwarf_f8_ppc64le,
+ dwarf_f9_ppc64le,
+ dwarf_f10_ppc64le,
+ dwarf_f11_ppc64le,
+ dwarf_f12_ppc64le,
+ dwarf_f13_ppc64le,
+ dwarf_f14_ppc64le,
+ dwarf_f15_ppc64le,
+ dwarf_f16_ppc64le,
+ dwarf_f17_ppc64le,
+ dwarf_f18_ppc64le,
+ dwarf_f19_ppc64le,
+ dwarf_f20_ppc64le,
+ dwarf_f21_ppc64le,
+ dwarf_f22_ppc64le,
+ dwarf_f23_ppc64le,
+ dwarf_f24_ppc64le,
+ dwarf_f25_ppc64le,
+ dwarf_f26_ppc64le,
+ dwarf_f27_ppc64le,
+ dwarf_f28_ppc64le,
+ dwarf_f29_ppc64le,
+ dwarf_f30_ppc64le,
+ dwarf_f31_ppc64le,
+ dwarf_lr_ppc64le = 65,
+ dwarf_ctr_ppc64le,
+ dwarf_cr_ppc64le = 68,
+ dwarf_xer_ppc64le = 76,
+ dwarf_vr0_ppc64le,
+ dwarf_vr1_ppc64le,
+ dwarf_vr2_ppc64le,
+ dwarf_vr3_ppc64le,
+ dwarf_vr4_ppc64le,
+ dwarf_vr5_ppc64le,
+ dwarf_vr6_ppc64le,
+ dwarf_vr7_ppc64le,
+ dwarf_vr8_ppc64le,
+ dwarf_vr9_ppc64le,
+ dwarf_vr10_ppc64le,
+ dwarf_vr11_ppc64le,
+ dwarf_vr12_ppc64le,
+ dwarf_vr13_ppc64le,
+ dwarf_vr14_ppc64le,
+ dwarf_vr15_ppc64le,
+ dwarf_vr16_ppc64le,
+ dwarf_vr17_ppc64le,
+ dwarf_vr18_ppc64le,
+ dwarf_vr19_ppc64le,
+ dwarf_vr20_ppc64le,
+ dwarf_vr21_ppc64le,
+ dwarf_vr22_ppc64le,
+ dwarf_vr23_ppc64le,
+ dwarf_vr24_ppc64le,
+ dwarf_vr25_ppc64le,
+ dwarf_vr26_ppc64le,
+ dwarf_vr27_ppc64le,
+ dwarf_vr28_ppc64le,
+ dwarf_vr29_ppc64le,
+ dwarf_vr30_ppc64le,
+ dwarf_vr31_ppc64le,
+ dwarf_vscr_ppc64le = 110,
+ dwarf_vrsave_ppc64le = 117,
+ dwarf_pc_ppc64le,
+ dwarf_softe_ppc64le,
+ dwarf_trap_ppc64le,
+ dwarf_origr3_ppc64le,
+ dwarf_fpscr_ppc64le,
+ dwarf_msr_ppc64le,
+ dwarf_vs0_ppc64le,
+ dwarf_vs1_ppc64le,
+ dwarf_vs2_ppc64le,
+ dwarf_vs3_ppc64le,
+ dwarf_vs4_ppc64le,
+ dwarf_vs5_ppc64le,
+ dwarf_vs6_ppc64le,
+ dwarf_vs7_ppc64le,
+ dwarf_vs8_ppc64le,
+ dwarf_vs9_ppc64le,
+ dwarf_vs10_ppc64le,
+ dwarf_vs11_ppc64le,
+ dwarf_vs12_ppc64le,
+ dwarf_vs13_ppc64le,
+ dwarf_vs14_ppc64le,
+ dwarf_vs15_ppc64le,
+ dwarf_vs16_ppc64le,
+ dwarf_vs17_ppc64le,
+ dwarf_vs18_ppc64le,
+ dwarf_vs19_ppc64le,
+ dwarf_vs20_ppc64le,
+ dwarf_vs21_ppc64le,
+ dwarf_vs22_ppc64le,
+ dwarf_vs23_ppc64le,
+ dwarf_vs24_ppc64le,
+ dwarf_vs25_ppc64le,
+ dwarf_vs26_ppc64le,
+ dwarf_vs27_ppc64le,
+ dwarf_vs28_ppc64le,
+ dwarf_vs29_ppc64le,
+ dwarf_vs30_ppc64le,
+ dwarf_vs31_ppc64le,
+ dwarf_vs32_ppc64le,
+ dwarf_vs33_ppc64le,
+ dwarf_vs34_ppc64le,
+ dwarf_vs35_ppc64le,
+ dwarf_vs36_ppc64le,
+ dwarf_vs37_ppc64le,
+ dwarf_vs38_ppc64le,
+ dwarf_vs39_ppc64le,
+ dwarf_vs40_ppc64le,
+ dwarf_vs41_ppc64le,
+ dwarf_vs42_ppc64le,
+ dwarf_vs43_ppc64le,
+ dwarf_vs44_ppc64le,
+ dwarf_vs45_ppc64le,
+ dwarf_vs46_ppc64le,
+ dwarf_vs47_ppc64le,
+ dwarf_vs48_ppc64le,
+ dwarf_vs49_ppc64le,
+ dwarf_vs50_ppc64le,
+ dwarf_vs51_ppc64le,
+ dwarf_vs52_ppc64le,
+ dwarf_vs53_ppc64le,
+ dwarf_vs54_ppc64le,
+ dwarf_vs55_ppc64le,
+ dwarf_vs56_ppc64le,
+ dwarf_vs57_ppc64le,
+ dwarf_vs58_ppc64le,
+ dwarf_vs59_ppc64le,
+ dwarf_vs60_ppc64le,
+ dwarf_vs61_ppc64le,
+ dwarf_vs62_ppc64le,
+ dwarf_vs63_ppc64le,
+};
+
+} // namespace ppc64le_dwarf
+
+#endif // utility_PPC64LE_DWARF_Registers_h_
diff --git a/source/Utility/PPC64LE_ehframe_Registers.h b/source/Utility/PPC64LE_ehframe_Registers.h
new file mode 100644
index 0000000000000..c5763b3047117
--- /dev/null
+++ b/source/Utility/PPC64LE_ehframe_Registers.h
@@ -0,0 +1,194 @@
+//===-- PPC64LE_ehframe_Registers.h -----------------------------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef utility_PPC64LE_ehframe_Registers_h_
+#define utility_PPC64LE_ehframe_Registers_h_
+
+// The register numbers used in the eh_frame unwind information.
+// Should be the same as DWARF register numbers.
+
+namespace ppc64le_ehframe {
+
+enum {
+ r0 = 0,
+ r1,
+ r2,
+ r3,
+ r4,
+ r5,
+ r6,
+ r7,
+ r8,
+ r9,
+ r10,
+ r11,
+ r12,
+ r13,
+ r14,
+ r15,
+ r16,
+ r17,
+ r18,
+ r19,
+ r20,
+ r21,
+ r22,
+ r23,
+ r24,
+ r25,
+ r26,
+ r27,
+ r28,
+ r29,
+ r30,
+ r31,
+ f0,
+ f1,
+ f2,
+ f3,
+ f4,
+ f5,
+ f6,
+ f7,
+ f8,
+ f9,
+ f10,
+ f11,
+ f12,
+ f13,
+ f14,
+ f15,
+ f16,
+ f17,
+ f18,
+ f19,
+ f20,
+ f21,
+ f22,
+ f23,
+ f24,
+ f25,
+ f26,
+ f27,
+ f28,
+ f29,
+ f30,
+ f31,
+ lr = 65,
+ ctr,
+ cr = 68,
+ xer = 76,
+ vr0,
+ vr1,
+ vr2,
+ vr3,
+ vr4,
+ vr5,
+ vr6,
+ vr7,
+ vr8,
+ vr9,
+ vr10,
+ vr11,
+ vr12,
+ vr13,
+ vr14,
+ vr15,
+ vr16,
+ vr17,
+ vr18,
+ vr19,
+ vr20,
+ vr21,
+ vr22,
+ vr23,
+ vr24,
+ vr25,
+ vr26,
+ vr27,
+ vr28,
+ vr29,
+ vr30,
+ vr31,
+ vscr = 110,
+ vrsave = 117,
+ pc,
+ softe,
+ trap,
+ origr3,
+ fpscr,
+ msr,
+ vs0,
+ vs1,
+ vs2,
+ vs3,
+ vs4,
+ vs5,
+ vs6,
+ vs7,
+ vs8,
+ vs9,
+ vs10,
+ vs11,
+ vs12,
+ vs13,
+ vs14,
+ vs15,
+ vs16,
+ vs17,
+ vs18,
+ vs19,
+ vs20,
+ vs21,
+ vs22,
+ vs23,
+ vs24,
+ vs25,
+ vs26,
+ vs27,
+ vs28,
+ vs29,
+ vs30,
+ vs31,
+ vs32,
+ vs33,
+ vs34,
+ vs35,
+ vs36,
+ vs37,
+ vs38,
+ vs39,
+ vs40,
+ vs41,
+ vs42,
+ vs43,
+ vs44,
+ vs45,
+ vs46,
+ vs47,
+ vs48,
+ vs49,
+ vs50,
+ vs51,
+ vs52,
+ vs53,
+ vs54,
+ vs55,
+ vs56,
+ vs57,
+ vs58,
+ vs59,
+ vs60,
+ vs61,
+ vs62,
+ vs63,
+};
+}
+
+#endif // utility_PPC64LE_ehframe_Registers_h_
diff --git a/source/Utility/SelectHelper.cpp b/source/Utility/SelectHelper.cpp
index a46213f8bfcb8..200b2ae42759b 100644
--- a/source/Utility/SelectHelper.cpp
+++ b/source/Utility/SelectHelper.cpp
@@ -32,6 +32,7 @@
#define NOMINMAX
#include <winsock2.h>
#else
+#include <sys/time.h>
#include <sys/select.h>
#endif
diff --git a/source/Utility/Status.cpp b/source/Utility/Status.cpp
index b11a3db64e6d2..a6a889a71e548 100644
--- a/source/Utility/Status.cpp
+++ b/source/Utility/Status.cpp
@@ -104,16 +104,6 @@ const Status &Status::operator=(const Status &rhs) {
return *this;
}
-//----------------------------------------------------------------------
-// Assignment operator
-//----------------------------------------------------------------------
-const Status &Status::operator=(uint32_t err) {
- m_code = err;
- m_type = eErrorTypeMachKernel;
- m_string.clear();
- return *this;
-}
-
Status::~Status() = default;
//----------------------------------------------------------------------
diff --git a/source/Utility/StringExtractorGDBRemote.cpp b/source/Utility/StringExtractorGDBRemote.cpp
index 8e50c0106a487..818347a42a2cb 100644
--- a/source/Utility/StringExtractorGDBRemote.cpp
+++ b/source/Utility/StringExtractorGDBRemote.cpp
@@ -103,6 +103,7 @@ StringExtractorGDBRemote::GetServerPacketType() const {
case 'P':
if (PACKET_STARTS_WITH("QPassSignals:"))
return eServerPacketType_QPassSignals;
+ break;
case 'S':
if (PACKET_MATCHES("QStartNoAckMode"))
diff --git a/source/Utility/StructuredData.cpp b/source/Utility/StructuredData.cpp
index 9fc05354cfd3f..492fc585ad07f 100644
--- a/source/Utility/StructuredData.cpp
+++ b/source/Utility/StructuredData.cpp
@@ -15,6 +15,7 @@
#include "lldb/Utility/Stream.h" // for Stream
#include "lldb/Utility/StreamString.h"
#include "llvm/ADT/STLExtras.h" // for make_unique
+#include "llvm/Support/MemoryBuffer.h"
#include <cerrno>
#include <cstdlib>
#include <inttypes.h>
diff --git a/source/Utility/TaskPool.cpp b/source/Utility/TaskPool.cpp
deleted file mode 100644
index d33f23cd861c6..0000000000000
--- a/source/Utility/TaskPool.cpp
+++ /dev/null
@@ -1,98 +0,0 @@
-//===--------------------- TaskPool.cpp -------------------------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-
-#include "lldb/Utility/TaskPool.h"
-
-#include <cstdint> // for uint32_t
-#include <queue> // for queue
-#include <thread> // for thread
-
-namespace {
-class TaskPoolImpl {
-public:
- static TaskPoolImpl &GetInstance();
-
- void AddTask(std::function<void()> &&task_fn);
-
-private:
- TaskPoolImpl();
-
- static void Worker(TaskPoolImpl *pool);
-
- std::queue<std::function<void()>> m_tasks;
- std::mutex m_tasks_mutex;
- uint32_t m_thread_count;
-};
-
-} // end of anonymous namespace
-
-TaskPoolImpl &TaskPoolImpl::GetInstance() {
- static TaskPoolImpl g_task_pool_impl;
- return g_task_pool_impl;
-}
-
-void TaskPool::AddTaskImpl(std::function<void()> &&task_fn) {
- TaskPoolImpl::GetInstance().AddTask(std::move(task_fn));
-}
-
-TaskPoolImpl::TaskPoolImpl() : m_thread_count(0) {}
-
-void TaskPoolImpl::AddTask(std::function<void()> &&task_fn) {
- static const uint32_t max_threads = std::thread::hardware_concurrency();
-
- std::unique_lock<std::mutex> lock(m_tasks_mutex);
- m_tasks.emplace(std::move(task_fn));
- if (m_thread_count < max_threads) {
- m_thread_count++;
- // Note that this detach call needs to happen with the m_tasks_mutex held.
- // This prevents the thread
- // from exiting prematurely and triggering a linux libc bug
- // (https://sourceware.org/bugzilla/show_bug.cgi?id=19951).
- std::thread(Worker, this).detach();
- }
-}
-
-void TaskPoolImpl::Worker(TaskPoolImpl *pool) {
- while (true) {
- std::unique_lock<std::mutex> lock(pool->m_tasks_mutex);
- if (pool->m_tasks.empty()) {
- pool->m_thread_count--;
- break;
- }
-
- std::function<void()> f = pool->m_tasks.front();
- pool->m_tasks.pop();
- lock.unlock();
-
- f();
- }
-}
-
-void TaskMapOverInt(size_t begin, size_t end,
- const llvm::function_ref<void(size_t)> &func) {
- std::atomic<size_t> idx{begin};
- size_t num_workers =
- std::min<size_t>(end, std::thread::hardware_concurrency());
-
- auto wrapper = [&idx, end, &func]() {
- while (true) {
- size_t i = idx.fetch_add(1);
- if (i >= end)
- break;
- func(i);
- }
- };
-
- std::vector<std::future<void>> futures;
- futures.reserve(num_workers);
- for (size_t i = 0; i < num_workers; i++)
- futures.push_back(TaskPool::AddTask(wrapper));
- for (size_t i = 0; i < num_workers; i++)
- futures[i].wait();
-}
diff --git a/source/Utility/UUID.cpp b/source/Utility/UUID.cpp
index b47f8b52f1c24..98d4c30cc7f11 100644
--- a/source/Utility/UUID.cpp
+++ b/source/Utility/UUID.cpp
@@ -21,11 +21,10 @@
namespace lldb_private {
-UUID::UUID() : m_num_uuid_bytes(16) { ::memset(m_uuid, 0, sizeof(m_uuid)); }
+UUID::UUID() { Clear(); }
UUID::UUID(const UUID &rhs) {
- m_num_uuid_bytes = rhs.m_num_uuid_bytes;
- ::memcpy(m_uuid, rhs.m_uuid, sizeof(m_uuid));
+ SetBytes(rhs.m_uuid, rhs.m_num_uuid_bytes);
}
UUID::UUID(const void *uuid_bytes, uint32_t num_uuid_bytes) {
@@ -74,14 +73,7 @@ std::string UUID::GetAsString(const char *separator) const {
}
void UUID::Dump(Stream *s) const {
- const uint8_t *u = (const uint8_t *)GetBytes();
- s->Printf("%2.2X%2.2X%2.2X%2.2X-%2.2X%2.2X-%2.2X%2.2X-%2.2X%2.2X-%2.2X%2.2X%"
- "2.2X%2.2X%2.2X%2.2X",
- u[0], u[1], u[2], u[3], u[4], u[5], u[6], u[7], u[8], u[9], u[10],
- u[11], u[12], u[13], u[14], u[15]);
- if (m_num_uuid_bytes == 20) {
- s->Printf("-%2.2X%2.2X%2.2X%2.2X", u[16], u[17], u[18], u[19]);
- }
+ s->PutCString(GetAsString().c_str());
}
bool UUID::SetBytes(const void *uuid_bytes, uint32_t num_uuid_bytes) {
@@ -109,7 +101,7 @@ bool UUID::SetBytes(const void *uuid_bytes, uint32_t num_uuid_bytes) {
return false;
}
-size_t UUID::GetByteSize() { return m_num_uuid_bytes; }
+size_t UUID::GetByteSize() const { return m_num_uuid_bytes; }
bool UUID::IsValid() const {
return m_uuid[0] || m_uuid[1] || m_uuid[2] || m_uuid[3] || m_uuid[4] ||
@@ -198,8 +190,7 @@ bool lldb_private::operator==(const lldb_private::UUID &lhs,
bool lldb_private::operator!=(const lldb_private::UUID &lhs,
const lldb_private::UUID &rhs) {
- return ::memcmp(lhs.GetBytes(), rhs.GetBytes(),
- sizeof(lldb_private::UUID::ValueType)) != 0;
+ return !(lhs == rhs);
}
bool lldb_private::operator<(const lldb_private::UUID &lhs,
@@ -210,18 +201,15 @@ bool lldb_private::operator<(const lldb_private::UUID &lhs,
bool lldb_private::operator<=(const lldb_private::UUID &lhs,
const lldb_private::UUID &rhs) {
- return ::memcmp(lhs.GetBytes(), rhs.GetBytes(),
- sizeof(lldb_private::UUID::ValueType)) <= 0;
+ return !(lhs > rhs);
}
bool lldb_private::operator>(const lldb_private::UUID &lhs,
const lldb_private::UUID &rhs) {
- return ::memcmp(lhs.GetBytes(), rhs.GetBytes(),
- sizeof(lldb_private::UUID::ValueType)) > 0;
+ return rhs < lhs;
}
bool lldb_private::operator>=(const lldb_private::UUID &lhs,
const lldb_private::UUID &rhs) {
- return ::memcmp(lhs.GetBytes(), rhs.GetBytes(),
- sizeof(lldb_private::UUID::ValueType)) >= 0;
+ return !(lhs < rhs);
}
diff --git a/source/Utility/UriParser.cpp b/source/Utility/UriParser.cpp
index bb57211af4687..a6d81e7a2c8b8 100644
--- a/source/Utility/UriParser.cpp
+++ b/source/Utility/UriParser.cpp
@@ -22,7 +22,7 @@ using namespace lldb_private;
bool UriParser::Parse(llvm::StringRef uri, llvm::StringRef &scheme,
llvm::StringRef &hostname, int &port,
llvm::StringRef &path) {
- llvm::StringRef tmp_scheme, tmp_hostname, tmp_port, tmp_path;
+ llvm::StringRef tmp_scheme, tmp_hostname, tmp_path;
const llvm::StringRef kSchemeSep("://");
auto pos = uri.find(kSchemeSep);
@@ -43,7 +43,7 @@ bool UriParser::Parse(llvm::StringRef uri, llvm::StringRef &scheme,
((path_pos != std::string::npos) ? path_pos : uri.size()) - host_pos);
// Extract hostname
- if (host_port[0] == '[') {
+ if (!host_port.empty() && host_port[0] == '[') {
// hostname is enclosed with square brackets.
pos = host_port.find(']');
if (pos == std::string::npos)
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-02 04:25:06 +0000