diff options
Diffstat (limited to 'src/arm/imx6qdl.dtsi')
-rw-r--r-- | src/arm/imx6qdl.dtsi | 41 |
1 files changed, 20 insertions, 21 deletions
diff --git a/src/arm/imx6qdl.dtsi b/src/arm/imx6qdl.dtsi index 4f6ae921656f1..ed613ebe0812e 100644 --- a/src/arm/imx6qdl.dtsi +++ b/src/arm/imx6qdl.dtsi @@ -261,7 +261,7 @@ clocks = <&clks IMX6QDL_CLK_ECSPI1>, <&clks IMX6QDL_CLK_ECSPI1>; clock-names = "ipg", "per"; - dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; + dmas = <&sdma 3 8 1>, <&sdma 4 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -275,7 +275,7 @@ clocks = <&clks IMX6QDL_CLK_ECSPI2>, <&clks IMX6QDL_CLK_ECSPI2>; clock-names = "ipg", "per"; - dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; + dmas = <&sdma 5 8 1>, <&sdma 6 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -289,7 +289,7 @@ clocks = <&clks IMX6QDL_CLK_ECSPI3>, <&clks IMX6QDL_CLK_ECSPI3>; clock-names = "ipg", "per"; - dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; + dmas = <&sdma 7 8 1>, <&sdma 8 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -303,7 +303,7 @@ clocks = <&clks IMX6QDL_CLK_ECSPI4>, <&clks IMX6QDL_CLK_ECSPI4>; clock-names = "ipg", "per"; - dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; + dmas = <&sdma 9 8 1>, <&sdma 10 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; @@ -621,7 +621,7 @@ <0 54 IRQ_TYPE_LEVEL_HIGH>, <0 127 IRQ_TYPE_LEVEL_HIGH>; - regulator-1p1@110 { + regulator-1p1 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd1p1"; regulator-min-microvolt = <800000>; @@ -635,7 +635,7 @@ anatop-max-voltage = <1375000>; }; - regulator-3p0@120 { + regulator-3p0 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd3p0"; regulator-min-microvolt = <2800000>; @@ -649,7 +649,7 @@ anatop-max-voltage = <3400000>; }; - regulator-2p5@130 { + regulator-2p5 { compatible = "fsl,anatop-regulator"; regulator-name = "vdd2p5"; regulator-min-microvolt = <2000000>; @@ -663,7 +663,7 @@ anatop-max-voltage = <2750000>; }; - reg_arm: regulator-vddcore@140 { + reg_arm: regulator-vddcore { compatible = "fsl,anatop-regulator"; regulator-name = "vddarm"; regulator-min-microvolt = <725000>; @@ -680,7 +680,7 @@ anatop-max-voltage = <1450000>; }; - reg_pu: regulator-vddpu@140 { + reg_pu: regulator-vddpu { compatible = "fsl,anatop-regulator"; regulator-name = "vddpu"; regulator-min-microvolt = <725000>; @@ -697,7 +697,7 @@ anatop-max-voltage = <1450000>; }; - reg_soc: regulator-vddsoc@140 { + reg_soc: regulator-vddsoc { compatible = "fsl,anatop-regulator"; regulator-name = "vddsoc"; regulator-min-microvolt = <725000>; @@ -896,7 +896,6 @@ #size-cells = <1>; reg = <0x2100000 0x10000>; ranges = <0 0x2100000 0x10000>; - interrupt-parent = <&intc>; clocks = <&clks IMX6QDL_CLK_CAAM_MEM>, <&clks IMX6QDL_CLK_CAAM_ACLK>, <&clks IMX6QDL_CLK_CAAM_IPG>, @@ -1231,22 +1230,22 @@ #size-cells = <0>; reg = <2>; - ipu1_di0_disp0: endpoint@0 { + ipu1_di0_disp0: disp0-endpoint { }; - ipu1_di0_hdmi: endpoint@1 { + ipu1_di0_hdmi: hdmi-endpoint { remote-endpoint = <&hdmi_mux_0>; }; - ipu1_di0_mipi: endpoint@2 { + ipu1_di0_mipi: mipi-endpoint { remote-endpoint = <&mipi_mux_0>; }; - ipu1_di0_lvds0: endpoint@3 { + ipu1_di0_lvds0: lvds0-endpoint { remote-endpoint = <&lvds0_mux_0>; }; - ipu1_di0_lvds1: endpoint@4 { + ipu1_di0_lvds1: lvds1-endpoint { remote-endpoint = <&lvds1_mux_0>; }; }; @@ -1256,22 +1255,22 @@ #size-cells = <0>; reg = <3>; - ipu1_di0_disp1: endpoint@0 { + ipu1_di0_disp1: disp1-endpoint { }; - ipu1_di1_hdmi: endpoint@1 { + ipu1_di1_hdmi: hdmi-endpoint { remote-endpoint = <&hdmi_mux_1>; }; - ipu1_di1_mipi: endpoint@2 { + ipu1_di1_mipi: mipi-endpoint { remote-endpoint = <&mipi_mux_1>; }; - ipu1_di1_lvds0: endpoint@3 { + ipu1_di1_lvds0: lvds0-endpoint { remote-endpoint = <&lvds0_mux_1>; }; - ipu1_di1_lvds1: endpoint@4 { + ipu1_di1_lvds1: lvds1-endpoint { remote-endpoint = <&lvds1_mux_1>; }; }; |