diff options
Diffstat (limited to 'test/CodeGen/AArch64/dp1.ll')
| -rw-r--r-- | test/CodeGen/AArch64/dp1.ll | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/test/CodeGen/AArch64/dp1.ll b/test/CodeGen/AArch64/dp1.ll index 83aa8b4f6631e..6a8d55cdc7ea0 100644 --- a/test/CodeGen/AArch64/dp1.ll +++ b/test/CodeGen/AArch64/dp1.ll @@ -4,7 +4,7 @@ @var64 = global i64 0 define void @rev_i32() { -; CHECK: rev_i32: +; CHECK-LABEL: rev_i32: %val0_tmp = load i32* @var32 %val1_tmp = call i32 @llvm.bswap.i32(i32 %val0_tmp) ; CHECK: rev {{w[0-9]+}}, {{w[0-9]+}} @@ -13,7 +13,7 @@ define void @rev_i32() { } define void @rev_i64() { -; CHECK: rev_i64: +; CHECK-LABEL: rev_i64: %val0_tmp = load i64* @var64 %val1_tmp = call i64 @llvm.bswap.i64(i64 %val0_tmp) ; CHECK: rev {{x[0-9]+}}, {{x[0-9]+}} @@ -22,7 +22,7 @@ define void @rev_i64() { } define void @rev32_i64() { -; CHECK: rev32_i64: +; CHECK-LABEL: rev32_i64: %val0_tmp = load i64* @var64 %val1_tmp = shl i64 %val0_tmp, 32 %val5_tmp = sub i64 64, 32 @@ -35,7 +35,7 @@ define void @rev32_i64() { } define void @rev16_i32() { -; CHECK: rev16_i32: +; CHECK-LABEL: rev16_i32: %val0_tmp = load i32* @var32 %val1_tmp = shl i32 %val0_tmp, 16 %val2_tmp = lshr i32 %val0_tmp, 16 @@ -47,7 +47,7 @@ define void @rev16_i32() { } define void @clz_zerodef_i32() { -; CHECK: clz_zerodef_i32: +; CHECK-LABEL: clz_zerodef_i32: %val0_tmp = load i32* @var32 %val4_tmp = call i32 @llvm.ctlz.i32(i32 %val0_tmp, i1 0) ; CHECK: clz {{w[0-9]+}}, {{w[0-9]+}} @@ -56,7 +56,7 @@ define void @clz_zerodef_i32() { } define void @clz_zerodef_i64() { -; CHECK: clz_zerodef_i64: +; CHECK-LABEL: clz_zerodef_i64: %val0_tmp = load i64* @var64 %val4_tmp = call i64 @llvm.ctlz.i64(i64 %val0_tmp, i1 0) ; CHECK: clz {{x[0-9]+}}, {{x[0-9]+}} @@ -65,7 +65,7 @@ define void @clz_zerodef_i64() { } define void @clz_zeroundef_i32() { -; CHECK: clz_zeroundef_i32: +; CHECK-LABEL: clz_zeroundef_i32: %val0_tmp = load i32* @var32 %val4_tmp = call i32 @llvm.ctlz.i32(i32 %val0_tmp, i1 1) ; CHECK: clz {{w[0-9]+}}, {{w[0-9]+}} @@ -74,7 +74,7 @@ define void @clz_zeroundef_i32() { } define void @clz_zeroundef_i64() { -; CHECK: clz_zeroundef_i64: +; CHECK-LABEL: clz_zeroundef_i64: %val0_tmp = load i64* @var64 %val4_tmp = call i64 @llvm.ctlz.i64(i64 %val0_tmp, i1 1) ; CHECK: clz {{x[0-9]+}}, {{x[0-9]+}} @@ -83,7 +83,7 @@ define void @clz_zeroundef_i64() { } define void @cttz_zerodef_i32() { -; CHECK: cttz_zerodef_i32: +; CHECK-LABEL: cttz_zerodef_i32: %val0_tmp = load i32* @var32 %val4_tmp = call i32 @llvm.cttz.i32(i32 %val0_tmp, i1 0) ; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}} @@ -93,7 +93,7 @@ define void @cttz_zerodef_i32() { } define void @cttz_zerodef_i64() { -; CHECK: cttz_zerodef_i64: +; CHECK-LABEL: cttz_zerodef_i64: %val0_tmp = load i64* @var64 %val4_tmp = call i64 @llvm.cttz.i64(i64 %val0_tmp, i1 0) ; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}} @@ -103,7 +103,7 @@ define void @cttz_zerodef_i64() { } define void @cttz_zeroundef_i32() { -; CHECK: cttz_zeroundef_i32: +; CHECK-LABEL: cttz_zeroundef_i32: %val0_tmp = load i32* @var32 %val4_tmp = call i32 @llvm.cttz.i32(i32 %val0_tmp, i1 1) ; CHECK: rbit [[REVERSED:w[0-9]+]], {{w[0-9]+}} @@ -113,7 +113,7 @@ define void @cttz_zeroundef_i32() { } define void @cttz_zeroundef_i64() { -; CHECK: cttz_zeroundef_i64: +; CHECK-LABEL: cttz_zeroundef_i64: %val0_tmp = load i64* @var64 %val4_tmp = call i64 @llvm.cttz.i64(i64 %val0_tmp, i1 1) ; CHECK: rbit [[REVERSED:x[0-9]+]], {{x[0-9]+}} @@ -125,7 +125,7 @@ define void @cttz_zeroundef_i64() { ; These two are just compilation tests really: the operation's set to Expand in ; ISelLowering. define void @ctpop_i32() { -; CHECK: ctpop_i32: +; CHECK-LABEL: ctpop_i32: %val0_tmp = load i32* @var32 %val4_tmp = call i32 @llvm.ctpop.i32(i32 %val0_tmp) store volatile i32 %val4_tmp, i32* @var32 @@ -133,7 +133,7 @@ define void @ctpop_i32() { } define void @ctpop_i64() { -; CHECK: ctpop_i64: +; CHECK-LABEL: ctpop_i64: %val0_tmp = load i64* @var64 %val4_tmp = call i64 @llvm.ctpop.i64(i64 %val0_tmp) store volatile i64 %val4_tmp, i64* @var64 |