diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll')
-rw-r--r-- | test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll | 100 |
1 files changed, 50 insertions, 50 deletions
diff --git a/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll b/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll index 084a6933da267..e2620ce353c60 100644 --- a/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll +++ b/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll @@ -11,22 +11,22 @@ declare i32 @llvm.amdgcn.workitem.id.z() #0 declare i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() #0 declare i8 addrspace(2)* @llvm.amdgcn.queue.ptr() #0 -; HSA: define void @use_tgid_x(i32 addrspace(1)* %ptr) #1 { -define void @use_tgid_x(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tgid_x(i32 addrspace(1)* %ptr) #1 { +define amdgpu_kernel void @use_tgid_x(i32 addrspace(1)* %ptr) #1 { %val = call i32 @llvm.amdgcn.workgroup.id.x() store i32 %val, i32 addrspace(1)* %ptr ret void } -; HSA: define void @use_tgid_y(i32 addrspace(1)* %ptr) #2 { -define void @use_tgid_y(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tgid_y(i32 addrspace(1)* %ptr) #2 { +define amdgpu_kernel void @use_tgid_y(i32 addrspace(1)* %ptr) #1 { %val = call i32 @llvm.amdgcn.workgroup.id.y() store i32 %val, i32 addrspace(1)* %ptr ret void } -; HSA: define void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #2 { -define void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #2 { +define amdgpu_kernel void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workgroup.id.y() store volatile i32 %val0, i32 addrspace(1)* %ptr %val1 = call i32 @llvm.amdgcn.workgroup.id.y() @@ -34,8 +34,8 @@ define void @multi_use_tgid_y(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_tgid_x_y(i32 addrspace(1)* %ptr) #2 { -define void @use_tgid_x_y(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tgid_x_y(i32 addrspace(1)* %ptr) #2 { +define amdgpu_kernel void @use_tgid_x_y(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workgroup.id.x() %val1 = call i32 @llvm.amdgcn.workgroup.id.y() store volatile i32 %val0, i32 addrspace(1)* %ptr @@ -43,15 +43,15 @@ define void @use_tgid_x_y(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_tgid_z(i32 addrspace(1)* %ptr) #3 { -define void @use_tgid_z(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tgid_z(i32 addrspace(1)* %ptr) #3 { +define amdgpu_kernel void @use_tgid_z(i32 addrspace(1)* %ptr) #1 { %val = call i32 @llvm.amdgcn.workgroup.id.z() store i32 %val, i32 addrspace(1)* %ptr ret void } -; HSA: define void @use_tgid_x_z(i32 addrspace(1)* %ptr) #3 { -define void @use_tgid_x_z(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tgid_x_z(i32 addrspace(1)* %ptr) #3 { +define amdgpu_kernel void @use_tgid_x_z(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workgroup.id.x() %val1 = call i32 @llvm.amdgcn.workgroup.id.z() store volatile i32 %val0, i32 addrspace(1)* %ptr @@ -59,8 +59,8 @@ define void @use_tgid_x_z(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_tgid_y_z(i32 addrspace(1)* %ptr) #4 { -define void @use_tgid_y_z(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tgid_y_z(i32 addrspace(1)* %ptr) #4 { +define amdgpu_kernel void @use_tgid_y_z(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workgroup.id.y() %val1 = call i32 @llvm.amdgcn.workgroup.id.z() store volatile i32 %val0, i32 addrspace(1)* %ptr @@ -68,8 +68,8 @@ define void @use_tgid_y_z(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #4 { -define void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #4 { +define amdgpu_kernel void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workgroup.id.x() %val1 = call i32 @llvm.amdgcn.workgroup.id.y() %val2 = call i32 @llvm.amdgcn.workgroup.id.z() @@ -79,29 +79,29 @@ define void @use_tgid_x_y_z(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_tidig_x(i32 addrspace(1)* %ptr) #1 { -define void @use_tidig_x(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tidig_x(i32 addrspace(1)* %ptr) #1 { +define amdgpu_kernel void @use_tidig_x(i32 addrspace(1)* %ptr) #1 { %val = call i32 @llvm.amdgcn.workitem.id.x() store i32 %val, i32 addrspace(1)* %ptr ret void } -; HSA: define void @use_tidig_y(i32 addrspace(1)* %ptr) #5 { -define void @use_tidig_y(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tidig_y(i32 addrspace(1)* %ptr) #5 { +define amdgpu_kernel void @use_tidig_y(i32 addrspace(1)* %ptr) #1 { %val = call i32 @llvm.amdgcn.workitem.id.y() store i32 %val, i32 addrspace(1)* %ptr ret void } -; HSA: define void @use_tidig_z(i32 addrspace(1)* %ptr) #6 { -define void @use_tidig_z(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tidig_z(i32 addrspace(1)* %ptr) #6 { +define amdgpu_kernel void @use_tidig_z(i32 addrspace(1)* %ptr) #1 { %val = call i32 @llvm.amdgcn.workitem.id.z() store i32 %val, i32 addrspace(1)* %ptr ret void } -; HSA: define void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 { -define void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 { +define amdgpu_kernel void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workitem.id.x() %val1 = call i32 @llvm.amdgcn.workgroup.id.x() store volatile i32 %val0, i32 addrspace(1)* %ptr @@ -109,8 +109,8 @@ define void @use_tidig_x_tgid_x(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #7 { -define void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #7 { +define amdgpu_kernel void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workitem.id.y() %val1 = call i32 @llvm.amdgcn.workgroup.id.y() store volatile i32 %val0, i32 addrspace(1)* %ptr @@ -118,8 +118,8 @@ define void @use_tidig_y_tgid_y(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #8 { -define void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #8 { +define amdgpu_kernel void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workitem.id.x() %val1 = call i32 @llvm.amdgcn.workitem.id.y() %val2 = call i32 @llvm.amdgcn.workitem.id.z() @@ -129,8 +129,8 @@ define void @use_tidig_x_y_z(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_all_workitems(i32 addrspace(1)* %ptr) #9 { -define void @use_all_workitems(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_all_workitems(i32 addrspace(1)* %ptr) #9 { +define amdgpu_kernel void @use_all_workitems(i32 addrspace(1)* %ptr) #1 { %val0 = call i32 @llvm.amdgcn.workitem.id.x() %val1 = call i32 @llvm.amdgcn.workitem.id.y() %val2 = call i32 @llvm.amdgcn.workitem.id.z() @@ -146,8 +146,8 @@ define void @use_all_workitems(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #10 { -define void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #10 { +define amdgpu_kernel void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #1 { %dispatch.ptr = call i8 addrspace(2)* @llvm.amdgcn.dispatch.ptr() %bc = bitcast i8 addrspace(2)* %dispatch.ptr to i32 addrspace(2)* %val = load i32, i32 addrspace(2)* %bc @@ -155,8 +155,8 @@ define void @use_dispatch_ptr(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_queue_ptr(i32 addrspace(1)* %ptr) #11 { -define void @use_queue_ptr(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_queue_ptr(i32 addrspace(1)* %ptr) #11 { +define amdgpu_kernel void @use_queue_ptr(i32 addrspace(1)* %ptr) #1 { %dispatch.ptr = call i8 addrspace(2)* @llvm.amdgcn.queue.ptr() %bc = bitcast i8 addrspace(2)* %dispatch.ptr to i32 addrspace(2)* %val = load i32, i32 addrspace(2)* %bc @@ -164,58 +164,58 @@ define void @use_queue_ptr(i32 addrspace(1)* %ptr) #1 { ret void } -; HSA: define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #11 { -define void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #11 { +define amdgpu_kernel void @use_group_to_flat_addrspacecast(i32 addrspace(3)* %ptr) #1 { %stof = addrspacecast i32 addrspace(3)* %ptr to i32 addrspace(4)* store volatile i32 0, i32 addrspace(4)* %stof ret void } -; HSA: define void @use_private_to_flat_addrspacecast(i32* %ptr) #11 { -define void @use_private_to_flat_addrspacecast(i32* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_private_to_flat_addrspacecast(i32* %ptr) #11 { +define amdgpu_kernel void @use_private_to_flat_addrspacecast(i32* %ptr) #1 { %stof = addrspacecast i32* %ptr to i32 addrspace(4)* store volatile i32 0, i32 addrspace(4)* %stof ret void } -; HSA: define void @use_flat_to_group_addrspacecast(i32 addrspace(4)* %ptr) #1 { -define void @use_flat_to_group_addrspacecast(i32 addrspace(4)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_flat_to_group_addrspacecast(i32 addrspace(4)* %ptr) #1 { +define amdgpu_kernel void @use_flat_to_group_addrspacecast(i32 addrspace(4)* %ptr) #1 { %ftos = addrspacecast i32 addrspace(4)* %ptr to i32 addrspace(3)* store volatile i32 0, i32 addrspace(3)* %ftos ret void } -; HSA: define void @use_flat_to_private_addrspacecast(i32 addrspace(4)* %ptr) #1 { -define void @use_flat_to_private_addrspacecast(i32 addrspace(4)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_flat_to_private_addrspacecast(i32 addrspace(4)* %ptr) #1 { +define amdgpu_kernel void @use_flat_to_private_addrspacecast(i32 addrspace(4)* %ptr) #1 { %ftos = addrspacecast i32 addrspace(4)* %ptr to i32* store volatile i32 0, i32* %ftos ret void } ; No-op addrspacecast should not use queue ptr -; HSA: define void @use_global_to_flat_addrspacecast(i32 addrspace(1)* %ptr) #1 { -define void @use_global_to_flat_addrspacecast(i32 addrspace(1)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_global_to_flat_addrspacecast(i32 addrspace(1)* %ptr) #1 { +define amdgpu_kernel void @use_global_to_flat_addrspacecast(i32 addrspace(1)* %ptr) #1 { %stof = addrspacecast i32 addrspace(1)* %ptr to i32 addrspace(4)* store volatile i32 0, i32 addrspace(4)* %stof ret void } -; HSA: define void @use_constant_to_flat_addrspacecast(i32 addrspace(2)* %ptr) #1 { -define void @use_constant_to_flat_addrspacecast(i32 addrspace(2)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_constant_to_flat_addrspacecast(i32 addrspace(2)* %ptr) #1 { +define amdgpu_kernel void @use_constant_to_flat_addrspacecast(i32 addrspace(2)* %ptr) #1 { %stof = addrspacecast i32 addrspace(2)* %ptr to i32 addrspace(4)* %ld = load volatile i32, i32 addrspace(4)* %stof ret void } -; HSA: define void @use_flat_to_global_addrspacecast(i32 addrspace(4)* %ptr) #1 { -define void @use_flat_to_global_addrspacecast(i32 addrspace(4)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_flat_to_global_addrspacecast(i32 addrspace(4)* %ptr) #1 { +define amdgpu_kernel void @use_flat_to_global_addrspacecast(i32 addrspace(4)* %ptr) #1 { %ftos = addrspacecast i32 addrspace(4)* %ptr to i32 addrspace(1)* store volatile i32 0, i32 addrspace(1)* %ftos ret void } -; HSA: define void @use_flat_to_constant_addrspacecast(i32 addrspace(4)* %ptr) #1 { -define void @use_flat_to_constant_addrspacecast(i32 addrspace(4)* %ptr) #1 { +; HSA: define amdgpu_kernel void @use_flat_to_constant_addrspacecast(i32 addrspace(4)* %ptr) #1 { +define amdgpu_kernel void @use_flat_to_constant_addrspacecast(i32 addrspace(4)* %ptr) #1 { %ftos = addrspacecast i32 addrspace(4)* %ptr to i32 addrspace(2)* %ld = load volatile i32, i32 addrspace(2)* %ftos ret void |