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-rw-r--r--test/CodeGen/AMDGPU/input-mods.ll8
1 files changed, 3 insertions, 5 deletions
diff --git a/test/CodeGen/AMDGPU/input-mods.ll b/test/CodeGen/AMDGPU/input-mods.ll
index 1c4d285cbcb1e..720790df7e166 100644
--- a/test/CodeGen/AMDGPU/input-mods.ll
+++ b/test/CodeGen/AMDGPU/input-mods.ll
@@ -9,18 +9,16 @@
;CM: EXP_IEEE T{{[0-9]+}}.Z (MASKED), -|T{{[0-9]+}}.X|
;CM: EXP_IEEE * T{{[0-9]+}}.W (MASKED), -|T{{[0-9]+}}.X|
-define void @test(<4 x float> inreg %reg0) #0 {
+define amdgpu_ps void @test(<4 x float> inreg %reg0) {
%r0 = extractelement <4 x float> %reg0, i32 0
%r1 = call float @llvm.fabs.f32(float %r0)
%r2 = fsub float -0.000000e+00, %r1
%r3 = call float @llvm.exp2.f32(float %r2)
%vec = insertelement <4 x float> undef, float %r3, i32 0
- call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
+ call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
ret void
}
declare float @llvm.exp2.f32(float) readnone
declare float @llvm.fabs.f32(float) readnone
-declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
-
-attributes #0 = { "ShaderType"="0" }
+declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)