diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir')
| -rw-r--r-- | test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir | 227 |
1 files changed, 227 insertions, 0 deletions
diff --git a/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir b/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir new file mode 100644 index 0000000000000..768acf35eeae3 --- /dev/null +++ b/test/CodeGen/AMDGPU/macro-fusion-cluster-vcc-uses.mir @@ -0,0 +1,227 @@ +# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass machine-scheduler -o - %s | FileCheck -check-prefix=GCN %s + +# GCN-LABEL: name: cluster_add_addc +# GCN: S_NOP 0, implicit-def %vcc +# GCN: dead %2, %3 = V_ADD_I32_e64 %0, %1, implicit %exec +# GCN: dead %4, dead %5 = V_ADDC_U32_e64 %6, %7, %3, implicit %exec +name: cluster_add_addc +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: vgpr_32 } + - { id: 3, class: sreg_64 } + - { id: 4, class: vgpr_32 } + - { id: 5, class: sreg_64 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %2, %3 = V_ADD_I32_e64 %0, %1, implicit %exec + %6 = V_MOV_B32_e32 0, implicit %exec + %7 = V_MOV_B32_e32 0, implicit %exec + S_NOP 0, implicit def %vcc + %4, %5 = V_ADDC_U32_e64 %6, %7, %3, implicit %exec +... + +# GCN-LABEL: name: interleave_add64s +# GCN: dead %8, %9 = V_ADD_I32_e64 %0, %1, implicit %exec +# GCN-NEXT: dead %12, dead %13 = V_ADDC_U32_e64 %4, %5, %9, implicit %exec +# GCN-NEXT: dead %10, %11 = V_ADD_I32_e64 %2, %3, implicit %exec +# GCN-NEXT: dead %14, dead %15 = V_ADDC_U32_e64 %6, %7, %11, implicit %exec +name: interleave_add64s +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: vgpr_32 } + - { id: 3, class: vgpr_32 } + - { id: 4, class: vgpr_32 } + - { id: 5, class: vgpr_32 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + - { id: 8, class: vgpr_32 } + - { id: 9, class: sreg_64 } + - { id: 10, class: vgpr_32 } + - { id: 11, class: sreg_64 } + - { id: 12, class: vgpr_32 } + - { id: 13, class: sreg_64 } + - { id: 14, class: vgpr_32 } + - { id: 15, class: sreg_64 } + +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %2 = V_MOV_B32_e32 0, implicit %exec + %3 = V_MOV_B32_e32 0, implicit %exec + %4 = V_MOV_B32_e32 0, implicit %exec + %5 = V_MOV_B32_e32 0, implicit %exec + %6 = V_MOV_B32_e32 0, implicit %exec + %7 = V_MOV_B32_e32 0, implicit %exec + + %8, %9 = V_ADD_I32_e64 %0, %1, implicit %exec + %10, %11 = V_ADD_I32_e64 %2, %3, implicit %exec + + + %12, %13 = V_ADDC_U32_e64 %4, %5, %9, implicit %exec + %14, %15 = V_ADDC_U32_e64 %6, %7, %11, implicit %exec +... + +# GCN-LABEL: name: cluster_mov_addc +# GCN: S_NOP 0, implicit-def %vcc +# GCN-NEXT: %2 = S_MOV_B64 0 +# GCN-NEXT: dead %3, dead %4 = V_ADDC_U32_e64 %0, %1, %2, implicit %exec +name: cluster_mov_addc +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: sreg_64 } + - { id: 3, class: vgpr_32 } + - { id: 4, class: sreg_64 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %2 = S_MOV_B64 0 + S_NOP 0, implicit def %vcc + %3, %4 = V_ADDC_U32_e64 %0, %1, %2, implicit %exec +... + +# GCN-LABEL: name: no_cluster_add_addc_diff_sgpr +# GCN: dead %2, dead %3 = V_ADD_I32_e64 %0, %1, implicit %exec +# GCN-NEXT: %6 = V_MOV_B32_e32 0, implicit %exec +# GCN-NEXT: %7 = V_MOV_B32_e32 0, implicit %exec +# GCN-NEXT: S_NOP 0, implicit-def %vcc +# GCN-NEXT: %8 = S_MOV_B64 0 +# GCN-NEXT: dead %4, dead %5 = V_ADDC_U32_e64 %6, %7, %8, implicit %exec +name: no_cluster_add_addc_diff_sgpr +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: vgpr_32 } + - { id: 3, class: sreg_64 } + - { id: 4, class: vgpr_32 } + - { id: 5, class: sreg_64 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + - { id: 8, class: sreg_64 } +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %8 = S_MOV_B64 0 + %2, %3 = V_ADD_I32_e64 %0, %1, implicit %exec + %6 = V_MOV_B32_e32 0, implicit %exec + %7 = V_MOV_B32_e32 0, implicit %exec + S_NOP 0, implicit def %vcc + %4, %5 = V_ADDC_U32_e64 %6, %7, %8, implicit %exec +... +# GCN-LABEL: name: cluster_sub_subb +# GCN: S_NOP 0, implicit-def %vcc +# GCN: dead %2, %3 = V_SUB_I32_e64 %0, %1, implicit %exec +# GCN: dead %4, dead %5 = V_SUBB_U32_e64 %6, %7, %3, implicit %exec +name: cluster_sub_subb +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: vgpr_32 } + - { id: 3, class: sreg_64 } + - { id: 4, class: vgpr_32 } + - { id: 5, class: sreg_64 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %2, %3 = V_SUB_I32_e64 %0, %1, implicit %exec + %6 = V_MOV_B32_e32 0, implicit %exec + %7 = V_MOV_B32_e32 0, implicit %exec + S_NOP 0, implicit def %vcc + %4, %5 = V_SUBB_U32_e64 %6, %7, %3, implicit %exec +... + +# GCN-LABEL: name: cluster_cmp_cndmask +# GCN: S_NOP 0, implicit-def %vcc +# GCN-NEXT: %3 = V_CMP_EQ_I32_e64 %0, %1, implicit %exec +# GCN-NEXT: dead %4 = V_CNDMASK_B32_e64 %0, %1, %3, implicit %exec +name: cluster_cmp_cndmask +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: vgpr_32 } + - { id: 3, class: sreg_64 } + - { id: 4, class: vgpr_32 } + - { id: 5, class: sreg_64 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %3 = V_CMP_EQ_I32_e64 %0, %1, implicit %exec + S_NOP 0, implicit def %vcc + %4 = V_CNDMASK_B32_e64 %0, %1, %3, implicit %exec +... + +# GCN-LABEL: name: cluster_multi_use_cmp_cndmask +# GCN: %4 = V_CMP_EQ_I32_e64 %0, %1, implicit %exec +# GCN-NEXT: dead %5 = V_CNDMASK_B32_e64 %2, %1, %4, implicit %exec +# GCN-NEXT: dead %6 = V_CNDMASK_B32_e64 %1, %3, %4, implicit %exec +name: cluster_multi_use_cmp_cndmask +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: vgpr_32 } + - { id: 3, class: vgpr_32 } + - { id: 4, class: sreg_64 } + - { id: 5, class: vgpr_32 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %2 = V_MOV_B32_e32 0, implicit %exec + %3 = V_MOV_B32_e32 0, implicit %exec + + %4 = V_CMP_EQ_I32_e64 %0, %1, implicit %exec + S_NOP 0, implicit def %vcc + %5 = V_CNDMASK_B32_e64 %2, %1, %4, implicit %exec + %6 = V_CNDMASK_B32_e64 %1, %3, %4, implicit %exec +... + +# GCN-LABEL: name: cluster_multi_use_cmp_cndmask2 +# GCN: %4 = V_CMP_EQ_I32_e64 %0, %1, implicit %exec +# GCN-NEXT: dead %5 = V_CNDMASK_B32_e64 %2, %1, %4, implicit %exec +# GCN-NEXT: %3 = V_MOV_B32_e32 0, implicit %exec +# GCN-NEXT: dead %6 = V_CNDMASK_B32_e64 %1, %3, %4, implicit %exec +name: cluster_multi_use_cmp_cndmask2 +registers: + - { id: 0, class: vgpr_32 } + - { id: 1, class: vgpr_32 } + - { id: 2, class: vgpr_32 } + - { id: 3, class: vgpr_32 } + - { id: 4, class: sreg_64 } + - { id: 5, class: vgpr_32 } + - { id: 6, class: vgpr_32 } + - { id: 7, class: vgpr_32 } + +body: | + bb.0: + %0 = V_MOV_B32_e32 0, implicit %exec + %1 = V_MOV_B32_e32 0, implicit %exec + %4 = V_CMP_EQ_I32_e64 %0, %1, implicit %exec + %2 = V_MOV_B32_e32 0, implicit %exec + %5 = V_CNDMASK_B32_e64 %2, %1, %4, implicit %exec + %3 = V_MOV_B32_e32 0, implicit %exec + %6 = V_CNDMASK_B32_e64 %1, %3, %4, implicit %exec +... |