diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/vselect.ll')
| -rw-r--r-- | test/CodeGen/AMDGPU/vselect.ll | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/test/CodeGen/AMDGPU/vselect.ll b/test/CodeGen/AMDGPU/vselect.ll index dc1f1ea11b015..0cd706b642d7e 100644 --- a/test/CodeGen/AMDGPU/vselect.ll +++ b/test/CodeGen/AMDGPU/vselect.ll @@ -1,29 +1,29 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG --check-prefix=FUNC %s -;RUN: llc < %s -march=amdgcn -mcpu=SI -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s +;RUN: llc < %s -march=amdgcn -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=FUNC %s ;RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck --check-prefix=SI --check-prefix=VI --check-prefix=FUNC %s +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG --check-prefix=FUNC %s -;FUNC-LABEL: {{^}}test_select_v2i32: +; FUNC-LABEL: {{^}}test_select_v2i32: -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Z +; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Y -;SI: v_cndmask_b32_e64 -;SI: v_cndmask_b32_e32 +; SI: v_cndmask_b32_e64 +; SI: v_cndmask_b32_e32 -define void @test_select_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1) { +define void @test_select_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in0, <2 x i32> addrspace(1)* %in1, <2 x i32> %val) { entry: - %0 = load <2 x i32>, <2 x i32> addrspace(1)* %in0 - %1 = load <2 x i32>, <2 x i32> addrspace(1)* %in1 - %cmp = icmp ne <2 x i32> %0, %1 - %result = select <2 x i1> %cmp, <2 x i32> %0, <2 x i32> %1 + %load0 = load <2 x i32>, <2 x i32> addrspace(1)* %in0 + %load1 = load <2 x i32>, <2 x i32> addrspace(1)* %in1 + %cmp = icmp sgt <2 x i32> %load0, %load1 + %result = select <2 x i1> %cmp, <2 x i32> %val, <2 x i32> %load0 store <2 x i32> %result, <2 x i32> addrspace(1)* %out ret void } -;FUNC-LABEL: {{^}}test_select_v2f32: +; FUNC-LABEL: {{^}}test_select_v2f32: -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ;SI: v_cndmask_b32_e64 ;SI: v_cndmask_b32_e32 @@ -40,24 +40,24 @@ entry: ;FUNC-LABEL: {{^}}test_select_v4i32: -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;EG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[4].X +; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].W +; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Z +; EG-DAG: CNDE_INT {{\** *}}T{{[0-9]+\.[XYZW], PV\.[XYZW], T[0-9]+\.[XYZW]}}, KC0[3].Y ; FIXME: The shrinking does not happen on tonga -;SI: v_cndmask_b32 -;SI: v_cndmask_b32 -;SI: v_cndmask_b32 -;SI: v_cndmask_b32 +; SI: v_cndmask_b32 +; SI: v_cndmask_b32 +; SI: v_cndmask_b32 +; SI: v_cndmask_b32 -define void @test_select_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1) { +define void @test_select_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in0, <4 x i32> addrspace(1)* %in1, <4 x i32> %val) { entry: - %0 = load <4 x i32>, <4 x i32> addrspace(1)* %in0 - %1 = load <4 x i32>, <4 x i32> addrspace(1)* %in1 - %cmp = icmp ne <4 x i32> %0, %1 - %result = select <4 x i1> %cmp, <4 x i32> %0, <4 x i32> %1 + %load0 = load <4 x i32>, <4 x i32> addrspace(1)* %in0 + %load1 = load <4 x i32>, <4 x i32> addrspace(1)* %in1 + %cmp = icmp sgt <4 x i32> %load0, %load1 + %result = select <4 x i1> %cmp, <4 x i32> %val, <4 x i32> %load0 store <4 x i32> %result, <4 x i32> addrspace(1)* %out ret void } |