1 files changed, 10 insertions, 10 deletions
diff --git a/test/CodeGen/ARM/mul_const.ll b/test/CodeGen/ARM/mul_const.ll
index c50a23354678d..482d8f2888ce7 100644
--- a/test/CodeGen/ARM/mul_const.ll
+++ b/test/CodeGen/ARM/mul_const.ll
@@ -2,7 +2,7 @@
 
 define i32 @t9(i32 %v) nounwind readnone {
 entry:
-; CHECK: t9:
+; CHECK-LABEL: t9:
 ; CHECK: add r0, r0, r0, lsl #3
 	%0 = mul i32 %v, 9
 	ret i32 %0
@@ -10,7 +10,7 @@ entry:
 
 define i32 @t7(i32 %v) nounwind readnone {
 entry:
-; CHECK: t7:
+; CHECK-LABEL: t7:
 ; CHECK: rsb r0, r0, r0, lsl #3
 	%0 = mul i32 %v, 7
 	ret i32 %0
@@ -18,7 +18,7 @@ entry:
 
 define i32 @t5(i32 %v) nounwind readnone {
 entry:
-; CHECK: t5:
+; CHECK-LABEL: t5:
 ; CHECK: add r0, r0, r0, lsl #2
         %0 = mul i32 %v, 5
         ret i32 %0
@@ -26,7 +26,7 @@ entry:
 
 define i32 @t3(i32 %v) nounwind readnone {
 entry:
-; CHECK: t3:
+; CHECK-LABEL: t3:
 ; CHECK: add r0, r0, r0, lsl #1
         %0 = mul i32 %v, 3
         ret i32 %0
@@ -34,7 +34,7 @@ entry:
 
 define i32 @t12288(i32 %v) nounwind readnone {
 entry:
-; CHECK: t12288:
+; CHECK-LABEL: t12288:
 ; CHECK: add r0, r0, r0, lsl #1
 ; CHECK: lsl{{.*}}#12
         %0 = mul i32 %v, 12288
@@ -43,7 +43,7 @@ entry:
 
 define i32 @tn9(i32 %v) nounwind readnone {
 entry:
-; CHECK: tn9:
+; CHECK-LABEL: tn9:
 ; CHECK: add	r0, r0, r0, lsl #3
 ; CHECK: rsb	r0, r0, #0
         %0 = mul i32 %v, -9
@@ -52,7 +52,7 @@ entry:
 
 define i32 @tn7(i32 %v) nounwind readnone {
 entry:
-; CHECK: tn7:
+; CHECK-LABEL: tn7:
 ; CHECK: sub r0, r0, r0, lsl #3
 	%0 = mul i32 %v, -7
 	ret i32 %0
@@ -60,7 +60,7 @@ entry:
 
 define i32 @tn5(i32 %v) nounwind readnone {
 entry:
-; CHECK: tn5:
+; CHECK-LABEL: tn5:
 ; CHECK: add r0, r0, r0, lsl #2
 ; CHECK: rsb r0, r0, #0
         %0 = mul i32 %v, -5
@@ -69,7 +69,7 @@ entry:
 
 define i32 @tn3(i32 %v) nounwind readnone {
 entry:
-; CHECK: tn3:
+; CHECK-LABEL: tn3:
 ; CHECK: sub r0, r0, r0, lsl #2
         %0 = mul i32 %v, -3
         ret i32 %0
@@ -77,7 +77,7 @@ entry:
 
 define i32 @tn12288(i32 %v) nounwind readnone {
 entry:
-; CHECK: tn12288:
+; CHECK-LABEL: tn12288:
 ; CHECK: sub r0, r0, r0, lsl #2
 ; CHECK: lsl{{.*}}#12
         %0 = mul i32 %v, -12288