4 files changed, 68 insertions, 37 deletions
diff --git a/test/CodeGen/ARM/neon_div.ll b/test/CodeGen/ARM/neon_div.ll
index e185c2a8afbcd..23b626e0ce516 100644
--- a/test/CodeGen/ARM/neon_div.ll
+++ b/test/CodeGen/ARM/neon_div.ll
@@ -1,49 +1,58 @@
-; RUN: llc -mtriple=arm-eabi -mattr=+neon -pre-RA-sched=source -disable-post-ra %s -o - \
-; RUN:  | FileCheck %s
+; RUN: llc -mtriple arm-eabi -mattr=+neon -disable-post-ra -pre-RA-sched source %s -o - | FileCheck %s
+; RUN: llc -mtriple thumbv7-windows-itanium -mattr=+neon -disable-post-ra -pre-RA-sched source %s -o - | FileCheck %s
 
 define <8 x i8> @sdivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
-;CHECK: vrecpe.f32
-;CHECK: vmovn.i32
-;CHECK: vrecpe.f32
-;CHECK: vmovn.i32
-;CHECK: vmovn.i16
-	%tmp1 = load <8 x i8>, <8 x i8>* %A
-	%tmp2 = load <8 x i8>, <8 x i8>* %B
-	%tmp3 = sdiv <8 x i8> %tmp1, %tmp2
-	ret <8 x i8> %tmp3
+  %tmp1 = load <8 x i8>, <8 x i8>* %A
+  %tmp2 = load <8 x i8>, <8 x i8>* %B
+  %tmp3 = sdiv <8 x i8> %tmp1, %tmp2
+  ret <8 x i8> %tmp3
 }
 
+; CHECK-LABEL: sdivi8:
+; CHECK: vrecpe.f32
+; CHECK: vmovn.i32
+; CHECK: vrecpe.f32
+; CHECK: vmovn.i32
+; CHECK: vmovn.i16
+
 define <8 x i8> @udivi8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
-;CHECK: vrecpe.f32
-;CHECK: vrecps.f32
-;CHECK: vmovn.i32
-;CHECK: vrecpe.f32
-;CHECK: vrecps.f32
-;CHECK: vmovn.i32
-;CHECK: vqmovun.s16
-	%tmp1 = load <8 x i8>, <8 x i8>* %A
-	%tmp2 = load <8 x i8>, <8 x i8>* %B
-	%tmp3 = udiv <8 x i8> %tmp1, %tmp2
-	ret <8 x i8> %tmp3
+  %tmp1 = load <8 x i8>, <8 x i8>* %A
+  %tmp2 = load <8 x i8>, <8 x i8>* %B
+  %tmp3 = udiv <8 x i8> %tmp1, %tmp2
+  ret <8 x i8> %tmp3
 }
 
+; CHECK-LABEL: udivi8:
+; CHECK: vrecpe.f32
+; CHECK: vrecps.f32
+; CHECK: vmovn.i32
+; CHECK: vrecpe.f32
+; CHECK: vrecps.f32
+; CHECK: vmovn.i32
+; CHECK: vqmovun.s16
+
 define <4 x i16> @sdivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
-;CHECK: vrecpe.f32
-;CHECK: vrecps.f32
-;CHECK: vmovn.i32
-	%tmp1 = load <4 x i16>, <4 x i16>* %A
-	%tmp2 = load <4 x i16>, <4 x i16>* %B
-	%tmp3 = sdiv <4 x i16> %tmp1, %tmp2
-	ret <4 x i16> %tmp3
+  %tmp1 = load <4 x i16>, <4 x i16>* %A
+  %tmp2 = load <4 x i16>, <4 x i16>* %B
+  %tmp3 = sdiv <4 x i16> %tmp1, %tmp2
+  ret <4 x i16> %tmp3
 }
 
+; CHECK-LABEL: sdivi16:
+; CHECK: vrecpe.f32
+; CHECK: vrecps.f32
+; CHECK: vmovn.i32
+
 define <4 x i16> @udivi16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
-;CHECK: vrecpe.f32
-;CHECK: vrecps.f32
-;CHECK: vrecps.f32
-;CHECK: vmovn.i32
-	%tmp1 = load <4 x i16>, <4 x i16>* %A
-	%tmp2 = load <4 x i16>, <4 x i16>* %B
-	%tmp3 = udiv <4 x i16> %tmp1, %tmp2
-	ret <4 x i16> %tmp3
+  %tmp1 = load <4 x i16>, <4 x i16>* %A
+  %tmp2 = load <4 x i16>, <4 x i16>* %B
+  %tmp3 = udiv <4 x i16> %tmp1, %tmp2
+  ret <4 x i16> %tmp3
 }
+
+; CHECK-LABEL: udivi16:
+; CHECK: vrecpe.f32
+; CHECK: vrecps.f32
+; CHECK: vrecps.f32
+; CHECK: vmovn.i32
+
diff --git a/test/CodeGen/ARM/vector-load.ll b/test/CodeGen/ARM/vector-load.ll
index a638c2bdb9bed..ed734723a86d3 100644
--- a/test/CodeGen/ARM/vector-load.ll
+++ b/test/CodeGen/ARM/vector-load.ll
@@ -251,3 +251,13 @@ define <4 x i32> @zextload_v8i8tov8i32_fake_update(<4 x i8>** %ptr) {
         %zlA = zext <4 x i8> %lA to <4 x i32>
 	ret <4 x i32> %zlA
 }
+
+; CHECK-LABEL: test_silly_load:
+; CHECK: ldr {{r[0-9]+}}, [r0, #24]
+; CHECK: vld1.8 {d{{[0-9]+}}, d{{[0-9]+}}}, [r0:128]!
+; CHECK: vldr d{{[0-9]+}}, [r0]
+
+define void @test_silly_load(<28 x i8>* %addr) {
+  load volatile <28 x i8>, <28 x i8>* %addr
+  ret void
+}
diff --git a/test/CodeGen/ARM/xray-armv6-attribute-instrumentation.ll b/test/CodeGen/ARM/xray-armv6-attribute-instrumentation.ll
index 8a8c667b2d8d6..93c3cb14fb738 100644
--- a/test/CodeGen/ARM/xray-armv6-attribute-instrumentation.ll
+++ b/test/CodeGen/ARM/xray-armv6-attribute-instrumentation.ll
@@ -23,3 +23,9 @@ define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always"
 ; CHECK-LABEL: Ltmp1:
 ; CHECK-NEXT:  bx	lr
 }
+; CHECK:       .p2align 4
+; CHECK-NEXT:  .long {{.*}}Lxray_synthetic_0
+; CHECK-NEXT:  .section {{.*}}xray_instr_map{{.*}}
+; CHECK-LABEL: Lxray_synthetic_0:
+; CHECK:       .long {{.*}}Lxray_sled_0
+; CHECK:       .long {{.*}}Lxray_sled_1
diff --git a/test/CodeGen/ARM/xray-armv7-attribute-instrumentation.ll b/test/CodeGen/ARM/xray-armv7-attribute-instrumentation.ll
index 07852cd687962..d14590b886794 100644
--- a/test/CodeGen/ARM/xray-armv7-attribute-instrumentation.ll
+++ b/test/CodeGen/ARM/xray-armv7-attribute-instrumentation.ll
@@ -23,3 +23,9 @@ define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always"
 ; CHECK-LABEL: Ltmp1:
 ; CHECK-NEXT:  bx lr
 }
+; CHECK:       .p2align 4
+; CHECK-NEXT:  .long {{.*}}Lxray_synthetic_0
+; CHECK-NEXT:  .section {{.*}}xray_instr_map{{.*}}
+; CHECK-LABEL: Lxray_synthetic_0:
+; CHECK:       .long {{.*}}Lxray_sled_0
+; CHECK:       .long {{.*}}Lxray_sled_1