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-rw-r--r--test/CodeGen/Hexagon/inline-asm-vecpred128.ll15
1 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/inline-asm-vecpred128.ll b/test/CodeGen/Hexagon/inline-asm-vecpred128.ll
new file mode 100644
index 0000000000000..234f5a0b79260
--- /dev/null
+++ b/test/CodeGen/Hexagon/inline-asm-vecpred128.ll
@@ -0,0 +1,15 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+; REQUIRES: asserts
+
+; Make sure we can handle the 'q' constraint in the 128-byte mode.
+
+target triple = "hexagon"
+
+; CHECK-LABEL: fred
+; CHECK: if (q{{[0-3]}}) vmem
+define void @fred() #0 {
+ tail call void asm sideeffect "if ($0) vmem($1) = $2;", "q,r,v,~{memory}"(<32 x i32> undef, <32 x i32>* undef, <32 x i32> undef) #0
+ ret void
+}
+
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-double" }