3 files changed, 49 insertions, 4 deletions
diff --git a/test/CodeGen/PowerPC/cmp_elimination.ll b/test/CodeGen/PowerPC/cmp_elimination.ll
index 3251ae2881b93..6bc8b8a041c2d 100644
--- a/test/CodeGen/PowerPC/cmp_elimination.ll
+++ b/test/CodeGen/PowerPC/cmp_elimination.ll
@@ -1,4 +1,3 @@
-; XFAIL: *
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s
 ; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s
 
@@ -748,6 +747,37 @@ do.end:
   ret void
 }
 
+define void @func29(i32 signext %a) {
+; We cannot merge two compares due to difference in sign extension behaviors.
+; equivalent C code example:
+;   int a = .. ;
+;   if (a == -1) dummy1();
+;   if (a == (uint16_t)-1) dummy2();
+
+; CHECK-LABEL: @func29
+; CHECK: cmp
+; CHECK: cmp
+; CHECK: blr
+entry:
+  %cmp = icmp eq i32 %a, -1
+  br i1 %cmp, label %if.then, label %if.else
+
+if.then:
+  tail call void @dummy1()
+  br label %if.end3
+
+if.else:
+  %cmp1 = icmp eq i32 %a, 65535
+  br i1 %cmp1, label %if.then2, label %if.end3
+
+if.then2:
+  tail call void @dummy2()
+  br label %if.end3
+
+if.end3:
+  ret void
+}
+
 declare void @dummy1()
 declare void @dummy2()
 declare void @dummy3()
diff --git a/test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll b/test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll
new file mode 100644
index 0000000000000..ad8dd90ea9202
--- /dev/null
+++ b/test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll
@@ -0,0 +1,15 @@
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 \
+; RUN:   -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
+
+; Ensure we don't crash by trying to convert directly from a subword load
+; to a ppc_fp128 as we do for conversions to f32/f64.
+define ppc_fp128 @test(i16* nocapture readonly %Ptr) {
+entry:
+  %0 = load i16, i16* %Ptr, align 2
+  %conv = uitofp i16 %0 to ppc_fp128
+  ret ppc_fp128 %conv
+; CHECK: lhz [[LD:[0-9]+]], 0(3)
+; CHECK: mtvsrwa [[MV:[0-9]+]], [[LD]]
+; CHECK: xscvsxddp [[CONV:[0-9]+]], [[MV]]
+; CHECK: bl __gcc_qadd
+}
diff --git a/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll b/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
index 82c6c318abdc3..247961e85b121 100644
--- a/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
+++ b/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll
@@ -25,7 +25,7 @@ entry:
 ; CHECK: extsw 3, [[RSHREG]]
 ; CHECK-P7-DAG: rlwinm [[ELEMOFFREG:[0-9]+]], 5, 2, 28, 29
 ; CHECK-P7-DAG: stxvw4x 34,
-; CHECK-P7: lwax 3, [[ELEMOFFREG]],
+; CHECK-P7: lwax 3, 3, [[ELEMOFFREG]]
 ; CHECK-BE-DAG: andi. [[ANDREG:[0-9]+]], 5, 2
 ; CHECK-BE-DAG: sldi [[SLREG:[0-9]+]], [[ANDREG]], 2
 ; CHECK-BE-DAG: lvsl [[SHMSKREG:[0-9]+]], 0, [[SLREG]]
@@ -54,7 +54,7 @@ entry:
 ; CHECK: mfvsrd 3,
 ; CHECK-P7-DAG: rlwinm [[ELEMOFFREG:[0-9]+]], 5, 3, 28, 28
 ; CHECK-P7-DAG: stxvd2x 34,
-; CHECK-P7: ldx 3, [[ELEMOFFREG]],
+; CHECK-P7: ldx 3, 3, [[ELEMOFFREG]]
 ; CHECK-BE-DAG: andi. [[ANDREG:[0-9]+]], 5, 1
 ; CHECK-BE-DAG: sldi [[SLREG:[0-9]+]], [[ANDREG]], 3
 ; CHECK-BE-DAG: lvsl [[SHMSKREG:[0-9]+]], 0, [[SLREG]]
@@ -77,7 +77,7 @@ entry:
 ; CHECK: xscvspdpn 1,
 ; CHECK-P7-DAG: rlwinm [[ELEMOFFREG:[0-9]+]], 5, 2, 28, 29
 ; CHECK-P7-DAG: stxvw4x 34,
-; CHECK-P7: lfsx 1, [[ELEMOFFREG]],
+; CHECK-P7: lfsx 1, 3, [[ELEMOFFREG]]
 ; CHECK-BE: sldi [[ELNOREG:[0-9]+]], 5, 2
 ; CHECK-BE: lvsl [[SHMSKREG:[0-9]+]], 0, [[ELNOREG]]
 ; CHECK-BE: vperm {{[0-9]+}}, 2, 2, [[SHMSKREG]]