diff options
Diffstat (limited to 'test/CodeGen/SystemZ/atomicrmw-xchg-02.ll')
-rw-r--r-- | test/CodeGen/SystemZ/atomicrmw-xchg-02.ll | 55 |
1 files changed, 55 insertions, 0 deletions
diff --git a/test/CodeGen/SystemZ/atomicrmw-xchg-02.ll b/test/CodeGen/SystemZ/atomicrmw-xchg-02.ll new file mode 100644 index 0000000000000..31f802625a320 --- /dev/null +++ b/test/CodeGen/SystemZ/atomicrmw-xchg-02.ll @@ -0,0 +1,55 @@ +; Test 16-bit atomic exchange. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -check-prefix=CHECK-SHIFT + +; Check exchange with a variable. +; - CHECK is for the main loop. +; - CHECK-SHIFT makes sure that the negated shift count used by the second +; RLL is set up correctly. The negation is independent of the NILL and L +; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before +; being used in the RISBG (in contrast to things like atomic addition, +; which shift %r3 left so that %b is at the high end of the word). +define i16 @f1(i16 *%src, i16 %b) { +; CHECK: f1: +; CHECK: sllg [[SHIFT:%r[1-9]+]], %r2, 3 +; CHECK: nill %r2, 65532 +; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) +; CHECK: [[LABEL:\.[^:]*]]: +; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) +; CHECK: risbg [[ROT]], %r3, 32, 47, 16 +; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) +; CHECK: cs [[OLD]], [[NEW]], 0(%r2) +; CHECK: j{{g?}}lh [[LABEL]] +; CHECK: rll %r2, [[OLD]], 16([[SHIFT]]) +; CHECK: br %r14 +; +; CHECK-SHIFT: f1: +; CHECK-SHIFT-NOT: %r3 +; CHECK-SHIFT: sllg [[SHIFT:%r[1-9]+]], %r2, 3 +; CHECK-SHIFT-NOT: %r3 +; CHECK-SHIFT: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]] +; CHECK-SHIFT-NOT: %r3 +; CHECK-SHIFT: rll +; CHECK-SHIFT-NOT: %r3 +; CHECK-SHIFT: risbg {{%r[0-9]+}}, %r3, 32, 47, 16 +; CHECK-SHIFT: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]]) +; CHECK-SHIFT: rll +; CHECK-SHIFT: br %r14 + %res = atomicrmw xchg i16 *%src, i16 %b seq_cst + ret i16 %res +} + +; Check exchange with a constant. We should force the constant into +; a register and use the sequence above. +define i16 @f2(i16 *%src) { +; CHECK: f2: +; CHECK: lhi [[VALUE:%r[0-9]+]], -25536 +; CHECK: risbg {{%r[0-9]+}}, [[VALUE]], 32, 47, 16 +; CHECK: br %r14 +; +; CHECK-SHIFT: f2: +; CHECK-SHIFT: br %r14 + %res = atomicrmw xchg i16 *%src, i16 40000 seq_cst + ret i16 %res +} |