1 files changed, 12 insertions, 12 deletions
diff --git a/test/CodeGen/SystemZ/int-move-05.ll b/test/CodeGen/SystemZ/int-move-05.ll
index f61477e71830f..c21b88aa7baac 100644
--- a/test/CodeGen/SystemZ/int-move-05.ll
+++ b/test/CodeGen/SystemZ/int-move-05.ll
@@ -4,7 +4,7 @@
 
 ; Test an i16 store, which should get converted into an i32 truncation.
 define void @f1(i16 *%dst, i16 %val) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK: sth %r3, 0(%r2)
 ; CHECK: br %r14
   store i16 %val, i16 *%dst
@@ -13,7 +13,7 @@ define void @f1(i16 *%dst, i16 %val) {
 
 ; Test an i32 truncating store.
 define void @f2(i16 *%dst, i32 %val) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK: sth %r3, 0(%r2)
 ; CHECK: br %r14
   %trunc = trunc i32 %val to i16
@@ -23,7 +23,7 @@ define void @f2(i16 *%dst, i32 %val) {
 
 ; Test an i64 truncating store.
 define void @f3(i16 *%dst, i64 %val) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK: sth %r3, 0(%r2)
 ; CHECK: br %r14
   %trunc = trunc i64 %val to i16
@@ -33,7 +33,7 @@ define void @f3(i16 *%dst, i64 %val) {
 
 ; Check the high end of the STH range.
 define void @f4(i16 *%dst, i16 %val) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK: sth %r3, 4094(%r2)
 ; CHECK: br %r14
   %ptr = getelementptr i16 *%dst, i64 2047
@@ -43,7 +43,7 @@ define void @f4(i16 *%dst, i16 %val) {
 
 ; Check the next halfword up, which should use STHY instead of STH.
 define void @f5(i16 *%dst, i16 %val) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: sthy %r3, 4096(%r2)
 ; CHECK: br %r14
   %ptr = getelementptr i16 *%dst, i64 2048
@@ -53,7 +53,7 @@ define void @f5(i16 *%dst, i16 %val) {
 
 ; Check the high end of the aligned STHY range.
 define void @f6(i16 *%dst, i16 %val) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
 ; CHECK: sthy %r3, 524286(%r2)
 ; CHECK: br %r14
   %ptr = getelementptr i16 *%dst, i64 262143
@@ -64,7 +64,7 @@ define void @f6(i16 *%dst, i16 %val) {
 ; Check the next halfword up, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define void @f7(i16 *%dst, i16 %val) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
 ; CHECK: agfi %r2, 524288
 ; CHECK: sth %r3, 0(%r2)
 ; CHECK: br %r14
@@ -75,7 +75,7 @@ define void @f7(i16 *%dst, i16 %val) {
 
 ; Check the high end of the negative aligned STHY range.
 define void @f8(i16 *%dst, i16 %val) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
 ; CHECK: sthy %r3, -2(%r2)
 ; CHECK: br %r14
   %ptr = getelementptr i16 *%dst, i64 -1
@@ -85,7 +85,7 @@ define void @f8(i16 *%dst, i16 %val) {
 
 ; Check the low end of the STHY range.
 define void @f9(i16 *%dst, i16 %val) {
-; CHECK: f9:
+; CHECK-LABEL: f9:
 ; CHECK: sthy %r3, -524288(%r2)
 ; CHECK: br %r14
   %ptr = getelementptr i16 *%dst, i64 -262144
@@ -96,7 +96,7 @@ define void @f9(i16 *%dst, i16 %val) {
 ; Check the next halfword down, which needs separate address logic.
 ; Other sequences besides this one would be OK.
 define void @f10(i16 *%dst, i16 %val) {
-; CHECK: f10:
+; CHECK-LABEL: f10:
 ; CHECK: agfi %r2, -524290
 ; CHECK: sth %r3, 0(%r2)
 ; CHECK: br %r14
@@ -107,7 +107,7 @@ define void @f10(i16 *%dst, i16 %val) {
 
 ; Check that STH allows an index.
 define void @f11(i64 %dst, i64 %index, i16 %val) {
-; CHECK: f11:
+; CHECK-LABEL: f11:
 ; CHECK: sth %r4, 4094({{%r3,%r2|%r2,%r3}})
 ; CHECK: br %r14
   %add1 = add i64 %dst, %index
@@ -119,7 +119,7 @@ define void @f11(i64 %dst, i64 %index, i16 %val) {
 
 ; Check that STHY allows an index.
 define void @f12(i64 %dst, i64 %index, i16 %val) {
-; CHECK: f12:
+; CHECK-LABEL: f12:
 ; CHECK: sthy %r4, 4096({{%r3,%r2|%r2,%r3}})
 ; CHECK: br %r14
   %add1 = add i64 %dst, %index