1 files changed, 120 insertions, 0 deletions
diff --git a/test/CodeGen/X86/GlobalISel/legalize-sub-v512.mir b/test/CodeGen/X86/GlobalISel/legalize-sub-v512.mir
new file mode 100644
index 0000000000000..c88e074ca4131
--- /dev/null
+++ b/test/CodeGen/X86/GlobalISel/legalize-sub-v512.mir
@@ -0,0 +1,120 @@
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512bw -global-isel -run-pass=legalizer %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX512BW
+# TODO: add tests for additional configuration after the legalization supported
+--- |
+  define void @test_sub_v64i8() {
+    %ret = sub <64 x i8> undef, undef
+    ret void
+  }
+
+  define void @test_sub_v32i16() {
+    %ret = sub <32 x i16> undef, undef
+    ret void
+  }
+
+  define void @test_sub_v16i32() {
+    %ret = sub <16 x i32> undef, undef
+    ret void
+  }
+
+  define void @test_sub_v8i64() {
+    %ret = sub <8 x i64> undef, undef
+    ret void
+  }
+
+...
+---
+name:            test_sub_v64i8
+# ALL-LABEL: name:  test_sub_v64i8
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+# AVX512BW:          %0(<64 x s8>) = IMPLICIT_DEF
+# AVX512BW-NEXT:     %1(<64 x s8>) = IMPLICIT_DEF
+# AVX512BW-NEXT:     %2(<64 x s8>) = G_SUB %0, %1
+# AVX512BW-NEXT:     RET 0
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %zmm0, %zmm1
+
+    %0(<64 x s8>) = IMPLICIT_DEF
+    %1(<64 x s8>) = IMPLICIT_DEF
+    %2(<64 x s8>) = G_SUB %0, %1
+    RET 0
+
+...
+---
+name:            test_sub_v32i16
+# ALL-LABEL: name:  test_sub_v32i16
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+# AVX512BW:          %0(<32 x s16>) = IMPLICIT_DEF
+# AVX512BW-NEXT:     %1(<32 x s16>) = IMPLICIT_DEF
+# AVX512BW-NEXT:     %2(<32 x s16>) = G_SUB %0, %1
+# AVX512BW-NEXT:     RET 0
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %zmm0, %zmm1
+
+    %0(<32 x s16>) = IMPLICIT_DEF
+    %1(<32 x s16>) = IMPLICIT_DEF
+    %2(<32 x s16>) = G_SUB %0, %1
+    RET 0
+
+...
+---
+name:            test_sub_v16i32
+# ALL-LABEL: name:  test_sub_v16i32
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+# ALL:          %0(<16 x s32>) = IMPLICIT_DEF
+# ALL-NEXT:     %1(<16 x s32>) = IMPLICIT_DEF
+# ALL-NEXT:     %2(<16 x s32>) = G_SUB %0, %1
+# ALL-NEXT:     RET 0
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %zmm0, %zmm1
+
+    %0(<16 x s32>) = IMPLICIT_DEF
+    %1(<16 x s32>) = IMPLICIT_DEF
+    %2(<16 x s32>) = G_SUB %0, %1
+    RET 0
+
+...
+---
+name:            test_sub_v8i64
+# ALL-LABEL: name:  test_sub_v8i64
+alignment:       4
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+# ALL:          %0(<8 x s64>) = IMPLICIT_DEF
+# ALL-NEXT:     %1(<8 x s64>) = IMPLICIT_DEF
+# ALL-NEXT:     %2(<8 x s64>) = G_SUB %0, %1
+# ALL-NEXT:     RET 0
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: %zmm0, %zmm1
+
+    %0(<8 x s64>) = IMPLICIT_DEF
+    %1(<8 x s64>) = IMPLICIT_DEF
+    %2(<8 x s64>) = G_SUB %0, %1
+    RET 0
+
+...