diff options
Diffstat (limited to 'test/CodeGen/X86/GlobalISel/select-sub-v256.mir')
-rw-r--r-- | test/CodeGen/X86/GlobalISel/select-sub-v256.mir | 72 |
1 files changed, 36 insertions, 36 deletions
diff --git a/test/CodeGen/X86/GlobalISel/select-sub-v256.mir b/test/CodeGen/X86/GlobalISel/select-sub-v256.mir index fbc44997b4a2b..d6bde7fbb6910 100644 --- a/test/CodeGen/X86/GlobalISel/select-sub-v256.mir +++ b/test/CodeGen/X86/GlobalISel/select-sub-v256.mir @@ -30,19 +30,19 @@ alignment: 4 legalized: true regBankSelected: true # AVX2: registers: -# AVX2-NEXT: - { id: 0, class: vr256 } -# AVX2-NEXT: - { id: 1, class: vr256 } -# AVX2-NEXT: - { id: 2, class: vr256 } +# AVX2-NEXT: - { id: 0, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 1, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 2, class: vr256, preferred-register: '' } # # AVX512VL: registers: -# AVX512VL-NEXT: - { id: 0, class: vr256 } -# AVX512VL-NEXT: - { id: 1, class: vr256 } -# AVX512VL-NEXT: - { id: 2, class: vr256 } +# AVX512VL-NEXT: - { id: 0, class: vr256, preferred-register: '' } +# AVX512VL-NEXT: - { id: 1, class: vr256, preferred-register: '' } +# AVX512VL-NEXT: - { id: 2, class: vr256, preferred-register: '' } # # AVX512BWVL: registers: -# AVX512BWVL-NEXT: - { id: 0, class: vr256x } -# AVX512BWVL-NEXT: - { id: 1, class: vr256x } -# AVX512BWVL-NEXT: - { id: 2, class: vr256x } +# AVX512BWVL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 2, class: vr256x, preferred-register: '' } registers: - { id: 0, class: vecr } - { id: 1, class: vecr } @@ -70,19 +70,19 @@ alignment: 4 legalized: true regBankSelected: true # AVX2: registers: -# AVX2-NEXT: - { id: 0, class: vr256 } -# AVX2-NEXT: - { id: 1, class: vr256 } -# AVX2-NEXT: - { id: 2, class: vr256 } +# AVX2-NEXT: - { id: 0, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 1, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 2, class: vr256, preferred-register: '' } # # AVX512VL: registers: -# AVX512VL-NEXT: - { id: 0, class: vr256 } -# AVX512VL-NEXT: - { id: 1, class: vr256 } -# AVX512VL-NEXT: - { id: 2, class: vr256 } +# AVX512VL-NEXT: - { id: 0, class: vr256, preferred-register: '' } +# AVX512VL-NEXT: - { id: 1, class: vr256, preferred-register: '' } +# AVX512VL-NEXT: - { id: 2, class: vr256, preferred-register: '' } # # AVX512BWVL: registers: -# AVX512BWVL-NEXT: - { id: 0, class: vr256x } -# AVX512BWVL-NEXT: - { id: 1, class: vr256x } -# AVX512BWVL-NEXT: - { id: 2, class: vr256x } +# AVX512BWVL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 2, class: vr256x, preferred-register: '' } registers: - { id: 0, class: vecr } - { id: 1, class: vecr } @@ -110,19 +110,19 @@ alignment: 4 legalized: true regBankSelected: true # AVX2: registers: -# AVX2-NEXT: - { id: 0, class: vr256 } -# AVX2-NEXT: - { id: 1, class: vr256 } -# AVX2-NEXT: - { id: 2, class: vr256 } +# AVX2-NEXT: - { id: 0, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 1, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 2, class: vr256, preferred-register: '' } # # AVX512VL: registers: -# AVX512VL-NEXT: - { id: 0, class: vr256x } -# AVX512VL-NEXT: - { id: 1, class: vr256x } -# AVX512VL-NEXT: - { id: 2, class: vr256x } +# AVX512VL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } +# AVX512VL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } +# AVX512VL-NEXT: - { id: 2, class: vr256x, preferred-register: '' } # # AVX512BWVL: registers: -# AVX512BWVL-NEXT: - { id: 0, class: vr256x } -# AVX512BWVL-NEXT: - { id: 1, class: vr256x } -# AVX512BWVL-NEXT: - { id: 2, class: vr256x } +# AVX512BWVL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 2, class: vr256x, preferred-register: '' } registers: - { id: 0, class: vecr } - { id: 1, class: vecr } @@ -150,19 +150,19 @@ alignment: 4 legalized: true regBankSelected: true # AVX2: registers: -# AVX2-NEXT: - { id: 0, class: vr256 } -# AVX2-NEXT: - { id: 1, class: vr256 } -# AVX2-NEXT: - { id: 2, class: vr256 } +# AVX2-NEXT: - { id: 0, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 1, class: vr256, preferred-register: '' } +# AVX2-NEXT: - { id: 2, class: vr256, preferred-register: '' } # # AVX512VL: registers: -# AVX512VL-NEXT: - { id: 0, class: vr256x } -# AVX512VL-NEXT: - { id: 1, class: vr256x } -# AVX512VL-NEXT: - { id: 2, class: vr256x } +# AVX512VL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } +# AVX512VL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } +# AVX512VL-NEXT: - { id: 2, class: vr256x, preferred-register: '' } # # AVX512BWVL: registers: -# AVX512BWVL-NEXT: - { id: 0, class: vr256x } -# AVX512BWVL-NEXT: - { id: 1, class: vr256x } -# AVX512BWVL-NEXT: - { id: 2, class: vr256x } +# AVX512BWVL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } +# AVX512BWVL-NEXT: - { id: 2, class: vr256x, preferred-register: '' } registers: - { id: 0, class: vecr } - { id: 1, class: vecr } |