diff options
Diffstat (limited to 'test/CodeGen/X86/MergeConsecutiveStores.ll')
| -rw-r--r-- | test/CodeGen/X86/MergeConsecutiveStores.ll | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/test/CodeGen/X86/MergeConsecutiveStores.ll b/test/CodeGen/X86/MergeConsecutiveStores.ll index 4d7cb765d7b9e..4303b62544642 100644 --- a/test/CodeGen/X86/MergeConsecutiveStores.ll +++ b/test/CodeGen/X86/MergeConsecutiveStores.ll @@ -1,6 +1,5 @@ ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s ; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s -; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -addr-sink-using-gep=1 < %s | FileCheck -check-prefix=CHECK -check-prefix=BWON %s %struct.A = type { i8, i8, i8, i8, i8, i8, i8, i8 } %struct.B = type { i32, i32, i32, i32, i32, i32, i32, i32 } @@ -111,8 +110,7 @@ define void @merge_const_store_vec(i32 %count, %struct.B* nocapture %p) nounwind ; CHECK-LABEL: merge_nonconst_store: ; CHECK: movl $67305985 ; CHECK: movb -; CHECK: movb -; CHECK: movb +; CHECK: movw ; CHECK: movb ; CHECK: ret define void @merge_nonconst_store(i32 %count, i8 %zz, %struct.A* nocapture %p) nounwind uwtable noinline ssp { @@ -292,16 +290,12 @@ block4: ; preds = %4, %.lr.ph ret void } -;; On x86, even unaligned copies should be merged to vector ops. -;; TODO: however, this cannot happen at the moment, due to brokenness -;; in MergeConsecutiveStores. See UseAA FIXME in DAGCombiner.cpp -;; visitSTORE. - +;; On x86, even unaligned copies can be merged to vector ops. ; CHECK-LABEL: merge_loads_no_align: ; load: -; CHECK-NOT: vmovups ;; TODO +; CHECK: vmovups ; store: -; CHECK-NOT: vmovups ;; TODO +; CHECK: vmovups ; CHECK: ret define void @merge_loads_no_align(i32 %count, %struct.B* noalias nocapture %q, %struct.B* noalias nocapture %p) nounwind uwtable noinline ssp { %a1 = icmp sgt i32 %count, 0 @@ -583,8 +577,8 @@ define void @merge_vec_element_and_scalar_load([6 x i64]* %array) { ; CHECK-LABEL: merge_vec_element_and_scalar_load ; CHECK: movq (%rdi), %rax +; CHECK-NEXT: movq 8(%rdi), %rcx ; CHECK-NEXT: movq %rax, 32(%rdi) -; CHECK-NEXT: movq 8(%rdi), %rax -; CHECK-NEXT: movq %rax, 40(%rdi) +; CHECK-NEXT: movq %rcx, 40(%rdi) ; CHECK-NEXT: retq } |