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Diffstat (limited to 'test/CodeGen/X86/avx512ifmavl-intrinsics.ll')
-rw-r--r--test/CodeGen/X86/avx512ifmavl-intrinsics.ll97
1 files changed, 49 insertions, 48 deletions
diff --git a/test/CodeGen/X86/avx512ifmavl-intrinsics.ll b/test/CodeGen/X86/avx512ifmavl-intrinsics.ll
index 8ba45aa381974..3ca686cef3bf4 100644
--- a/test/CodeGen/X86/avx512ifmavl-intrinsics.ll
+++ b/test/CodeGen/X86/avx512ifmavl-intrinsics.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; NOTE: Assertions have been autogenerated by update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl -mattr=+avx512ifma | FileCheck %s
@@ -7,15 +8,15 @@ define <2 x i64>@test_int_x86_avx512_mask_vpmadd52h_uq_128(<2 x i64> %x0, <2 x i
; CHECK-LABEL: test_int_x86_avx512_mask_vpmadd52h_uq_128:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %xmm0, %xmm3
-; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm3 {%k1}
-; CHECK-NEXT: vmovaps %xmm0, %xmm4
-; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm4
+; CHECK-NEXT: vmovdqa %xmm0, %xmm3
+; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm3
+; CHECK-NEXT: vmovdqa %xmm0, %xmm4
+; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm4 {%k1}
; CHECK-NEXT: vpxor %xmm2, %xmm2, %xmm2
; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm0 {%k1}
; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %xmm0, %xmm3, %xmm0
-; CHECK-NEXT: vpaddq %xmm2, %xmm4, %xmm1
+; CHECK-NEXT: vpaddq %xmm0, %xmm4, %xmm0
+; CHECK-NEXT: vpaddq %xmm2, %xmm3, %xmm1
; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; CHECK-NEXT: retq
@@ -35,15 +36,15 @@ define <4 x i64>@test_int_x86_avx512_mask_vpmadd52h_uq_256(<4 x i64> %x0, <4 x i
; CHECK-LABEL: test_int_x86_avx512_mask_vpmadd52h_uq_256:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %ymm0, %ymm3
-; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm3 {%k1}
-; CHECK-NEXT: vmovaps %ymm0, %ymm4
-; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm4
+; CHECK-NEXT: vmovdqa %ymm0, %ymm3
+; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm3
+; CHECK-NEXT: vmovdqa %ymm0, %ymm4
+; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm4 {%k1}
; CHECK-NEXT: vpxor %ymm2, %ymm2, %ymm2
; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm0 {%k1}
; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %ymm0, %ymm3, %ymm0
-; CHECK-NEXT: vpaddq %ymm2, %ymm4, %ymm1
+; CHECK-NEXT: vpaddq %ymm0, %ymm4, %ymm0
+; CHECK-NEXT: vpaddq %ymm2, %ymm3, %ymm1
; CHECK-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; CHECK-NEXT: retq
@@ -63,15 +64,15 @@ define <2 x i64>@test_int_x86_avx512_maskz_vpmadd52h_uq_128(<2 x i64> %x0, <2 x
; CHECK-LABEL: test_int_x86_avx512_maskz_vpmadd52h_uq_128:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %xmm0, %xmm3
-; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm3 {%k1} {z}
-; CHECK-NEXT: vmovaps %xmm0, %xmm4
-; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm4
+; CHECK-NEXT: vmovdqa %xmm0, %xmm3
+; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm3
+; CHECK-NEXT: vmovdqa %xmm0, %xmm4
+; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm4 {%k1} {z}
; CHECK-NEXT: vpxor %xmm2, %xmm2, %xmm2
; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm0 {%k1} {z}
; CHECK-NEXT: vpmadd52huq %xmm2, %xmm1, %xmm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %xmm0, %xmm3, %xmm0
-; CHECK-NEXT: vpaddq %xmm2, %xmm4, %xmm1
+; CHECK-NEXT: vpaddq %xmm0, %xmm4, %xmm0
+; CHECK-NEXT: vpaddq %xmm2, %xmm3, %xmm1
; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; CHECK-NEXT: retq
@@ -91,15 +92,15 @@ define <4 x i64>@test_int_x86_avx512_maskz_vpmadd52h_uq_256(<4 x i64> %x0, <4 x
; CHECK-LABEL: test_int_x86_avx512_maskz_vpmadd52h_uq_256:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %ymm0, %ymm3
-; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm3 {%k1} {z}
-; CHECK-NEXT: vmovaps %ymm0, %ymm4
-; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm4
+; CHECK-NEXT: vmovdqa %ymm0, %ymm3
+; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm3
+; CHECK-NEXT: vmovdqa %ymm0, %ymm4
+; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm4 {%k1} {z}
; CHECK-NEXT: vpxor %ymm2, %ymm2, %ymm2
; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm0 {%k1} {z}
; CHECK-NEXT: vpmadd52huq %ymm2, %ymm1, %ymm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %ymm0, %ymm3, %ymm0
-; CHECK-NEXT: vpaddq %ymm2, %ymm4, %ymm1
+; CHECK-NEXT: vpaddq %ymm0, %ymm4, %ymm0
+; CHECK-NEXT: vpaddq %ymm2, %ymm3, %ymm1
; CHECK-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; CHECK-NEXT: retq
@@ -119,15 +120,15 @@ define <2 x i64>@test_int_x86_avx512_mask_vpmadd52l_uq_128(<2 x i64> %x0, <2 x i
; CHECK-LABEL: test_int_x86_avx512_mask_vpmadd52l_uq_128:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %xmm0, %xmm3
-; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm3 {%k1}
-; CHECK-NEXT: vmovaps %xmm0, %xmm4
-; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm4
+; CHECK-NEXT: vmovdqa %xmm0, %xmm3
+; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm3
+; CHECK-NEXT: vmovdqa %xmm0, %xmm4
+; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm4 {%k1}
; CHECK-NEXT: vpxor %xmm2, %xmm2, %xmm2
; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm0 {%k1}
; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %xmm0, %xmm3, %xmm0
-; CHECK-NEXT: vpaddq %xmm2, %xmm4, %xmm1
+; CHECK-NEXT: vpaddq %xmm0, %xmm4, %xmm0
+; CHECK-NEXT: vpaddq %xmm2, %xmm3, %xmm1
; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; CHECK-NEXT: retq
@@ -147,15 +148,15 @@ define <4 x i64>@test_int_x86_avx512_mask_vpmadd52l_uq_256(<4 x i64> %x0, <4 x i
; CHECK-LABEL: test_int_x86_avx512_mask_vpmadd52l_uq_256:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %ymm0, %ymm3
-; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm3 {%k1}
-; CHECK-NEXT: vmovaps %ymm0, %ymm4
-; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm4
+; CHECK-NEXT: vmovdqa %ymm0, %ymm3
+; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm3
+; CHECK-NEXT: vmovdqa %ymm0, %ymm4
+; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm4 {%k1}
; CHECK-NEXT: vpxor %ymm2, %ymm2, %ymm2
; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm0 {%k1}
; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %ymm0, %ymm3, %ymm0
-; CHECK-NEXT: vpaddq %ymm2, %ymm4, %ymm1
+; CHECK-NEXT: vpaddq %ymm0, %ymm4, %ymm0
+; CHECK-NEXT: vpaddq %ymm2, %ymm3, %ymm1
; CHECK-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; CHECK-NEXT: retq
@@ -175,15 +176,15 @@ define <2 x i64>@test_int_x86_avx512_maskz_vpmadd52l_uq_128(<2 x i64> %x0, <2 x
; CHECK-LABEL: test_int_x86_avx512_maskz_vpmadd52l_uq_128:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %xmm0, %xmm3
-; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm3 {%k1} {z}
-; CHECK-NEXT: vmovaps %xmm0, %xmm4
-; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm4
+; CHECK-NEXT: vmovdqa %xmm0, %xmm3
+; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm3
+; CHECK-NEXT: vmovdqa %xmm0, %xmm4
+; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm4 {%k1} {z}
; CHECK-NEXT: vpxor %xmm2, %xmm2, %xmm2
; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm0 {%k1} {z}
; CHECK-NEXT: vpmadd52luq %xmm2, %xmm1, %xmm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %xmm0, %xmm3, %xmm0
-; CHECK-NEXT: vpaddq %xmm2, %xmm4, %xmm1
+; CHECK-NEXT: vpaddq %xmm0, %xmm4, %xmm0
+; CHECK-NEXT: vpaddq %xmm2, %xmm3, %xmm1
; CHECK-NEXT: vpaddq %xmm0, %xmm1, %xmm0
; CHECK-NEXT: retq
@@ -203,15 +204,15 @@ define <4 x i64>@test_int_x86_avx512_maskz_vpmadd52l_uq_256(<4 x i64> %x0, <4 x
; CHECK-LABEL: test_int_x86_avx512_maskz_vpmadd52l_uq_256:
; CHECK: ## BB#0:
; CHECK-NEXT: kmovw %edi, %k1
-; CHECK-NEXT: vmovaps %ymm0, %ymm3
-; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm3 {%k1} {z}
-; CHECK-NEXT: vmovaps %ymm0, %ymm4
-; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm4
+; CHECK-NEXT: vmovdqa %ymm0, %ymm3
+; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm3
+; CHECK-NEXT: vmovdqa %ymm0, %ymm4
+; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm4 {%k1} {z}
; CHECK-NEXT: vpxor %ymm2, %ymm2, %ymm2
; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm0 {%k1} {z}
; CHECK-NEXT: vpmadd52luq %ymm2, %ymm1, %ymm2 {%k1} {z}
-; CHECK-NEXT: vpaddq %ymm0, %ymm3, %ymm0
-; CHECK-NEXT: vpaddq %ymm2, %ymm4, %ymm1
+; CHECK-NEXT: vpaddq %ymm0, %ymm4, %ymm0
+; CHECK-NEXT: vpaddq %ymm2, %ymm3, %ymm1
; CHECK-NEXT: vpaddq %ymm0, %ymm1, %ymm0
; CHECK-NEXT: retq
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-03 04:09:19 +0000