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-rw-r--r--test/CodeGen/X86/bool-ext-inc.ll32
1 files changed, 32 insertions, 0 deletions
diff --git a/test/CodeGen/X86/bool-ext-inc.ll b/test/CodeGen/X86/bool-ext-inc.ll
new file mode 100644
index 0000000000000..d0967c1021492
--- /dev/null
+++ b/test/CodeGen/X86/bool-ext-inc.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+
+; FIXME: add (sext i1 X), 1 -> zext (not i1 X)
+
+define i32 @sext_inc(i1 zeroext %x) nounwind {
+; CHECK-LABEL: sext_inc:
+; CHECK: # BB#0:
+; CHECK-NEXT: movzbl %dil, %ecx
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: subl %ecx, %eax
+; CHECK-NEXT: retq
+ %ext = sext i1 %x to i32
+ %add = add i32 %ext, 1
+ ret i32 %add
+}
+
+; FIXME: add (sext i1 X), 1 -> zext (not i1 X)
+
+define <4 x i32> @sext_inc_vec(<4 x i1> %x) nounwind {
+; CHECK-LABEL: sext_inc_vec:
+; CHECK: # BB#0:
+; CHECK-NEXT: pslld $31, %xmm0
+; CHECK-NEXT: psrad $31, %xmm0
+; CHECK-NEXT: paddd {{.*}}(%rip), %xmm0
+; CHECK-NEXT: retq
+ %ext = sext <4 x i1> %x to <4 x i32>
+ %add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>
+ ret <4 x i32> %add
+}
+
+