1 files changed, 37 insertions, 72 deletions
diff --git a/test/CodeGen/X86/peephole-na-phys-copy-folding.ll b/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
index 66047e3677f64..023de041dce92 100644
--- a/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
+++ b/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
@@ -1,13 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-linux-gnu %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK32
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sahf %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK64
-
-; TODO: Reenable verify-machineinstrs once the if (!AXDead) // FIXME in
-; X86InstrInfo::copyPhysReg() is resolved.
+; RUN: llc -mtriple=i386-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK32
+; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK64
 
 ; The peephole optimizer can elide some physical register copies such as
 ; EFLAGS. Make sure the flags are used directly, instead of needlessly using
-; lahf, when possible.
+; saving and restoring specific conditions.
 
 @L = external global i32
 @M = external global i8
@@ -209,29 +206,22 @@ exit2:
 define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) nounwind {
 ; CHECK32-LABEL: test_intervening_call:
 ; CHECK32:       # %bb.0: # %entry
-; CHECK32-NEXT:    pushl %ebp
-; CHECK32-NEXT:    movl %esp, %ebp
 ; CHECK32-NEXT:    pushl %ebx
 ; CHECK32-NEXT:    pushl %esi
-; CHECK32-NEXT:    movl 12(%ebp), %eax
-; CHECK32-NEXT:    movl 16(%ebp), %edx
-; CHECK32-NEXT:    movl 20(%ebp), %ebx
-; CHECK32-NEXT:    movl 24(%ebp), %ecx
-; CHECK32-NEXT:    movl 8(%ebp), %esi
-; CHECK32-NEXT:    lock cmpxchg8b (%esi)
 ; CHECK32-NEXT:    pushl %eax
-; CHECK32-NEXT:    seto %al
-; CHECK32-NEXT:    lahf
-; CHECK32-NEXT:    movl %eax, %esi
-; CHECK32-NEXT:    popl %eax
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %ebx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK32-NEXT:    lock cmpxchg8b (%esi)
+; CHECK32-NEXT:    setne %bl
 ; CHECK32-NEXT:    subl $8, %esp
 ; CHECK32-NEXT:    pushl %edx
 ; CHECK32-NEXT:    pushl %eax
 ; CHECK32-NEXT:    calll bar
 ; CHECK32-NEXT:    addl $16, %esp
-; CHECK32-NEXT:    movl %esi, %eax
-; CHECK32-NEXT:    addb $127, %al
-; CHECK32-NEXT:    sahf
+; CHECK32-NEXT:    testb %bl, %bl
 ; CHECK32-NEXT:    jne .LBB4_3
 ; CHECK32-NEXT:  # %bb.1: # %t
 ; CHECK32-NEXT:    movl $42, %eax
@@ -240,39 +230,28 @@ define i64 @test_intervening_call(i64* %foo, i64 %bar, i64 %baz) nounwind {
 ; CHECK32-NEXT:    xorl %eax, %eax
 ; CHECK32-NEXT:  .LBB4_2: # %t
 ; CHECK32-NEXT:    xorl %edx, %edx
+; CHECK32-NEXT:    addl $4, %esp
 ; CHECK32-NEXT:    popl %esi
 ; CHECK32-NEXT:    popl %ebx
-; CHECK32-NEXT:    popl %ebp
 ; CHECK32-NEXT:    retl
 ;
 ; CHECK64-LABEL: test_intervening_call:
 ; CHECK64:       # %bb.0: # %entry
-; CHECK64-NEXT:    pushq %rbp
-; CHECK64-NEXT:    movq %rsp, %rbp
 ; CHECK64-NEXT:    pushq %rbx
-; CHECK64-NEXT:    pushq %rax
 ; CHECK64-NEXT:    movq %rsi, %rax
 ; CHECK64-NEXT:    lock cmpxchgq %rdx, (%rdi)
-; CHECK64-NEXT:    pushq %rax
-; CHECK64-NEXT:    seto %al
-; CHECK64-NEXT:    lahf
-; CHECK64-NEXT:    movq %rax, %rbx
-; CHECK64-NEXT:    popq %rax
+; CHECK64-NEXT:    setne %bl
 ; CHECK64-NEXT:    movq %rax, %rdi
 ; CHECK64-NEXT:    callq bar
-; CHECK64-NEXT:    movq %rbx, %rax
-; CHECK64-NEXT:    addb $127, %al
-; CHECK64-NEXT:    sahf
-; CHECK64-NEXT:    jne .LBB4_3
+; CHECK64-NEXT:    testb %bl, %bl
+; CHECK64-NEXT:    jne .LBB4_2
 ; CHECK64-NEXT:  # %bb.1: # %t
 ; CHECK64-NEXT:    movl $42, %eax
-; CHECK64-NEXT:    jmp .LBB4_2
-; CHECK64-NEXT:  .LBB4_3: # %f
+; CHECK64-NEXT:    popq %rbx
+; CHECK64-NEXT:    retq
+; CHECK64-NEXT:  .LBB4_2: # %f
 ; CHECK64-NEXT:    xorl %eax, %eax
-; CHECK64-NEXT:  .LBB4_2: # %t
-; CHECK64-NEXT:    addq $8, %rsp
 ; CHECK64-NEXT:    popq %rbx
-; CHECK64-NEXT:    popq %rbp
 ; CHECK64-NEXT:    retq
 entry:
   ; cmpxchg sets EFLAGS, call clobbers it, then br uses EFLAGS.
@@ -293,32 +272,27 @@ define i64 @test_two_live_flags(i64* %foo0, i64 %bar0, i64 %baz0, i64* %foo1, i6
 ; CHECK32-LABEL: test_two_live_flags:
 ; CHECK32:       # %bb.0: # %entry
 ; CHECK32-NEXT:    pushl %ebp
-; CHECK32-NEXT:    movl %esp, %ebp
 ; CHECK32-NEXT:    pushl %ebx
 ; CHECK32-NEXT:    pushl %edi
 ; CHECK32-NEXT:    pushl %esi
-; CHECK32-NEXT:    movl 44(%ebp), %edi
-; CHECK32-NEXT:    movl 12(%ebp), %eax
-; CHECK32-NEXT:    movl 16(%ebp), %edx
-; CHECK32-NEXT:    movl 20(%ebp), %ebx
-; CHECK32-NEXT:    movl 24(%ebp), %ecx
-; CHECK32-NEXT:    movl 8(%ebp), %esi
+; CHECK32-NEXT:    pushl %eax
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %edi
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %ebp
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %edx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %ebx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %esi
+; CHECK32-NEXT:    lock cmpxchg8b (%esi)
+; CHECK32-NEXT:    setne {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK32-NEXT:    movl %edi, %edx
+; CHECK32-NEXT:    movl %ebp, %ecx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %ebx
+; CHECK32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; CHECK32-NEXT:    lock cmpxchg8b (%esi)
-; CHECK32-NEXT:    seto %al
-; CHECK32-NEXT:    lahf
-; CHECK32-NEXT:    movl %eax, %esi
-; CHECK32-NEXT:    movl 32(%ebp), %eax
-; CHECK32-NEXT:    movl 36(%ebp), %edx
-; CHECK32-NEXT:    movl %edi, %ecx
-; CHECK32-NEXT:    movl 40(%ebp), %ebx
-; CHECK32-NEXT:    movl 28(%ebp), %edi
-; CHECK32-NEXT:    lock cmpxchg8b (%edi)
 ; CHECK32-NEXT:    sete %al
-; CHECK32-NEXT:    pushl %eax
-; CHECK32-NEXT:    movl %esi, %eax
-; CHECK32-NEXT:    addb $127, %al
-; CHECK32-NEXT:    sahf
-; CHECK32-NEXT:    popl %eax
+; CHECK32-NEXT:    cmpb $0, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Reload
 ; CHECK32-NEXT:    jne .LBB5_4
 ; CHECK32-NEXT:  # %bb.1: # %entry
 ; CHECK32-NEXT:    testb %al, %al
@@ -330,6 +304,7 @@ define i64 @test_two_live_flags(i64* %foo0, i64 %bar0, i64 %baz0, i64* %foo1, i6
 ; CHECK32-NEXT:    xorl %eax, %eax
 ; CHECK32-NEXT:  .LBB5_3: # %t
 ; CHECK32-NEXT:    xorl %edx, %edx
+; CHECK32-NEXT:    addl $4, %esp
 ; CHECK32-NEXT:    popl %esi
 ; CHECK32-NEXT:    popl %edi
 ; CHECK32-NEXT:    popl %ebx
@@ -338,32 +313,22 @@ define i64 @test_two_live_flags(i64* %foo0, i64 %bar0, i64 %baz0, i64* %foo1, i6
 ;
 ; CHECK64-LABEL: test_two_live_flags:
 ; CHECK64:       # %bb.0: # %entry
-; CHECK64-NEXT:    pushq %rbp
-; CHECK64-NEXT:    movq %rsp, %rbp
 ; CHECK64-NEXT:    movq %rsi, %rax
 ; CHECK64-NEXT:    lock cmpxchgq %rdx, (%rdi)
-; CHECK64-NEXT:    seto %al
-; CHECK64-NEXT:    lahf
-; CHECK64-NEXT:    movq %rax, %rdx
+; CHECK64-NEXT:    setne %dl
 ; CHECK64-NEXT:    movq %r8, %rax
 ; CHECK64-NEXT:    lock cmpxchgq %r9, (%rcx)
 ; CHECK64-NEXT:    sete %al
-; CHECK64-NEXT:    pushq %rax
-; CHECK64-NEXT:    movq %rdx, %rax
-; CHECK64-NEXT:    addb $127, %al
-; CHECK64-NEXT:    sahf
-; CHECK64-NEXT:    popq %rax
+; CHECK64-NEXT:    testb %dl, %dl
 ; CHECK64-NEXT:    jne .LBB5_3
 ; CHECK64-NEXT:  # %bb.1: # %entry
 ; CHECK64-NEXT:    testb %al, %al
 ; CHECK64-NEXT:    je .LBB5_3
 ; CHECK64-NEXT:  # %bb.2: # %t
 ; CHECK64-NEXT:    movl $42, %eax
-; CHECK64-NEXT:    popq %rbp
 ; CHECK64-NEXT:    retq
 ; CHECK64-NEXT:  .LBB5_3: # %f
 ; CHECK64-NEXT:    xorl %eax, %eax
-; CHECK64-NEXT:    popq %rbp
 ; CHECK64-NEXT:    retq
 entry:
   %cx0 = cmpxchg i64* %foo0, i64 %bar0, i64 %baz0 seq_cst seq_cst