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-rw-r--r--test/CodeGen/X86/vec_set-A.ll19
1 files changed, 13 insertions, 6 deletions
diff --git a/test/CodeGen/X86/vec_set-A.ll b/test/CodeGen/X86/vec_set-A.ll
index cae39a3d775b2..259ace98d3622 100644
--- a/test/CodeGen/X86/vec_set-A.ll
+++ b/test/CodeGen/X86/vec_set-A.ll
@@ -1,12 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define <2 x i64> @test1() nounwind {
-; CHECK-LABEL: test1:
-; CHECK: # BB#0:
-; CHECK-NEXT: movl $1, %eax
-; CHECK-NEXT: movd %eax, %xmm0
-; CHECK-NEXT: retl
+; X86-LABEL: test1:
+; X86: # BB#0:
+; X86-NEXT: movl $1, %eax
+; X86-NEXT: movd %eax, %xmm0
+; X86-NEXT: retl
+;
+; X64-LABEL: test1:
+; X64: # BB#0:
+; X64-NEXT: movl $1, %eax
+; X64-NEXT: movq %rax, %xmm0
+; X64-NEXT: retq
ret <2 x i64> < i64 1, i64 0 >
}