diff options
Diffstat (limited to 'test/CodeGen/X86/vector-shuffle-combining-avx2.ll')
| -rw-r--r-- | test/CodeGen/X86/vector-shuffle-combining-avx2.ll | 188 |
1 files changed, 157 insertions, 31 deletions
diff --git a/test/CodeGen/X86/vector-shuffle-combining-avx2.ll b/test/CodeGen/X86/vector-shuffle-combining-avx2.ll index d34bbb6010316..1385929ab8cd3 100644 --- a/test/CodeGen/X86/vector-shuffle-combining-avx2.ll +++ b/test/CodeGen/X86/vector-shuffle-combining-avx2.ll @@ -1,6 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32 -; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX2 +; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefix=X32 --check-prefix=X32-AVX512 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX2 +; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=X64 --check-prefix=X64-AVX512 declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>) declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>) @@ -72,12 +74,14 @@ define <32 x i8> @combine_pshufb_vpermps(<8 x float> %a) { define <32 x i8> @combine_and_pshufb(<32 x i8> %a0) { ; X32-LABEL: combine_and_pshufb: ; X32: # BB#0: -; X32-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 +; X32-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X32-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15] ; X32-NEXT: retl ; ; X64-LABEL: combine_and_pshufb: ; X64: # BB#0: -; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 +; X64-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X64-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15] ; X64-NEXT: retq %1 = shufflevector <32 x i8> %a0, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31> %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) @@ -87,12 +91,14 @@ define <32 x i8> @combine_and_pshufb(<32 x i8> %a0) { define <32 x i8> @combine_pshufb_and(<32 x i8> %a0) { ; X32-LABEL: combine_pshufb_and: ; X32: # BB#0: -; X32-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 +; X32-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X32-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15] ; X32-NEXT: retl ; ; X64-LABEL: combine_pshufb_and: ; X64: # BB#0: -; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 +; X64-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X64-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15] ; X64-NEXT: retq %1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31> @@ -480,14 +486,12 @@ define <8 x float> @combine_permps_as_permpd(<8 x float> %a) { define <4 x i64> @combine_pshufb_as_zext(<32 x i8> %a0) { ; X32-LABEL: combine_pshufb_as_zext: ; X32: # BB#0: -; X32-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,0,1] -; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[8,9],zero,zero,zero,zero,zero,zero,ymm0[10,11],zero,zero,zero,zero,zero,zero,ymm0[20,21],zero,zero,zero,zero,zero,zero,ymm0[22,23],zero,zero,zero,zero,zero,zero +; X32-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero ; X32-NEXT: retl ; ; X64-LABEL: combine_pshufb_as_zext: ; X64: # BB#0: -; X64-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,0,1] -; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[8,9],zero,zero,zero,zero,zero,zero,ymm0[10,11],zero,zero,zero,zero,zero,zero,ymm0[20,21],zero,zero,zero,zero,zero,zero,ymm0[22,23],zero,zero,zero,zero,zero,zero +; X64-NEXT: vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero ; X64-NEXT: retq %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 10, i8 11, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 4, i8 5, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) @@ -499,7 +503,7 @@ define <4 x i64> @combine_pshufb_as_zext128(<32 x i8> %a0) { ; X32-LABEL: combine_pshufb_as_zext128: ; X32: # BB#0: ; X32-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0] -; X32-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,0,1] +; X32-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[0,1,0,1] ; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[15,14],zero,zero,zero,zero,zero,zero,ymm0[13,12],zero,zero,zero,zero,zero,zero,ymm0[31,30],zero,zero,zero,zero,zero,zero,ymm0[29,28],zero,zero,zero,zero,zero,zero ; X32-NEXT: retl ; @@ -516,17 +520,29 @@ define <4 x i64> @combine_pshufb_as_zext128(<32 x i8> %a0) { } define <4 x double> @combine_pshufb_as_vzmovl_64(<4 x double> %a0) { -; X32-LABEL: combine_pshufb_as_vzmovl_64: -; X32: # BB#0: -; X32-NEXT: vxorpd %ymm1, %ymm1, %ymm1 -; X32-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] -; X32-NEXT: retl +; X32-AVX2-LABEL: combine_pshufb_as_vzmovl_64: +; X32-AVX2: # BB#0: +; X32-AVX2-NEXT: vxorpd %ymm1, %ymm1, %ymm1 +; X32-AVX2-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] +; X32-AVX2-NEXT: retl ; -; X64-LABEL: combine_pshufb_as_vzmovl_64: -; X64: # BB#0: -; X64-NEXT: vxorpd %ymm1, %ymm1, %ymm1 -; X64-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] -; X64-NEXT: retq +; X32-AVX512-LABEL: combine_pshufb_as_vzmovl_64: +; X32-AVX512: # BB#0: +; X32-AVX512-NEXT: vxorpd %xmm1, %xmm1, %xmm1 +; X32-AVX512-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1] +; X32-AVX512-NEXT: retl +; +; X64-AVX2-LABEL: combine_pshufb_as_vzmovl_64: +; X64-AVX2: # BB#0: +; X64-AVX2-NEXT: vxorpd %ymm1, %ymm1, %ymm1 +; X64-AVX2-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] +; X64-AVX2-NEXT: retq +; +; X64-AVX512-LABEL: combine_pshufb_as_vzmovl_64: +; X64-AVX512: # BB#0: +; X64-AVX512-NEXT: vxorpd %xmm1, %xmm1, %xmm1 +; X64-AVX512-NEXT: vmovsd {{.*#+}} xmm0 = xmm0[0],xmm1[1] +; X64-AVX512-NEXT: retq %1 = bitcast <4 x double> %a0 to <32 x i8> %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) %3 = bitcast <32 x i8> %2 to <4 x double> @@ -534,17 +550,29 @@ define <4 x double> @combine_pshufb_as_vzmovl_64(<4 x double> %a0) { } define <8 x float> @combine_pshufb_as_vzmovl_32(<8 x float> %a0) { -; X32-LABEL: combine_pshufb_as_vzmovl_32: -; X32: # BB#0: -; X32-NEXT: vxorps %ymm1, %ymm1, %ymm1 -; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] -; X32-NEXT: retl +; X32-AVX2-LABEL: combine_pshufb_as_vzmovl_32: +; X32-AVX2: # BB#0: +; X32-AVX2-NEXT: vxorps %ymm1, %ymm1, %ymm1 +; X32-AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] +; X32-AVX2-NEXT: retl ; -; X64-LABEL: combine_pshufb_as_vzmovl_32: -; X64: # BB#0: -; X64-NEXT: vxorps %ymm1, %ymm1, %ymm1 -; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] -; X64-NEXT: retq +; X32-AVX512-LABEL: combine_pshufb_as_vzmovl_32: +; X32-AVX512: # BB#0: +; X32-AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1 +; X32-AVX512-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] +; X32-AVX512-NEXT: retl +; +; X64-AVX2-LABEL: combine_pshufb_as_vzmovl_32: +; X64-AVX2: # BB#0: +; X64-AVX2-NEXT: vxorps %ymm1, %ymm1, %ymm1 +; X64-AVX2-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] +; X64-AVX2-NEXT: retq +; +; X64-AVX512-LABEL: combine_pshufb_as_vzmovl_32: +; X64-AVX512: # BB#0: +; X64-AVX512-NEXT: vxorps %xmm1, %xmm1, %xmm1 +; X64-AVX512-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3] +; X64-AVX512-NEXT: retq %1 = bitcast <8 x float> %a0 to <32 x i8> %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) %3 = bitcast <32 x i8> %2 to <8 x float> @@ -664,6 +692,51 @@ define <32 x i8> @combine_pshufb_not_as_pshufw(<32 x i8> %a0) { ret <32 x i8> %res1 } +define <32 x i8> @combine_pshufb_as_unpacklo_undef(<32 x i8> %a0) { +; X32-LABEL: combine_pshufb_as_unpacklo_undef: +; X32: # BB#0: +; X32-NEXT: retl +; +; X64-LABEL: combine_pshufb_as_unpacklo_undef: +; X64: # BB#0: +; X64-NEXT: retq + %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 undef, i8 0, i8 undef, i8 1, i8 undef, i8 2, i8 undef, i8 3, i8 undef, i8 4, i8 undef, i8 5, i8 undef, i8 6, i8 undef, i8 7, i8 undef, i8 16, i8 undef, i8 17, i8 undef, i8 18, i8 undef, i8 19, i8 undef, i8 20, i8 undef, i8 21, i8 undef, i8 22, i8 undef, i8 23>) + %2 = shufflevector <32 x i8> %1, <32 x i8> undef, <32 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6, i32 8, i32 8, i32 10, i32 10, i32 12, i32 12, i32 14, i32 14, i32 16, i32 16, i32 18, i32 18, i32 20, i32 20, i32 22, i32 22, i32 24, i32 24, i32 26, i32 26, i32 28, i32 28, i32 30, i32 30> + ret <32 x i8> %2 +} + +define <32 x i8> @combine_pshufb_as_unpacklo_zero(<32 x i8> %a0) { +; X32-LABEL: combine_pshufb_as_unpacklo_zero: +; X32: # BB#0: +; X32-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X32-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11] +; X32-NEXT: retl +; +; X64-LABEL: combine_pshufb_as_unpacklo_zero: +; X64: # BB#0: +; X64-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X64-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0],ymm1[0],ymm0[1],ymm1[1],ymm0[2],ymm1[2],ymm0[3],ymm1[3],ymm0[8],ymm1[8],ymm0[9],ymm1[9],ymm0[10],ymm1[10],ymm0[11],ymm1[11] +; X64-NEXT: retq + %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 2, i8 3, i8 -1, i8 -1, i8 4, i8 5, i8 -1, i8 -1, i8 6, i8 7, i8 -1, i8 -1, i8 16, i8 17, i8 -1, i8 -1, i8 18, i8 19, i8 -1, i8 -1, i8 20, i8 21, i8 -1, i8 -1, i8 22, i8 23, i8 -1, i8 -1>) + ret <32 x i8> %1 +} + +define <32 x i8> @combine_pshufb_as_unpackhi_zero(<32 x i8> %a0) { +; X32-LABEL: combine_pshufb_as_unpackhi_zero: +; X32: # BB#0: +; X32-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X32-NEXT: vpunpckhbw {{.*#+}} ymm0 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31] +; X32-NEXT: retl +; +; X64-LABEL: combine_pshufb_as_unpackhi_zero: +; X64: # BB#0: +; X64-NEXT: vpxor %ymm1, %ymm1, %ymm1 +; X64-NEXT: vpunpckhbw {{.*#+}} ymm0 = ymm1[8],ymm0[8],ymm1[9],ymm0[9],ymm1[10],ymm0[10],ymm1[11],ymm0[11],ymm1[12],ymm0[12],ymm1[13],ymm0[13],ymm1[14],ymm0[14],ymm1[15],ymm0[15],ymm1[24],ymm0[24],ymm1[25],ymm0[25],ymm1[26],ymm0[26],ymm1[27],ymm0[27],ymm1[28],ymm0[28],ymm1[29],ymm0[29],ymm1[30],ymm0[30],ymm1[31],ymm0[31] +; X64-NEXT: retq + %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 -1, i8 8, i8 -1, i8 9, i8 -1, i8 10, i8 -1, i8 11, i8 -1, i8 12, i8 -1, i8 13, i8 -1, i8 14, i8 -1, i8 15, i8 -1, i8 24, i8 -1, i8 25, i8 -1, i8 26, i8 -1, i8 27, i8 -1, i8 28, i8 -1, i8 29, i8 -1, i8 30, i8 -1, i8 31>) + ret <32 x i8> %1 +} + define <32 x i8> @combine_psrlw_pshufb(<16 x i16> %a0) { ; X32-LABEL: combine_psrlw_pshufb: ; X32: # BB#0: @@ -712,6 +785,59 @@ define <32 x i8> @combine_psrlq_pshufb(<4 x i64> %a0) { ret <32 x i8> %3 } +define <32 x i8> @combine_unpack_unpack_pshufb(<32 x i8> %a0) { +; X32-LABEL: combine_unpack_unpack_pshufb: +; X32: # BB#0: +; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,0,4,8,1,1,5,9,2,2,6,10,3,3,7,11,16,16,20,24,17,17,21,25,18,18,22,26,19,19,23,27] +; X32-NEXT: retl +; +; X64-LABEL: combine_unpack_unpack_pshufb: +; X64: # BB#0: +; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,0,4,8,1,1,5,9,2,2,6,10,3,3,7,11,16,16,20,24,17,17,21,25,18,18,22,26,19,19,23,27] +; X64-NEXT: retq + %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19, i32 16, i32 17, i32 18, i32 19> + %2 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %3 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 24, i32 25, i32 26, i32 27, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %4 = shufflevector <32 x i8> %1, <32 x i8> %2, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %5 = shufflevector <32 x i8> %1, <32 x i8> %3, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %6 = shufflevector <32 x i8> %4, <32 x i8> %5, <32 x i32> <i32 0, i32 32, i32 1, i32 33, i32 2, i32 34, i32 3, i32 35, i32 4, i32 36, i32 5, i32 37, i32 6, i32 38, i32 7, i32 39, i32 16, i32 48, i32 17, i32 49, i32 18, i32 50, i32 19, i32 51, i32 20, i32 52, i32 21, i32 53, i32 22, i32 54, i32 23, i32 55> + ret <32 x i8> %6 +} + +define <16 x i8> @combine_pshufb_insertion_as_broadcast_v2i64(i64 %a0) { +; X32-LABEL: combine_pshufb_insertion_as_broadcast_v2i64: +; X32: # BB#0: +; X32-NEXT: vpbroadcastq {{[0-9]+}}(%esp), %xmm0 +; X32-NEXT: retl +; +; X64-LABEL: combine_pshufb_insertion_as_broadcast_v2i64: +; X64: # BB#0: +; X64-NEXT: vmovq %rdi, %xmm0 +; X64-NEXT: vpbroadcastq %xmm0, %xmm0 +; X64-NEXT: retq + %1 = insertelement <2 x i64> undef, i64 %a0, i32 0 + %2 = bitcast <2 x i64> %1 to <16 x i8> + %3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>) + ret <16 x i8> %3 +} + +define <8 x i32> @combine_permd_insertion_as_broadcast_v4i64(i64 %a0) { +; X32-LABEL: combine_permd_insertion_as_broadcast_v4i64: +; X32: # BB#0: +; X32-NEXT: vbroadcastsd {{[0-9]+}}(%esp), %ymm0 +; X32-NEXT: retl +; +; X64-LABEL: combine_permd_insertion_as_broadcast_v4i64: +; X64: # BB#0: +; X64-NEXT: vmovq %rdi, %xmm0 +; X64-NEXT: vpbroadcastq %xmm0, %ymm0 +; X64-NEXT: retq + %1 = insertelement <4 x i64> undef, i64 %a0, i32 0 + %2 = bitcast <4 x i64> %1 to <8 x i32> + %3 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>) + ret <8 x i32> %3 +} + define <8 x i32> @constant_fold_permd() { ; X32-LABEL: constant_fold_permd: ; X32: # BB#0: |