diff options
Diffstat (limited to 'test/CodeGen/X86/widen_cast-2.ll')
| -rw-r--r-- | test/CodeGen/X86/widen_cast-2.ll | 77 |
1 files changed, 50 insertions, 27 deletions
diff --git a/test/CodeGen/X86/widen_cast-2.ll b/test/CodeGen/X86/widen_cast-2.ll index 5a9acbd52f209..8caa962e4ec89 100644 --- a/test/CodeGen/X86/widen_cast-2.ll +++ b/test/CodeGen/X86/widen_cast-2.ll @@ -1,46 +1,69 @@ -; RUN: llc < %s -march=x86 -mcpu=nehalem -mattr=+sse4.2 | FileCheck %s -; CHECK: pextrd -; CHECK: pextrd -; CHECK: movd -; CHECK: movdqa - - +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s ; bitcast v14i16 to v7i32 define void @convert(<7 x i32>* %dst, <14 x i16>* %src) nounwind { +; CHECK-LABEL: convert: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: pushl %eax +; CHECK-NEXT: movl $0, (%esp) +; CHECK-NEXT: pcmpeqd %xmm0, %xmm0 +; CHECK-NEXT: cmpl $3, (%esp) +; CHECK-NEXT: jg .LBB0_3 +; CHECK-NEXT: .p2align 4, 0x90 +; CHECK-NEXT: .LBB0_2: # %forbody +; CHECK-NEXT: # =>This Inner Loop Header: Depth=1 +; CHECK-NEXT: movl (%esp), %eax +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx +; CHECK-NEXT: shll $5, %eax +; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx +; CHECK-NEXT: movdqa (%edx,%eax), %xmm1 +; CHECK-NEXT: movdqa 16(%edx,%eax), %xmm2 +; CHECK-NEXT: psubw %xmm0, %xmm1 +; CHECK-NEXT: psubw %xmm0, %xmm2 +; CHECK-NEXT: pextrd $2, %xmm2, 24(%ecx,%eax) +; CHECK-NEXT: pextrd $1, %xmm2, 20(%ecx,%eax) +; CHECK-NEXT: movd %xmm2, 16(%ecx,%eax) +; CHECK-NEXT: movdqa %xmm1, (%ecx,%eax) +; CHECK-NEXT: incl (%esp) +; CHECK-NEXT: cmpl $3, (%esp) +; CHECK-NEXT: jle .LBB0_2 +; CHECK-NEXT: .LBB0_3: # %afterfor +; CHECK-NEXT: popl %eax +; CHECK-NEXT: retl entry: - %dst.addr = alloca <7 x i32>* ; <<7 x i32>**> [#uses=2] - %src.addr = alloca <14 x i16>* ; <<14 x i16>**> [#uses=2] - %i = alloca i32, align 4 ; <i32*> [#uses=6] + %dst.addr = alloca <7 x i32>* + %src.addr = alloca <14 x i16>* + %i = alloca i32, align 4 store <7 x i32>* %dst, <7 x i32>** %dst.addr store <14 x i16>* %src, <14 x i16>** %src.addr store i32 0, i32* %i br label %forcond -forcond: ; preds = %forinc, %entry - %tmp = load i32, i32* %i ; <i32> [#uses=1] - %cmp = icmp slt i32 %tmp, 4 ; <i1> [#uses=1] +forcond: + %tmp = load i32, i32* %i + %cmp = icmp slt i32 %tmp, 4 br i1 %cmp, label %forbody, label %afterfor -forbody: ; preds = %forcond - %tmp1 = load i32, i32* %i ; <i32> [#uses=1] - %tmp2 = load <7 x i32>*, <7 x i32>** %dst.addr ; <<2 x i32>*> [#uses=1] - %arrayidx = getelementptr <7 x i32>, <7 x i32>* %tmp2, i32 %tmp1 ; <<7 x i32>*> [#uses=1] - %tmp3 = load i32, i32* %i ; <i32> [#uses=1] - %tmp4 = load <14 x i16>*, <14 x i16>** %src.addr ; <<4 x i16>*> [#uses=1] - %arrayidx5 = getelementptr <14 x i16>, <14 x i16>* %tmp4, i32 %tmp3 ; <<4 x i16>*> [#uses=1] - %tmp6 = load <14 x i16>, <14 x i16>* %arrayidx5 ; <<4 x i16>> [#uses=1] - %add = add <14 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 > ; <<4 x i16>> [#uses=1] - %conv = bitcast <14 x i16> %add to <7 x i32> ; <<7 x i32>> [#uses=1] +forbody: + %tmp1 = load i32, i32* %i + %tmp2 = load <7 x i32>*, <7 x i32>** %dst.addr + %arrayidx = getelementptr <7 x i32>, <7 x i32>* %tmp2, i32 %tmp1 + %tmp3 = load i32, i32* %i + %tmp4 = load <14 x i16>*, <14 x i16>** %src.addr + %arrayidx5 = getelementptr <14 x i16>, <14 x i16>* %tmp4, i32 %tmp3 + %tmp6 = load <14 x i16>, <14 x i16>* %arrayidx5 + %add = add <14 x i16> %tmp6, < i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1 > + %conv = bitcast <14 x i16> %add to <7 x i32> store <7 x i32> %conv, <7 x i32>* %arrayidx br label %forinc -forinc: ; preds = %forbody - %tmp7 = load i32, i32* %i ; <i32> [#uses=1] - %inc = add i32 %tmp7, 1 ; <i32> [#uses=1] +forinc: + %tmp7 = load i32, i32* %i + %inc = add i32 %tmp7, 1 store i32 %inc, i32* %i br label %forcond -afterfor: ; preds = %forcond +afterfor: ret void } |