diff options
Diffstat (limited to 'test/CodeGen/builtins-ppc-vsx.c')
| -rw-r--r-- | test/CodeGen/builtins-ppc-vsx.c | 111 |
1 files changed, 111 insertions, 0 deletions
diff --git a/test/CodeGen/builtins-ppc-vsx.c b/test/CodeGen/builtins-ppc-vsx.c index 9e0052630ef7f..6dda19d5d9f33 100644 --- a/test/CodeGen/builtins-ppc-vsx.c +++ b/test/CodeGen/builtins-ppc-vsx.c @@ -1691,4 +1691,115 @@ vec_xst_be(vd, sll, ad); res_vd = vec_neg(vd); // CHECK: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, {{%[0-9]+}} // CHECK-LE: fsub <2 x double> <double -0.000000e+00, double -0.000000e+00>, {{%[0-9]+}} + +res_vd = vec_xxpermdi(vd, vd, 0); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 2> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 3, i32 1> + +res_vf = vec_xxpermdi(vf, vf, 1); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 3> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 2, i32 1> + +res_vsll = vec_xxpermdi(vsll, vsll, 2); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 2> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 3, i32 0> + +res_vull = vec_xxpermdi(vull, vull, 3); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 3> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 2, i32 0> + +res_vsi = vec_xxpermdi(vsi, vsi, 0); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 2> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 3, i32 1> + +res_vui = vec_xxpermdi(vui, vui, 1); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 3> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 2, i32 1> + +res_vss = vec_xxpermdi(vss, vss, 2); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 2> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 3, i32 0> + +res_vus = vec_xxpermdi(vus, vus, 3); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 1, i32 3> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 2, i32 0> + +res_vsc = vec_xxpermdi(vsc, vsc, 0); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 2> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 3, i32 1> + +res_vuc = vec_xxpermdi(vuc, vuc, 1); +// CHECK: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 3> +// CHECK-LE: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 2, i32 1> + +res_vd = vec_xxsldwi(vd, vd, 0); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + +res_vf = vec_xxsldwi(vf, vf, 1); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 7, i32 0, i32 1, i32 2> + +res_vsll = vec_xxsldwi(vsll, vsll, 2); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 2, i32 3, i32 4, i32 5> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 6, i32 7, i32 0, i32 1> + +res_vull = vec_xxsldwi(vull, vull, 3); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 3, i32 4, i32 5, i32 6> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 5, i32 6, i32 7, i32 0> + +res_vsi = vec_xxsldwi(vsi, vsi, 0); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + +res_vui = vec_xxsldwi(vui, vui, 1); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 7, i32 0, i32 1, i32 2> + +res_vss = vec_xxsldwi(vss, vss, 2); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 2, i32 3, i32 4, i32 5> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 6, i32 7, i32 0, i32 1> + + +res_vus = vec_xxsldwi(vus, vus, 3); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 3, i32 4, i32 5, i32 6> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 5, i32 6, i32 7, i32 0> + +res_vsc = vec_xxsldwi(vsc, vsc, 0); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + +res_vuc = vec_xxsldwi(vuc, vuc, 1); +// CHECK: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> +// CHECK-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 7, i32 0, i32 1, i32 2> +} + +// The return type of the call expression may be different from the return type of the shufflevector. +// Wrong implementation could crash the compiler, add this test case to check that and avoid ICE. +vector int xxpermdi_should_not_assert(vector int a, vector int b) { + return vec_xxpermdi(a, b, 0); +// CHECK-LABEL: xxpermdi_should_not_assert +// CHECK: bitcast <4 x i32> %{{[0-9]+}} to <2 x i64> +// CHECK-NEXT: bitcast <4 x i32> %{{[0-9]+}} to <2 x i64> +// CHECK-NEXT: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 0, i32 2> +// CHECK-NEXT: bitcast <2 x i64> %{{[0-9]+}} to <4 x i32> + +// CHECK-LE: bitcast <4 x i32> %{{[0-9]+}} to <2 x i64> +// CHECK-LE-NEXT: bitcast <4 x i32> %{{[0-9]+}} to <2 x i64> +// CHECK-LE-NEXT: shufflevector <2 x i64> %{{[0-9]+}}, <2 x i64> %{{[0-9]+}}, <2 x i32> <i32 3, i32 1> +// CHECK-LE-NEXT: bitcast <2 x i64> %{{[0-9]+}} to <4 x i32> +} + +vector double xxsldwi_should_not_assert(vector double a, vector double b) { + return vec_xxsldwi(a, b, 0); +// CHECK-LABEL: xxsldwi_should_not_assert +// CHECK: bitcast <2 x double> %{{[0-9]+}} to <4 x i32> +// CHECK-NEXT: bitcast <2 x double> %{{[0-9]+}} to <4 x i32> +// CHECK-NEXT: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> +// CHECK-NEXT: bitcast <4 x i32> %{{[0-9]+}} to <2 x double> + +// CHECK-LE: bitcast <2 x double> %{{[0-9]+}} to <4 x i32> +// CHECK-NEXT-LE: bitcast <2 x double> %{{[0-9]+}} to <4 x i32> +// CHECK-NEXT-LE: shufflevector <4 x i32> %{{[0-9]+}}, <4 x i32> %{{[0-9]+}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> +// CHECK-NEXT-LE: bitcast <4 x i32> %{{[0-9]+}} to <2 x double> } |