diff options
Diffstat (limited to 'test/CodeGen')
37 files changed, 2008 insertions, 93 deletions
diff --git a/test/CodeGen/2004-11-27-StaticFunctionRedeclare.c b/test/CodeGen/2004-11-27-StaticFunctionRedeclare.c index 9ceee4c991275..f6ce5528a4ead 100644 --- a/test/CodeGen/2004-11-27-StaticFunctionRedeclare.c +++ b/test/CodeGen/2004-11-27-StaticFunctionRedeclare.c @@ -6,7 +6,7 @@ // This is PR244 -// CHECK-LABEL: define void @bar( +// CHECK-LABEL: define {{.*}}void @bar( // CHECK: call {{.*}} @func // CHECK: define internal {{.*}}i32 @func( static int func(); diff --git a/test/CodeGen/2007-04-14-FNoBuiltin.c b/test/CodeGen/2007-04-14-FNoBuiltin.c index 25ae01c5dcc01..4d194b1e0df14 100644 --- a/test/CodeGen/2007-04-14-FNoBuiltin.c +++ b/test/CodeGen/2007-04-14-FNoBuiltin.c @@ -3,7 +3,7 @@ extern int printf(const char*, ...); -// CHECK: define void {{.*}}foo( +// CHECK: define {{.*}}void {{.*}}foo( void foo(const char *msg) { // CHECK: call {{.*}}printf printf("%s\n",msg); diff --git a/test/CodeGen/PR8880.c b/test/CodeGen/PR8880.c index e03d2a42b610a..ff8491ed4d5a2 100644 --- a/test/CodeGen/PR8880.c +++ b/test/CodeGen/PR8880.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -Wno-gcc-compat -emit-llvm -o - %s | FileCheck %s void pr8880_cg_1(int *iptr) { -// CHECK-LABEL: define void @pr8880_cg_1( +// CHECK-LABEL: define {{.*}}void @pr8880_cg_1( int i, j; // CHECK: br label %[[OUTER_COND:[0-9A-Za-z$._]+]] for (i = 2; i != 10 ; i++ ) @@ -31,7 +31,7 @@ void pr8880_cg_1(int *iptr) { } void pr8880_cg_2(int *iptr) { -// CHECK-LABEL: define void @pr8880_cg_2( +// CHECK-LABEL: define {{.*}}void @pr8880_cg_2( int i, j; // CHECK: br label %[[OUTER_COND:[0-9A-Za-z$._]+]] for (i = 2; i != 10 ; i++ ) @@ -61,7 +61,7 @@ void pr8880_cg_2(int *iptr) { } void pr8880_cg_3(int *iptr) { -// CHECK-LABEL: define void @pr8880_cg_3( +// CHECK-LABEL: define {{.*}}void @pr8880_cg_3( int i, j; // CHECK: br label %[[OUTER_COND:[0-9A-Za-z$._]+]] for (i = 2 ; i != 10 ; i++ ) @@ -92,7 +92,7 @@ void pr8880_cg_3(int *iptr) { } void pr8880_cg_4(int *iptr) { -// CHECK-LABEL: define void @pr8880_cg_4( +// CHECK-LABEL: define {{.*}}void @pr8880_cg_4( int i, j; // CHECK: br label %[[OUTER_COND:[0-9A-Za-z$._]+]] for (i = 2 ; i != 10 ; i++ ) @@ -123,7 +123,7 @@ void pr8880_cg_4(int *iptr) { } void pr8880_cg_5(int x, int *iptr) { -// CHECK-LABEL: define void @pr8880_cg_5( +// CHECK-LABEL: define {{.*}}void @pr8880_cg_5( int y = 5; // CHECK: br label %[[OUTER_COND:[0-9A-Za-z$._]+]] // CHECK: [[OUTER_COND]] @@ -148,7 +148,7 @@ void pr8880_cg_5(int x, int *iptr) { } void pr8880_cg_6(int x, int *iptr) { -// CHECK-LABEL: define void @pr8880_cg_6( +// CHECK-LABEL: define {{.*}}void @pr8880_cg_6( int y = 5; // CHECK: br label %[[OUTER_COND:[0-9A-Za-z$._]+]] // CHECK: [[OUTER_COND]] diff --git a/test/CodeGen/arm-microsoft-intrinsics.c b/test/CodeGen/arm-microsoft-intrinsics.c index 5f19e5e7c87c9..e073cc2c0c052 100644 --- a/test/CodeGen/arm-microsoft-intrinsics.c +++ b/test/CodeGen/arm-microsoft-intrinsics.c @@ -47,17 +47,17 @@ unsigned int check_MoveFromCoprocessor2(void) { // CHECK-MSVC: @llvm.arm.mrc2(i32 0, i32 0, i32 0, i32 0, i32 0) // CHECK-EABI: error: implicit declaration of function '_MoveFromCoprocessor2' -void check_MoveToCoprocessor(void) { - _MoveToCoprocessor(0, 0, 0, 0, 0, 0); +void check_MoveToCoprocessor(unsigned int value) { + _MoveToCoprocessor(value, 10, 7, 1, 0, 0); } -// CHECK-MSVC: @llvm.arm.mcr(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) +// CHECK-MSVC: @llvm.arm.mcr(i32 10, i32 7, i32 %{{[^,]*}}, i32 1, i32 0, i32 0) // CHECK-EABI: error: implicit declaration of function '_MoveToCoprocessor' -void check_MoveToCoprocessor2(void) { - _MoveToCoprocessor2(0, 0, 0, 0, 0, 0); +void check_MoveToCoprocessor2(unsigned int value) { + _MoveToCoprocessor2(value, 10, 7, 1, 0, 0); } -// CHECK-MSVC: @llvm.arm.mcr2(i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) +// CHECK-MSVC: @llvm.arm.mcr2(i32 10, i32 7, i32 %{{[^,]*}}, i32 1, i32 0, i32 0) // CHECK-EABI: error: implicit declaration of function '_MoveToCoprocessor2' diff --git a/test/CodeGen/arm-target-features.c b/test/CodeGen/arm-target-features.c index ece8bdfc5e2dd..36804b4e3bb1e 100644 --- a/test/CodeGen/arm-target-features.c +++ b/test/CodeGen/arm-target-features.c @@ -6,7 +6,7 @@ // RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4 -// CHECK-VFP4: "target-features"="+vfp4,+neon" +// CHECK-VFP4: "target-features"="+neon,+vfp4" // RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu cortex-a7 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV @@ -15,14 +15,14 @@ // RUN: %clang_cc1 -triple armv7-linux-gnueabihf -target-cpu cortex-a17 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV // RUN: %clang_cc1 -triple thumbv7s-linux-gnueabi -target-cpu swift -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV // RUN: %clang_cc1 -triple thumbv7-linux-gnueabihf -target-cpu krait -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-VFP4-DIV -// CHECK-VFP4-DIV: "target-features"="+vfp4,+neon,+hwdiv,+hwdiv-arm" +// CHECK-VFP4-DIV: "target-features"="+hwdiv,+hwdiv-arm,+neon,+vfp4" // RUN: %clang_cc1 -triple thumbv7s-apple-ios7.0 -target-cpu cyclone -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8 // RUN: %clang_cc1 -triple armv8-linux-gnueabi -target-cpu cortex-a53 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a72 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-BASIC-V8 -// CHECK-BASIC-V8: "target-features"="+neon,+fp-armv8,+hwdiv,+crypto,+crc,+hwdiv-arm" +// CHECK-BASIC-V8: "target-features"="+crc,+crypto,+fp-armv8,+hwdiv,+hwdiv-arm,+neon" // RUN: %clang_cc1 -triple thumbv7-linux-gnueabi -target-cpu cortex-r5 -emit-llvm -o - %s | FileCheck %s --check-prefix=CHECK-DIV diff --git a/test/CodeGen/attr-nodebug.c b/test/CodeGen/attr-nodebug.c index 66caa2b38fac9..07a4aa35a8977 100644 --- a/test/CodeGen/attr-nodebug.c +++ b/test/CodeGen/attr-nodebug.c @@ -1,12 +1,32 @@ -// RUN: %clang_cc1 -g -emit-llvm -o %t %s -// RUN: not grep 'call void @llvm.dbg.func.start' %t +// RUN: %clang_cc1 -g -emit-llvm -o - %s | FileCheck %s void t1() __attribute__((nodebug)); void t1() { int a = 10; - a++; } +void t2() +{ + int b = 10; + b++; +} + +// With nodebug, IR should have no llvm.dbg.* calls, or !dbg annotations. +// CHECK-LABEL: @t1 +// CHECK-NOT: dbg +// CHECK: } + +// For sanity, check those things do occur normally. +// CHECK-LABEL: @t2 +// CHECK: call{{.*}}llvm.dbg +// CHECK: !dbg +// CHECK: } + +// We should see a function description for t2 but not t1. +// CHECK-NOT: DISubprogram(name: "t1" +// CHECK: DISubprogram(name: "t2" +// CHECK-NOT: DISubprogram(name: "t1" + diff --git a/test/CodeGen/attr-target.c b/test/CodeGen/attr-target.c index 8c0f335f857da..7ea5fe5a07a0e 100644 --- a/test/CodeGen/attr-target.c +++ b/test/CodeGen/attr-target.c @@ -9,6 +9,8 @@ int __attribute__((target("fpmath=387"))) koala(int a) { return 4; } int __attribute__((target("mno-sse2"))) echidna(int a) { return 4; } +int __attribute__((target("sse4"))) panda(int a) { return 4; } + int bar(int a) { return baz(a) + foo(a); } // Check that we emit the additional subtarget and cpu features for foo and not for baz or bar. @@ -21,5 +23,6 @@ int bar(int a) { return baz(a) + foo(a); } // CHECK: echidna{{.*}} #2 // CHECK: bar{{.*}} #0 // CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2" -// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+sse,+sse2,+avx,+sse4.2" -// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2,-sse2" +// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" +// CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop" +// CHECK: #3 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3" diff --git a/test/CodeGen/avx512bw-builtins.c b/test/CodeGen/avx512bw-builtins.c index 452d737beaa26..6cc02ef705db0 100644 --- a/test/CodeGen/avx512bw-builtins.c +++ b/test/CodeGen/avx512bw-builtins.c @@ -427,3 +427,409 @@ __m512i test_mm512_maskz_mullo_epi16 (__mmask32 __U, __m512i __A, __m512i __B) { //CHECK: @llvm.x86.avx512.mask.pmull.w.512 return _mm512_maskz_mullo_epi16(__U, __A, __B); } + +__m512i test_mm512_mask_blend_epi8(__mmask64 __U, __m512i __A, __m512i __W) { + // CHECK-LABEL: @test_mm512_mask_blend_epi8 + // CHECK: @llvm.x86.avx512.mask.blend.b.512 + return _mm512_mask_blend_epi8(__U,__A,__W); +} +__m512i test_mm512_mask_blend_epi16(__mmask32 __U, __m512i __A, __m512i __W) { + // CHECK-LABEL: @test_mm512_mask_blend_epi16 + // CHECK: @llvm.x86.avx512.mask.blend.w.512 + return _mm512_mask_blend_epi16(__U,__A,__W); +} +__m512i test_mm512_abs_epi8(__m512i __A) { + // CHECK-LABEL: @test_mm512_abs_epi8 + // CHECK: @llvm.x86.avx512.mask.pabs.b.512 + return _mm512_abs_epi8(__A); +} +__m512i test_mm512_mask_abs_epi8(__m512i __W, __mmask64 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_abs_epi8 + // CHECK: @llvm.x86.avx512.mask.pabs.b.512 + return _mm512_mask_abs_epi8(__W,__U,__A); +} +__m512i test_mm512_maskz_abs_epi8(__mmask64 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_abs_epi8 + // CHECK: @llvm.x86.avx512.mask.pabs.b.512 + return _mm512_maskz_abs_epi8(__U,__A); +} +__m512i test_mm512_abs_epi16(__m512i __A) { + // CHECK-LABEL: @test_mm512_abs_epi16 + // CHECK: @llvm.x86.avx512.mask.pabs.w.512 + return _mm512_abs_epi16(__A); +} +__m512i test_mm512_mask_abs_epi16(__m512i __W, __mmask32 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_abs_epi16 + // CHECK: @llvm.x86.avx512.mask.pabs.w.512 + return _mm512_mask_abs_epi16(__W,__U,__A); +} +__m512i test_mm512_maskz_abs_epi16(__mmask32 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_abs_epi16 + // CHECK: @llvm.x86.avx512.mask.pabs.w.512 + return _mm512_maskz_abs_epi16(__U,__A); +} +__m512i test_mm512_packs_epi32(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_packs_epi32 + // CHECK: @llvm.x86.avx512.mask.packssdw.512 + return _mm512_packs_epi32(__A,__B); +} +__m512i test_mm512_maskz_packs_epi32(__mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_packs_epi32 + // CHECK: @llvm.x86.avx512.mask.packssdw.512 + return _mm512_maskz_packs_epi32(__M,__A,__B); +} +__m512i test_mm512_mask_packs_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_packs_epi32 + // CHECK: @llvm.x86.avx512.mask.packssdw.512 + return _mm512_mask_packs_epi32(__W,__M,__A,__B); +} +__m512i test_mm512_packs_epi16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_packs_epi16 + // CHECK: @llvm.x86.avx512.mask.packsswb.512 + return _mm512_packs_epi16(__A,__B); +} +__m512i test_mm512_mask_packs_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_packs_epi16 + // CHECK: @llvm.x86.avx512.mask.packsswb.512 + return _mm512_mask_packs_epi16(__W,__M,__A,__B); +} +__m512i test_mm512_maskz_packs_epi16(__mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_packs_epi16 + // CHECK: @llvm.x86.avx512.mask.packsswb.512 + return _mm512_maskz_packs_epi16(__M,__A,__B); +} +__m512i test_mm512_packus_epi32(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_packus_epi32 + // CHECK: @llvm.x86.avx512.mask.packusdw.512 + return _mm512_packus_epi32(__A,__B); +} +__m512i test_mm512_maskz_packus_epi32(__mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_packus_epi32 + // CHECK: @llvm.x86.avx512.mask.packusdw.512 + return _mm512_maskz_packus_epi32(__M,__A,__B); +} +__m512i test_mm512_mask_packus_epi32(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_packus_epi32 + // CHECK: @llvm.x86.avx512.mask.packusdw.512 + return _mm512_mask_packus_epi32(__W,__M,__A,__B); +} +__m512i test_mm512_packus_epi16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_packus_epi16 + // CHECK: @llvm.x86.avx512.mask.packuswb.512 + return _mm512_packus_epi16(__A,__B); +} +__m512i test_mm512_mask_packus_epi16(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_packus_epi16 + // CHECK: @llvm.x86.avx512.mask.packuswb.512 + return _mm512_mask_packus_epi16(__W,__M,__A,__B); +} +__m512i test_mm512_maskz_packus_epi16(__mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_packus_epi16 + // CHECK: @llvm.x86.avx512.mask.packuswb.512 + return _mm512_maskz_packus_epi16(__M,__A,__B); +} +__m512i test_mm512_adds_epi8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_adds_epi8 + // CHECK: @llvm.x86.avx512.mask.padds.b.512 + return _mm512_adds_epi8(__A,__B); +} +__m512i test_mm512_mask_adds_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_adds_epi8 + // CHECK: @llvm.x86.avx512.mask.padds.b.512 + return _mm512_mask_adds_epi8(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_adds_epi8(__mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_adds_epi8 + // CHECK: @llvm.x86.avx512.mask.padds.b.512 + return _mm512_maskz_adds_epi8(__U,__A,__B); +} +__m512i test_mm512_adds_epi16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_adds_epi16 + // CHECK: @llvm.x86.avx512.mask.padds.w.512 + return _mm512_adds_epi16(__A,__B); +} +__m512i test_mm512_mask_adds_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_adds_epi16 + // CHECK: @llvm.x86.avx512.mask.padds.w.512 + return _mm512_mask_adds_epi16(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_adds_epi16(__mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_adds_epi16 + // CHECK: @llvm.x86.avx512.mask.padds.w.512 + return _mm512_maskz_adds_epi16(__U,__A,__B); +} +__m512i test_mm512_adds_epu8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_adds_epu8 + // CHECK: @llvm.x86.avx512.mask.paddus.b.512 + return _mm512_adds_epu8(__A,__B); +} +__m512i test_mm512_mask_adds_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_adds_epu8 + // CHECK: @llvm.x86.avx512.mask.paddus.b.512 + return _mm512_mask_adds_epu8(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_adds_epu8(__mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_adds_epu8 + // CHECK: @llvm.x86.avx512.mask.paddus.b.512 + return _mm512_maskz_adds_epu8(__U,__A,__B); +} +__m512i test_mm512_adds_epu16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_adds_epu16 + // CHECK: @llvm.x86.avx512.mask.paddus.w.512 + return _mm512_adds_epu16(__A,__B); +} +__m512i test_mm512_mask_adds_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_adds_epu16 + // CHECK: @llvm.x86.avx512.mask.paddus.w.512 + return _mm512_mask_adds_epu16(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_adds_epu16(__mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_adds_epu16 + // CHECK: @llvm.x86.avx512.mask.paddus.w.512 + return _mm512_maskz_adds_epu16(__U,__A,__B); +} +__m512i test_mm512_avg_epu8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_avg_epu8 + // CHECK: @llvm.x86.avx512.mask.pavg.b.512 + return _mm512_avg_epu8(__A,__B); +} +__m512i test_mm512_mask_avg_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_avg_epu8 + // CHECK: @llvm.x86.avx512.mask.pavg.b.512 + return _mm512_mask_avg_epu8(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_avg_epu8(__mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_avg_epu8 + // CHECK: @llvm.x86.avx512.mask.pavg.b.512 + return _mm512_maskz_avg_epu8(__U,__A,__B); +} +__m512i test_mm512_avg_epu16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_avg_epu16 + // CHECK: @llvm.x86.avx512.mask.pavg.w.512 + return _mm512_avg_epu16(__A,__B); +} +__m512i test_mm512_mask_avg_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_avg_epu16 + // CHECK: @llvm.x86.avx512.mask.pavg.w.512 + return _mm512_mask_avg_epu16(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_avg_epu16(__mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_avg_epu16 + // CHECK: @llvm.x86.avx512.mask.pavg.w.512 + return _mm512_maskz_avg_epu16(__U,__A,__B); +} +__m512i test_mm512_max_epi8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_max_epi8 + // CHECK: @llvm.x86.avx512.mask.pmaxs.b.512 + return _mm512_max_epi8(__A,__B); +} +__m512i test_mm512_maskz_max_epi8(__mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_max_epi8 + // CHECK: @llvm.x86.avx512.mask.pmaxs.b.512 + return _mm512_maskz_max_epi8(__M,__A,__B); +} +__m512i test_mm512_mask_max_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_max_epi8 + // CHECK: @llvm.x86.avx512.mask.pmaxs.b.512 + return _mm512_mask_max_epi8(__W,__M,__A,__B); +} +__m512i test_mm512_max_epi16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_max_epi16 + // CHECK: @llvm.x86.avx512.mask.pmaxs.w.512 + return _mm512_max_epi16(__A,__B); +} +__m512i test_mm512_maskz_max_epi16(__mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_max_epi16 + // CHECK: @llvm.x86.avx512.mask.pmaxs.w.512 + return _mm512_maskz_max_epi16(__M,__A,__B); +} +__m512i test_mm512_mask_max_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_max_epi16 + // CHECK: @llvm.x86.avx512.mask.pmaxs.w.512 + return _mm512_mask_max_epi16(__W,__M,__A,__B); +} +__m512i test_mm512_max_epu8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_max_epu8 + // CHECK: @llvm.x86.avx512.mask.pmaxu.b.512 + return _mm512_max_epu8(__A,__B); +} +__m512i test_mm512_maskz_max_epu8(__mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_max_epu8 + // CHECK: @llvm.x86.avx512.mask.pmaxu.b.512 + return _mm512_maskz_max_epu8(__M,__A,__B); +} +__m512i test_mm512_mask_max_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_max_epu8 + // CHECK: @llvm.x86.avx512.mask.pmaxu.b.512 + return _mm512_mask_max_epu8(__W,__M,__A,__B); +} +__m512i test_mm512_max_epu16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_max_epu16 + // CHECK: @llvm.x86.avx512.mask.pmaxu.w.512 + return _mm512_max_epu16(__A,__B); +} +__m512i test_mm512_maskz_max_epu16(__mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_max_epu16 + // CHECK: @llvm.x86.avx512.mask.pmaxu.w.512 + return _mm512_maskz_max_epu16(__M,__A,__B); +} +__m512i test_mm512_mask_max_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_max_epu16 + // CHECK: @llvm.x86.avx512.mask.pmaxu.w.512 + return _mm512_mask_max_epu16(__W,__M,__A,__B); +} +__m512i test_mm512_min_epi8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_min_epi8 + // CHECK: @llvm.x86.avx512.mask.pmins.b.512 + return _mm512_min_epi8(__A,__B); +} +__m512i test_mm512_maskz_min_epi8(__mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_min_epi8 + // CHECK: @llvm.x86.avx512.mask.pmins.b.512 + return _mm512_maskz_min_epi8(__M,__A,__B); +} +__m512i test_mm512_mask_min_epi8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_min_epi8 + // CHECK: @llvm.x86.avx512.mask.pmins.b.512 + return _mm512_mask_min_epi8(__W,__M,__A,__B); +} +__m512i test_mm512_min_epi16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_min_epi16 + // CHECK: @llvm.x86.avx512.mask.pmins.w.512 + return _mm512_min_epi16(__A,__B); +} +__m512i test_mm512_maskz_min_epi16(__mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_min_epi16 + // CHECK: @llvm.x86.avx512.mask.pmins.w.512 + return _mm512_maskz_min_epi16(__M,__A,__B); +} +__m512i test_mm512_mask_min_epi16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_min_epi16 + // CHECK: @llvm.x86.avx512.mask.pmins.w.512 + return _mm512_mask_min_epi16(__W,__M,__A,__B); +} +__m512i test_mm512_min_epu8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_min_epu8 + // CHECK: @llvm.x86.avx512.mask.pminu.b.512 + return _mm512_min_epu8(__A,__B); +} +__m512i test_mm512_maskz_min_epu8(__mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_min_epu8 + // CHECK: @llvm.x86.avx512.mask.pminu.b.512 + return _mm512_maskz_min_epu8(__M,__A,__B); +} +__m512i test_mm512_mask_min_epu8(__m512i __W, __mmask64 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_min_epu8 + // CHECK: @llvm.x86.avx512.mask.pminu.b.512 + return _mm512_mask_min_epu8(__W,__M,__A,__B); +} +__m512i test_mm512_min_epu16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_min_epu16 + // CHECK: @llvm.x86.avx512.mask.pminu.w.512 + return _mm512_min_epu16(__A,__B); +} +__m512i test_mm512_maskz_min_epu16(__mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_min_epu16 + // CHECK: @llvm.x86.avx512.mask.pminu.w.512 + return _mm512_maskz_min_epu16(__M,__A,__B); +} +__m512i test_mm512_mask_min_epu16(__m512i __W, __mmask32 __M, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_min_epu16 + // CHECK: @llvm.x86.avx512.mask.pminu.w.512 + return _mm512_mask_min_epu16(__W,__M,__A,__B); +} +__m512i test_mm512_shuffle_epi8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_shuffle_epi8 + // CHECK: @llvm.x86.avx512.mask.pshuf.b.512 + return _mm512_shuffle_epi8(__A,__B); +} +__m512i test_mm512_mask_shuffle_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_shuffle_epi8 + // CHECK: @llvm.x86.avx512.mask.pshuf.b.512 + return _mm512_mask_shuffle_epi8(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_shuffle_epi8(__mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_shuffle_epi8 + // CHECK: @llvm.x86.avx512.mask.pshuf.b.512 + return _mm512_maskz_shuffle_epi8(__U,__A,__B); +} +__m512i test_mm512_subs_epi8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_subs_epi8 + // CHECK: @llvm.x86.avx512.mask.psubs.b.512 + return _mm512_subs_epi8(__A,__B); +} +__m512i test_mm512_mask_subs_epi8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_subs_epi8 + // CHECK: @llvm.x86.avx512.mask.psubs.b.512 + return _mm512_mask_subs_epi8(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_subs_epi8(__mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_subs_epi8 + // CHECK: @llvm.x86.avx512.mask.psubs.b.512 + return _mm512_maskz_subs_epi8(__U,__A,__B); +} +__m512i test_mm512_subs_epi16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_subs_epi16 + // CHECK: @llvm.x86.avx512.mask.psubs.w.512 + return _mm512_subs_epi16(__A,__B); +} +__m512i test_mm512_mask_subs_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_subs_epi16 + // CHECK: @llvm.x86.avx512.mask.psubs.w.512 + return _mm512_mask_subs_epi16(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_subs_epi16(__mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_subs_epi16 + // CHECK: @llvm.x86.avx512.mask.psubs.w.512 + return _mm512_maskz_subs_epi16(__U,__A,__B); +} +__m512i test_mm512_subs_epu8(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_subs_epu8 + // CHECK: @llvm.x86.avx512.mask.psubus.b.512 + return _mm512_subs_epu8(__A,__B); +} +__m512i test_mm512_mask_subs_epu8(__m512i __W, __mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_subs_epu8 + // CHECK: @llvm.x86.avx512.mask.psubus.b.512 + return _mm512_mask_subs_epu8(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_subs_epu8(__mmask64 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_subs_epu8 + // CHECK: @llvm.x86.avx512.mask.psubus.b.512 + return _mm512_maskz_subs_epu8(__U,__A,__B); +} +__m512i test_mm512_subs_epu16(__m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_subs_epu16 + // CHECK: @llvm.x86.avx512.mask.psubus.w.512 + return _mm512_subs_epu16(__A,__B); +} +__m512i test_mm512_mask_subs_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_subs_epu16 + // CHECK: @llvm.x86.avx512.mask.psubus.w.512 + return _mm512_mask_subs_epu16(__W,__U,__A,__B); +} +__m512i test_mm512_maskz_subs_epu16(__mmask32 __U, __m512i __A, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_subs_epu16 + // CHECK: @llvm.x86.avx512.mask.psubus.w.512 + return _mm512_maskz_subs_epu16(__U,__A,__B); +} +__m512i test_mm512_mask2_permutex2var_epi16(__m512i __A, __m512i __I, __mmask32 __U, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask2_permutex2var_epi16 + // CHECK: @llvm.x86.avx512.mask.vpermi2var.hi.512 + return _mm512_mask2_permutex2var_epi16(__A,__I,__U,__B); +} +__m512i test_mm512_permutex2var_epi16(__m512i __A, __m512i __I, __m512i __B) { + // CHECK-LABEL: @test_mm512_permutex2var_epi16 + // CHECK: @llvm.x86.avx512.mask.vpermt2var.hi.512 + return _mm512_permutex2var_epi16(__A,__I,__B); +} +__m512i test_mm512_mask_permutex2var_epi16(__m512i __A, __mmask32 __U, __m512i __I, __m512i __B) { + // CHECK-LABEL: @test_mm512_mask_permutex2var_epi16 + // CHECK: @llvm.x86.avx512.mask.vpermt2var.hi.512 + return _mm512_mask_permutex2var_epi16(__A,__U,__I,__B); +} +__m512i test_mm512_maskz_permutex2var_epi16(__mmask32 __U, __m512i __A, __m512i __I, __m512i __B) { + // CHECK-LABEL: @test_mm512_maskz_permutex2var_epi16 + // CHECK: @llvm.x86.avx512.mask.vpermt2var.hi.512 + return _mm512_maskz_permutex2var_epi16(__U,__A,__I,__B); +} diff --git a/test/CodeGen/avx512cdintrin.c b/test/CodeGen/avx512cdintrin.c new file mode 100644 index 0000000000000..1b4860a7fd24a --- /dev/null +++ b/test/CodeGen/avx512cdintrin.c @@ -0,0 +1,62 @@ +// RUN: %clang_cc1 %s -O0 -triple=x86_64-apple-darwin -ffreestanding -target-feature +avx512cd -emit-llvm -o - -Werror | FileCheck %s +#include <immintrin.h> +__m512i test_mm512_conflict_epi64(__m512i __A) { + // CHECK-LABEL: @test_mm512_conflict_epi64 + // CHECK: @llvm.x86.avx512.mask.conflict.q.512 + return _mm512_conflict_epi64(__A); +} +__m512i test_mm512_mask_conflict_epi64(__m512i __W, __mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_conflict_epi64 + // CHECK: @llvm.x86.avx512.mask.conflict.q.512 + return _mm512_mask_conflict_epi64(__W,__U,__A); +} +__m512i test_mm512_maskz_conflict_epi64(__mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_conflict_epi64 + // CHECK: @llvm.x86.avx512.mask.conflict.q.512 + return _mm512_maskz_conflict_epi64(__U,__A); +} +__m512i test_mm512_conflict_epi32(__m512i __A) { + // CHECK-LABEL: @test_mm512_conflict_epi32 + // CHECK: @llvm.x86.avx512.mask.conflict.d.512 + return _mm512_conflict_epi32(__A); +} +__m512i test_mm512_mask_conflict_epi32(__m512i __W, __mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_conflict_epi32 + // CHECK: @llvm.x86.avx512.mask.conflict.d.512 + return _mm512_mask_conflict_epi32(__W,__U,__A); +} +__m512i test_mm512_maskz_conflict_epi32(__mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_conflict_epi32 + // CHECK: @llvm.x86.avx512.mask.conflict.d.512 + return _mm512_maskz_conflict_epi32(__U,__A); +} +__m512i test_mm512_lzcnt_epi32(__m512i __A) { + // CHECK-LABEL: @test_mm512_lzcnt_epi32 + // CHECK: @llvm.x86.avx512.mask.lzcnt.d.512 + return _mm512_lzcnt_epi32(__A); +} +__m512i test_mm512_mask_lzcnt_epi32(__m512i __W, __mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_lzcnt_epi32 + // CHECK: @llvm.x86.avx512.mask.lzcnt.d.512 + return _mm512_mask_lzcnt_epi32(__W,__U,__A); +} +__m512i test_mm512_maskz_lzcnt_epi32(__mmask16 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_lzcnt_epi32 + // CHECK: @llvm.x86.avx512.mask.lzcnt.d.512 + return _mm512_maskz_lzcnt_epi32(__U,__A); +} +__m512i test_mm512_lzcnt_epi64(__m512i __A) { + // CHECK-LABEL: @test_mm512_lzcnt_epi64 + // CHECK: @llvm.x86.avx512.mask.lzcnt.q.512 + return _mm512_lzcnt_epi64(__A); +} +__m512i test_mm512_mask_lzcnt_epi64(__m512i __W, __mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_mask_lzcnt_epi64 + // CHECK: @llvm.x86.avx512.mask.lzcnt.q.512 + return _mm512_mask_lzcnt_epi64(__W,__U,__A); +} +__m512i test_mm512_maskz_lzcnt_epi64(__mmask8 __U, __m512i __A) { + // CHECK-LABEL: @test_mm512_maskz_lzcnt_epi64 + // CHECK: @llvm.x86.avx512.mask.lzcnt.q.512 + return _mm512_maskz_lzcnt_epi64(__U,__A); +} diff --git a/test/CodeGen/avx512f-builtins.c b/test/CodeGen/avx512f-builtins.c index a49a1982bf47c..112dfd8b6ee12 100644 --- a/test/CodeGen/avx512f-builtins.c +++ b/test/CodeGen/avx512f-builtins.c @@ -201,11 +201,486 @@ __m512d test_mm512_broadcastsd_pd(__m128d a) return _mm512_broadcastsd_pd(a); } -__m512i test_mm512_fmadd_pd(__m512d a, __m512d b, __m512d c) -{ +__m512d test_mm512_fmadd_round_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fmadd_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fmadd_round_pd(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} + +__m512d test_mm512_mask_fmadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmadd_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_mask_fmadd_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask3_fmadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmadd_round_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.512 + return _mm512_mask3_fmadd_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_maskz_fmadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmadd_round_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fmadd_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_fmsub_round_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fmsub_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fmsub_round_pd(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask_fmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmsub_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_mask_fmsub_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_maskz_fmsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsub_round_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fmsub_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_fnmadd_round_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fnmadd_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fnmadd_round_pd(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask3_fnmadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmadd_round_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.512 + return _mm512_mask3_fnmadd_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_maskz_fnmadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmadd_round_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fnmadd_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_fnmsub_round_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fnmsub_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fnmsub_round_pd(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_maskz_fnmsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmsub_round_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fnmsub_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C) { // CHECK-LABEL: @test_mm512_fmadd_pd - // CHECK: @llvm.x86.fma.mask.vfmadd.pd.512 - return _mm512_fmadd_pd(a, b, c); + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fmadd_pd(__A, __B, __C); +} +__m512d test_mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_mask_fmadd_pd(__A, __U, __B, __C); +} +__m512d test_mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.512 + return _mm512_mask3_fmadd_pd(__A, __B, __C, __U); +} +__m512d test_mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fmadd_pd(__U, __A, __B, __C); +} +__m512d test_mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fmsub_pd(__A, __B, __C); +} +__m512d test_mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_mask_fmsub_pd(__A, __U, __B, __C); +} +__m512d test_mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fmsub_pd(__U, __A, __B, __C); +} +__m512d test_mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fnmadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fnmadd_pd(__A, __B, __C); +} +__m512d test_mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.512 + return _mm512_mask3_fnmadd_pd(__A, __B, __C, __U); +} +__m512d test_mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fnmadd_pd(__U, __A, __B, __C); +} +__m512d test_mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fnmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.512 + return _mm512_fnmsub_pd(__A, __B, __C); +} +__m512d test_mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.512 + return _mm512_maskz_fnmsub_pd(__U, __A, __B, __C); +} +__m512 test_mm512_fmadd_round_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmadd_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fmadd_round_ps(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask_fmadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmadd_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_mask_fmadd_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask3_fmadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmadd_round_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.512 + return _mm512_mask3_fmadd_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_maskz_fmadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmadd_round_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fmadd_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_fmsub_round_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmsub_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fmsub_round_ps(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask_fmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmsub_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_mask_fmsub_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_maskz_fmsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsub_round_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fmsub_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_fnmadd_round_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fnmadd_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fnmadd_round_ps(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask3_fnmadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmadd_round_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.512 + return _mm512_mask3_fnmadd_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_maskz_fnmadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmadd_round_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fnmadd_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_fnmsub_round_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fnmsub_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fnmsub_round_ps(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_maskz_fnmsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmsub_round_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fnmsub_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fmadd_ps(__A, __B, __C); +} +__m512 test_mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_mask_fmadd_ps(__A, __U, __B, __C); +} +__m512 test_mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.512 + return _mm512_mask3_fmadd_ps(__A, __B, __C, __U); +} +__m512 test_mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fmadd_ps(__U, __A, __B, __C); +} +__m512 test_mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fmsub_ps(__A, __B, __C); +} +__m512 test_mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_mask_fmsub_ps(__A, __U, __B, __C); +} +__m512 test_mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fmsub_ps(__U, __A, __B, __C); +} +__m512 test_mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fnmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fnmadd_ps(__A, __B, __C); +} +__m512 test_mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.512 + return _mm512_mask3_fnmadd_ps(__A, __B, __C, __U); +} +__m512 test_mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fnmadd_ps(__U, __A, __B, __C); +} +__m512 test_mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fnmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.512 + return _mm512_fnmsub_ps(__A, __B, __C); +} +__m512 test_mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fnmsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.512 + return _mm512_maskz_fnmsub_ps(__U, __A, __B, __C); +} +__m512d test_mm512_fmaddsub_round_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fmaddsub_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_fmaddsub_round_pd(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask_fmaddsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmaddsub_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_mask_fmaddsub_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask3_fmaddsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmaddsub_round_pd + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.pd.512 + return _mm512_mask3_fmaddsub_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_maskz_fmaddsub_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmaddsub_round_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.512 + return _mm512_maskz_fmaddsub_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_fmsubadd_round_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fmsubadd_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_fmsubadd_round_pd(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask_fmsubadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmsubadd_round_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_mask_fmsubadd_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_maskz_fmsubadd_round_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsubadd_round_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.512 + return _mm512_maskz_fmsubadd_round_pd(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fmaddsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_fmaddsub_pd(__A, __B, __C); +} +__m512d test_mm512_mask_fmaddsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmaddsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_mask_fmaddsub_pd(__A, __U, __B, __C); +} +__m512d test_mm512_mask3_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmaddsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.pd.512 + return _mm512_mask3_fmaddsub_pd(__A, __B, __C, __U); +} +__m512d test_mm512_maskz_fmaddsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmaddsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.512 + return _mm512_maskz_fmaddsub_pd(__U, __A, __B, __C); +} +__m512d test_mm512_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_fmsubadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_fmsubadd_pd(__A, __B, __C); +} +__m512d test_mm512_mask_fmsubadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fmsubadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.512 + return _mm512_mask_fmsubadd_pd(__A, __U, __B, __C); +} +__m512d test_mm512_maskz_fmsubadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsubadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.512 + return _mm512_maskz_fmsubadd_pd(__U, __A, __B, __C); +} +__m512 test_mm512_fmaddsub_round_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmaddsub_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_fmaddsub_round_ps(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask_fmaddsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmaddsub_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_mask_fmaddsub_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask3_fmaddsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmaddsub_round_ps + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.ps.512 + return _mm512_mask3_fmaddsub_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_maskz_fmaddsub_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmaddsub_round_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.512 + return _mm512_maskz_fmaddsub_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_fmsubadd_round_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmsubadd_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_fmsubadd_round_ps(__A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask_fmsubadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmsubadd_round_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_mask_fmsubadd_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_maskz_fmsubadd_round_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsubadd_round_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.512 + return _mm512_maskz_fmsubadd_round_ps(__U, __A, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmaddsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_fmaddsub_ps(__A, __B, __C); +} +__m512 test_mm512_mask_fmaddsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmaddsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_mask_fmaddsub_ps(__A, __U, __B, __C); +} +__m512 test_mm512_mask3_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmaddsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.ps.512 + return _mm512_mask3_fmaddsub_ps(__A, __B, __C, __U); +} +__m512 test_mm512_maskz_fmaddsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmaddsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.512 + return _mm512_maskz_fmaddsub_ps(__U, __A, __B, __C); +} +__m512 test_mm512_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_fmsubadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_fmsubadd_ps(__A, __B, __C); +} +__m512 test_mm512_mask_fmsubadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fmsubadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.512 + return _mm512_mask_fmsubadd_ps(__A, __U, __B, __C); +} +__m512 test_mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_maskz_fmsubadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.512 + return _mm512_maskz_fmsubadd_ps(__U, __A, __B, __C); +} +__m512d test_mm512_mask3_fmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsub_round_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsub.pd.512 + return _mm512_mask3_fmsub_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsub.pd.512 + return _mm512_mask3_fmsub_pd(__A, __B, __C, __U); +} +__m512 test_mm512_mask3_fmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsub_round_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsub.ps.512 + return _mm512_mask3_fmsub_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsub.ps.512 + return _mm512_mask3_fmsub_ps(__A, __B, __C, __U); +} +__m512d test_mm512_mask3_fmsubadd_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsubadd_round_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.pd.512 + return _mm512_mask3_fmsubadd_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask3_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsubadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.pd.512 + return _mm512_mask3_fmsubadd_pd(__A, __B, __C, __U); +} +__m512 test_mm512_mask3_fmsubadd_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsubadd_round_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.ps.512 + return _mm512_mask3_fmsubadd_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fmsubadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.ps.512 + return _mm512_mask3_fmsubadd_ps(__A, __B, __C, __U); +} +__m512d test_mm512_mask_fnmadd_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fnmadd_round_pd + // CHECK: @llvm.x86.avx512.mask.vfnmadd.pd.512 + return _mm512_mask_fnmadd_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fnmadd_pd + // CHECK: @llvm.x86.avx512.mask.vfnmadd.pd.512 + return _mm512_mask_fnmadd_pd(__A, __U, __B, __C); +} +__m512 test_mm512_mask_fnmadd_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fnmadd_round_ps + // CHECK: @llvm.x86.avx512.mask.vfnmadd.ps.512 + return _mm512_mask_fnmadd_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fnmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfnmadd.ps.512 + return _mm512_mask_fnmadd_ps(__A, __U, __B, __C); +} +__m512d test_mm512_mask_fnmsub_round_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fnmsub_round_pd + // CHECK: @llvm.x86.avx512.mask.vfnmsub.pd.512 + return _mm512_mask_fnmsub_round_pd(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask3_fnmsub_round_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmsub_round_pd + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.pd.512 + return _mm512_mask3_fnmsub_round_pd(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512d test_mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) { + // CHECK-LABEL: @test_mm512_mask_fnmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfnmsub.pd.512 + return _mm512_mask_fnmsub_pd(__A, __U, __B, __C); +} +__m512d test_mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.pd.512 + return _mm512_mask3_fnmsub_pd(__A, __B, __C, __U); +} +__m512 test_mm512_mask_fnmsub_round_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fnmsub_round_ps + // CHECK: @llvm.x86.avx512.mask.vfnmsub.ps.512 + return _mm512_mask_fnmsub_round_ps(__A, __U, __B, __C, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask3_fnmsub_round_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmsub_round_ps + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.ps.512 + return _mm512_mask3_fnmsub_round_ps(__A, __B, __C, __U, _MM_FROUND_TO_NEAREST_INT); +} +__m512 test_mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) { + // CHECK-LABEL: @test_mm512_mask_fnmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfnmsub.ps.512 + return _mm512_mask_fnmsub_ps(__A, __U, __B, __C); +} +__m512 test_mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) { + // CHECK-LABEL: @test_mm512_mask3_fnmsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.ps.512 + return _mm512_mask3_fnmsub_ps(__A, __B, __C, __U); } __mmask16 test_mm512_cmpeq_epi32_mask(__m512i __a, __m512i __b) { diff --git a/test/CodeGen/avx512vl-builtins.c b/test/CodeGen/avx512vl-builtins.c index 9446d467f78ef..00b0d5d90bc11 100644 --- a/test/CodeGen/avx512vl-builtins.c +++ b/test/CodeGen/avx512vl-builtins.c @@ -1121,3 +1121,439 @@ __mmask8 test_mm128_mask_cmp_pd_mask(__mmask8 m, __m128d __A, __m128d __B) { // CHECK: @llvm.x86.avx512.mask.cmp.pd.128 return _mm128_mask_cmp_pd_mask(m, __A, __B, 0); } + + +//igorb + +__m128d test_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_mask_fmadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.128 + return _mm_mask_fmadd_pd(__A, __U, __B, __C); +} + +__m128d test_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_mask_fmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.128 + return _mm_mask_fmsub_pd(__A, __U, __B, __C); +} + +__m128d test_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.128 + return _mm_mask3_fmadd_pd(__A, __B, __C, __U); +} + +__m128d test_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fnmadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.128 + return _mm_mask3_fnmadd_pd(__A, __B, __C, __U); +} + +__m128d test_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_maskz_fmadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.128 + return _mm_maskz_fmadd_pd(__U, __A, __B, __C); +} + +__m128d test_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_maskz_fmsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.128 + return _mm_maskz_fmsub_pd(__U, __A, __B, __C); +} + +__m128d test_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_maskz_fnmadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.128 + return _mm_maskz_fnmadd_pd(__U, __A, __B, __C); +} + +__m128d test_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_maskz_fnmsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.128 + return _mm_maskz_fnmsub_pd(__U, __A, __B, __C); +} + +__m256d test_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_mask_fmadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.256 + return _mm256_mask_fmadd_pd(__A, __U, __B, __C); +} + +__m256d test_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_mask_fmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmadd.pd.256 + return _mm256_mask_fmsub_pd(__A, __U, __B, __C); +} + +__m256d test_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.256 + return _mm256_mask3_fmadd_pd(__A, __B, __C, __U); +} + +__m256d test_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fnmadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmadd.pd.256 + return _mm256_mask3_fnmadd_pd(__A, __B, __C, __U); +} + +__m256d test_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_maskz_fmadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.256 + return _mm256_maskz_fmadd_pd(__U, __A, __B, __C); +} + +__m256d test_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_maskz_fmsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.256 + return _mm256_maskz_fmsub_pd(__U, __A, __B, __C); +} + +__m256d test_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_maskz_fnmadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.256 + return _mm256_maskz_fnmadd_pd(__U, __A, __B, __C); +} + +__m256d test_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_maskz_fnmsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmadd.pd.256 + return _mm256_maskz_fnmsub_pd(__U, __A, __B, __C); +} + +__m128 test_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_mask_fmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.128 + return _mm_mask_fmadd_ps(__A, __U, __B, __C); +} + +__m128 test_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_mask_fmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.128 + return _mm_mask_fmsub_ps(__A, __U, __B, __C); +} + +__m128 test_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.128 + return _mm_mask3_fmadd_ps(__A, __B, __C, __U); +} + +__m128 test_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fnmadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.128 + return _mm_mask3_fnmadd_ps(__A, __B, __C, __U); +} + +__m128 test_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_maskz_fmadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.128 + return _mm_maskz_fmadd_ps(__U, __A, __B, __C); +} + +__m128 test_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_maskz_fmsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.128 + return _mm_maskz_fmsub_ps(__U, __A, __B, __C); +} + +__m128 test_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_maskz_fnmadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.128 + return _mm_maskz_fnmadd_ps(__U, __A, __B, __C); +} + +__m128 test_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_maskz_fnmsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.128 + return _mm_maskz_fnmsub_ps(__U, __A, __B, __C); +} + +__m256 test_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_mask_fmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.256 + return _mm256_mask_fmadd_ps(__A, __U, __B, __C); +} + +__m256 test_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_mask_fmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmadd.ps.256 + return _mm256_mask_fmsub_ps(__A, __U, __B, __C); +} + +__m256 test_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.256 + return _mm256_mask3_fmadd_ps(__A, __B, __C, __U); +} + +__m256 test_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fnmadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmadd.ps.256 + return _mm256_mask3_fnmadd_ps(__A, __B, __C, __U); +} + +__m256 test_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_maskz_fmadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.256 + return _mm256_maskz_fmadd_ps(__U, __A, __B, __C); +} + +__m256 test_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_maskz_fmsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.256 + return _mm256_maskz_fmsub_ps(__U, __A, __B, __C); +} + +__m256 test_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_maskz_fnmadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.256 + return _mm256_maskz_fnmadd_ps(__U, __A, __B, __C); +} + +__m256 test_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_maskz_fnmsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmadd.ps.256 + return _mm256_maskz_fnmsub_ps(__U, __A, __B, __C); +} + +__m128d test_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_mask_fmaddsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.128 + return _mm_mask_fmaddsub_pd(__A, __U, __B, __C); +} + +__m128d test_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_mask_fmsubadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.128 + return _mm_mask_fmsubadd_pd(__A, __U, __B, __C); +} + +__m128d test_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmaddsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.pd.128 + return _mm_mask3_fmaddsub_pd(__A, __B, __C, __U); +} + +__m128d test_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_maskz_fmaddsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.128 + return _mm_maskz_fmaddsub_pd(__U, __A, __B, __C); +} + +__m128d test_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_maskz_fmsubadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.128 + return _mm_maskz_fmsubadd_pd(__U, __A, __B, __C); +} + +__m256d test_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_mask_fmaddsub_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.256 + return _mm256_mask_fmaddsub_pd(__A, __U, __B, __C); +} + +__m256d test_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_mask_fmsubadd_pd + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.pd.256 + return _mm256_mask_fmsubadd_pd(__A, __U, __B, __C); +} + +__m256d test_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmaddsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.pd.256 + return _mm256_mask3_fmaddsub_pd(__A, __B, __C, __U); +} + +__m256d test_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_maskz_fmaddsub_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.256 + return _mm256_maskz_fmaddsub_pd(__U, __A, __B, __C); +} + +__m256d test_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_maskz_fmsubadd_pd + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.pd.256 + return _mm256_maskz_fmsubadd_pd(__U, __A, __B, __C); +} + +__m128 test_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_mask_fmaddsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.128 + return _mm_mask_fmaddsub_ps(__A, __U, __B, __C); +} + +__m128 test_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_mask_fmsubadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.128 + return _mm_mask_fmsubadd_ps(__A, __U, __B, __C); +} + +__m128 test_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmaddsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.ps.128 + return _mm_mask3_fmaddsub_ps(__A, __B, __C, __U); +} + +__m128 test_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_maskz_fmaddsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.128 + return _mm_maskz_fmaddsub_ps(__U, __A, __B, __C); +} + +__m128 test_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_maskz_fmsubadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.128 + return _mm_maskz_fmsubadd_ps(__U, __A, __B, __C); +} + +__m256 test_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_mask_fmaddsub_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.256 + return _mm256_mask_fmaddsub_ps(__A, __U, __B, __C); +} + +__m256 test_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_mask_fmsubadd_ps + // CHECK: @llvm.x86.avx512.mask.vfmaddsub.ps.256 + return _mm256_mask_fmsubadd_ps(__A, __U, __B, __C); +} + +__m256 test_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmaddsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfmaddsub.ps.256 + return _mm256_mask3_fmaddsub_ps(__A, __B, __C, __U); +} + +__m256 test_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_maskz_fmaddsub_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.256 + return _mm256_maskz_fmaddsub_ps(__U, __A, __B, __C); +} + +__m256 test_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_maskz_fmsubadd_ps + // CHECK: @llvm.x86.avx512.maskz.vfmaddsub.ps.256 + return _mm256_maskz_fmsubadd_ps(__U, __A, __B, __C); +} + +__m128d test_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsub.pd.128 + return _mm_mask3_fmsub_pd(__A, __B, __C, __U); +} + +__m256d test_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsub.pd.256 + return _mm256_mask3_fmsub_pd(__A, __B, __C, __U); +} + +__m128 test_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsub.ps.128 + return _mm_mask3_fmsub_ps(__A, __B, __C, __U); +} + +__m256 test_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsub.ps.256 + return _mm256_mask3_fmsub_ps(__A, __B, __C, __U); +} + +__m128d test_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmsubadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.pd.128 + return _mm_mask3_fmsubadd_pd(__A, __B, __C, __U); +} + +__m256d test_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmsubadd_pd + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.pd.256 + return _mm256_mask3_fmsubadd_pd(__A, __B, __C, __U); +} + +__m128 test_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fmsubadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.ps.128 + return _mm_mask3_fmsubadd_ps(__A, __B, __C, __U); +} + +__m256 test_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fmsubadd_ps + // CHECK: @llvm.x86.avx512.mask3.vfmsubadd.ps.256 + return _mm256_mask3_fmsubadd_ps(__A, __B, __C, __U); +} + +__m128d test_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_mask_fnmadd_pd + // CHECK: @llvm.x86.avx512.mask.vfnmadd.pd.128 + return _mm_mask_fnmadd_pd(__A, __U, __B, __C); +} + +__m256d test_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_mask_fnmadd_pd + // CHECK: @llvm.x86.avx512.mask.vfnmadd.pd.256 + return _mm256_mask_fnmadd_pd(__A, __U, __B, __C); +} + +__m128 test_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_mask_fnmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfnmadd.ps.128 + return _mm_mask_fnmadd_ps(__A, __U, __B, __C); +} + +__m256 test_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_mask_fnmadd_ps + // CHECK: @llvm.x86.avx512.mask.vfnmadd.ps.256 + return _mm256_mask_fnmadd_ps(__A, __U, __B, __C); +} + +__m128d test_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { + // CHECK-LABEL: @test_mm_mask_fnmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfnmsub.pd.128 + return _mm_mask_fnmsub_pd(__A, __U, __B, __C); +} + +__m128d test_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fnmsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.pd.128 + return _mm_mask3_fnmsub_pd(__A, __B, __C, __U); +} + +__m256d test_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { + // CHECK-LABEL: @test_mm256_mask_fnmsub_pd + // CHECK: @llvm.x86.avx512.mask.vfnmsub.pd.256 + return _mm256_mask_fnmsub_pd(__A, __U, __B, __C); +} + +__m256d test_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fnmsub_pd + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.pd.256 + return _mm256_mask3_fnmsub_pd(__A, __B, __C, __U); +} + +__m128 test_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { + // CHECK-LABEL: @test_mm_mask_fnmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfnmsub.ps.128 + return _mm_mask_fnmsub_ps(__A, __U, __B, __C); +} + +__m128 test_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm_mask3_fnmsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.ps.128 + return _mm_mask3_fnmsub_ps(__A, __B, __C, __U); +} + +__m256 test_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { + // CHECK-LABEL: @test_mm256_mask_fnmsub_ps + // CHECK: @llvm.x86.avx512.mask.vfnmsub.ps.256 + return _mm256_mask_fnmsub_ps(__A, __U, __B, __C); +} + +__m256 test_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { + // CHECK-LABEL: @test_mm256_mask3_fnmsub_ps + // CHECK: @llvm.x86.avx512.mask3.vfnmsub.ps.256 + return _mm256_mask3_fnmsub_ps(__A, __B, __C, __U); +} + diff --git a/test/CodeGen/builtin-cpu-supports.c b/test/CodeGen/builtin-cpu-supports.c new file mode 100644 index 0000000000000..2252b3e2b8cd4 --- /dev/null +++ b/test/CodeGen/builtin-cpu-supports.c @@ -0,0 +1,16 @@ +// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm < %s| FileCheck %s + +// Test that we have the structure definition, the gep offsets, the name of the +// global, the bit grab, and the icmp correct. +extern void a(const char *); + +int main() { + if (__builtin_cpu_supports("sse4.2")) + a("sse4.2"); + + // CHECK: [[LOAD:%[^ ]+]] = load i32, i32* getelementptr inbounds ({ i32, i32, i32, [1 x i32] }, { i32, i32, i32, [1 x i32] }* @__cpu_model, i32 0, i32 3, i32 0) + // CHECK: [[AND:%[^ ]+]] = and i32 [[LOAD]], 256 + // CHECK = icmp ne i32 [[AND]], 0 + + return 0; +} diff --git a/test/CodeGen/builtins-nvptx.c b/test/CodeGen/builtins-nvptx.c index 5f91f7ad3b0bb..ebf20673ddb48 100644 --- a/test/CodeGen/builtins-nvptx.c +++ b/test/CodeGen/builtins-nvptx.c @@ -1,8 +1,13 @@ // REQUIRES: nvptx-registered-target -// RUN: %clang_cc1 -triple nvptx-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple nvptx64-unknown-unknown -S -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple nvptx-unknown-unknown -fcuda-is-device -S -emit-llvm -o - -x cuda %s | FileCheck %s +// RUN: %clang_cc1 -triple nvptx64-unknown-unknown -fcuda-is-device -S -emit-llvm -o - -x cuda %s | FileCheck %s -int read_tid() { +#define __device__ __attribute__((device)) +#define __global__ __attribute__((global)) +#define __shared__ __attribute__((shared)) +#define __constant__ __attribute__((constant)) + +__device__ int read_tid() { // CHECK: call i32 @llvm.ptx.read.tid.x() // CHECK: call i32 @llvm.ptx.read.tid.y() @@ -18,7 +23,7 @@ int read_tid() { } -int read_ntid() { +__device__ int read_ntid() { // CHECK: call i32 @llvm.ptx.read.ntid.x() // CHECK: call i32 @llvm.ptx.read.ntid.y() @@ -34,7 +39,7 @@ int read_ntid() { } -int read_ctaid() { +__device__ int read_ctaid() { // CHECK: call i32 @llvm.ptx.read.ctaid.x() // CHECK: call i32 @llvm.ptx.read.ctaid.y() @@ -50,7 +55,7 @@ int read_ctaid() { } -int read_nctaid() { +__device__ int read_nctaid() { // CHECK: call i32 @llvm.ptx.read.nctaid.x() // CHECK: call i32 @llvm.ptx.read.nctaid.y() @@ -66,7 +71,7 @@ int read_nctaid() { } -int read_ids() { +__device__ int read_ids() { // CHECK: call i32 @llvm.ptx.read.laneid() // CHECK: call i32 @llvm.ptx.read.warpid() @@ -86,7 +91,7 @@ int read_ids() { } -int read_lanemasks() { +__device__ int read_lanemasks() { // CHECK: call i32 @llvm.ptx.read.lanemask.eq() // CHECK: call i32 @llvm.ptx.read.lanemask.le() @@ -104,8 +109,7 @@ int read_lanemasks() { } - -long read_clocks() { +__device__ long read_clocks() { // CHECK: call i32 @llvm.ptx.read.clock() // CHECK: call i64 @llvm.ptx.read.clock64() @@ -117,7 +121,7 @@ long read_clocks() { } -int read_pms() { +__device__ int read_pms() { // CHECK: call i32 @llvm.ptx.read.pm0() // CHECK: call i32 @llvm.ptx.read.pm1() @@ -133,7 +137,7 @@ int read_pms() { } -void sync() { +__device__ void sync() { // CHECK: call void @llvm.ptx.bar.sync(i32 0) @@ -146,7 +150,7 @@ void sync() { // The idea is not to test all intrinsics, just that Clang is recognizing the // builtins defined in BuiltinsNVPTX.def -void nvvm_math(float f1, float f2, double d1, double d2) { +__device__ void nvvm_math(float f1, float f2, double d1, double d2) { // CHECK: call float @llvm.nvvm.fmax.f float t1 = __nvvm_fmax_f(f1, f2); // CHECK: call float @llvm.nvvm.fmin.f @@ -176,3 +180,95 @@ void nvvm_math(float f1, float f2, double d1, double d2) { // CHECK: call void @llvm.nvvm.barrier0() __nvvm_bar0(); } + +__device__ int di; +__shared__ int si; +__device__ long dl; +__shared__ long sl; +__device__ long long dll; +__shared__ long long sll; + +// Check for atomic intrinsics +// CHECK-LABEL: nvvm_atom +__device__ void nvvm_atom(float *fp, float f, int *ip, int i, long *lp, long l, + long long *llp, long long ll) { + // CHECK: atomicrmw add + __nvvm_atom_add_gen_i(ip, i); + // CHECK: atomicrmw add + __nvvm_atom_add_gen_l(&dl, l); + // CHECK: atomicrmw add + __nvvm_atom_add_gen_ll(&sll, ll); + + // CHECK: atomicrmw sub + __nvvm_atom_sub_gen_i(ip, i); + // CHECK: atomicrmw sub + __nvvm_atom_sub_gen_l(&dl, l); + // CHECK: atomicrmw sub + __nvvm_atom_sub_gen_ll(&sll, ll); + + // CHECK: atomicrmw and + __nvvm_atom_and_gen_i(ip, i); + // CHECK: atomicrmw and + __nvvm_atom_and_gen_l(&dl, l); + // CHECK: atomicrmw and + __nvvm_atom_and_gen_ll(&sll, ll); + + // CHECK: atomicrmw or + __nvvm_atom_or_gen_i(ip, i); + // CHECK: atomicrmw or + __nvvm_atom_or_gen_l(&dl, l); + // CHECK: atomicrmw or + __nvvm_atom_or_gen_ll(&sll, ll); + + // CHECK: atomicrmw xor + __nvvm_atom_xor_gen_i(ip, i); + // CHECK: atomicrmw xor + __nvvm_atom_xor_gen_l(&dl, l); + // CHECK: atomicrmw xor + __nvvm_atom_xor_gen_ll(&sll, ll); + + // CHECK: atomicrmw xchg + __nvvm_atom_xchg_gen_i(ip, i); + // CHECK: atomicrmw xchg + __nvvm_atom_xchg_gen_l(&dl, l); + // CHECK: atomicrmw xchg + __nvvm_atom_xchg_gen_ll(&sll, ll); + + // CHECK: atomicrmw max + __nvvm_atom_max_gen_i(ip, i); + // CHECK: atomicrmw max + __nvvm_atom_max_gen_ui((unsigned int *)ip, i); + // CHECK: atomicrmw max + __nvvm_atom_max_gen_l(&dl, l); + // CHECK: atomicrmw max + __nvvm_atom_max_gen_ul((unsigned long *)&dl, l); + // CHECK: atomicrmw max + __nvvm_atom_max_gen_ll(&sll, ll); + // CHECK: atomicrmw max + __nvvm_atom_max_gen_ull((unsigned long long *)&sll, ll); + + // CHECK: atomicrmw min + __nvvm_atom_min_gen_i(ip, i); + // CHECK: atomicrmw min + __nvvm_atom_min_gen_ui((unsigned int *)ip, i); + // CHECK: atomicrmw min + __nvvm_atom_min_gen_l(&dl, l); + // CHECK: atomicrmw min + __nvvm_atom_min_gen_ul((unsigned long *)&dl, l); + // CHECK: atomicrmw min + __nvvm_atom_min_gen_ll(&sll, ll); + // CHECK: atomicrmw min + __nvvm_atom_min_gen_ull((unsigned long long *)&sll, ll); + + // CHECK: cmpxchg + __nvvm_atom_cas_gen_i(ip, 0, i); + // CHECK: cmpxchg + __nvvm_atom_cas_gen_l(&dl, 0, l); + // CHECK: cmpxchg + __nvvm_atom_cas_gen_ll(&sll, 0, ll); + + // CHECK: call float @llvm.nvvm.atomic.load.add.f32.p0f32 + __nvvm_atom_add_gen_f(fp, f); + + // CHECK: ret +} diff --git a/test/CodeGen/builtins-ppc-p8vector.c b/test/CodeGen/builtins-ppc-p8vector.c index ac4079016aeea..61e14ba283d25 100644 --- a/test/CodeGen/builtins-ppc-p8vector.c +++ b/test/CodeGen/builtins-ppc-p8vector.c @@ -1,7 +1,11 @@ // REQUIRES: powerpc-registered-target // RUN: %clang_cc1 -faltivec -target-feature +power8-vector -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s // RUN: %clang_cc1 -faltivec -target-feature +power8-vector -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-LE -// RUN: not %clang_cc1 -faltivec -triple powerpc64-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s -check-prefix=CHECK-PPC +// RUN: not %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s -o - 2>&1 | FileCheck %s -check-prefix=CHECK-PPC +// Added -target-feature +vsx above to avoid errors about "vector double" and to +// generate the correct errors for functions that are only overloaded with VSX +// (vec_cmpge, vec_cmple). Without this option, there is only one overload so +// it is selected. vector signed char vsc = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 2, 3, 4, 5 }; vector unsigned char vuc = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 1, 2, 3, 4, 5 }; @@ -11,6 +15,7 @@ vector bool int vbi = {0, -1, -1, 0}; vector bool long long vbll = { 1, 0 }; vector signed long long vsll = { 1, 2 }; vector unsigned long long vull = { 1, 2 }; +vector double vda = { 1.e-11, -132.23e10 }; int res_i; vector signed char res_vsc; @@ -21,10 +26,63 @@ vector bool int res_vbi; vector bool long long res_vbll; vector signed long long res_vsll; vector unsigned long long res_vull; +vector double res_vd; // CHECK-LABEL: define void @test1 void test1() { + /* vec_abs */ + res_vsll = vec_abs(vsll); +// CHECK: call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %{{[0-9]*}}, <2 x i64> +// CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %{{[0-9]*}}, <2 x i64> +// CHECK-PPC: error: call to 'vec_abs' is ambiguous + + res_vd = vec_abs(vda); +// CHECK: store <2 x i64> <i64 9223372036854775807, i64 9223372036854775807>, <2 x i64>* +// CHECK: and <2 x i64> +// CHECK-LE: store <2 x i64> <i64 9223372036854775807, i64 9223372036854775807>, <2 x i64>* +// CHECK-LE: and <2 x i64> +// CHECK-PPC: error: call to 'vec_abs' is ambiguous + + /* vec_add */ + res_vsll = vec_add(vsll, vsll); +// CHECK: add <2 x i64> +// CHECK-LE: add <2 x i64> +// CHECK-PPC: error: call to 'vec_add' is ambiguous + + res_vull = vec_add(vull, vull); +// CHECK: add <2 x i64> +// CHECK-LE: add <2 x i64> +// CHECK-PPC: error: call to 'vec_add' is ambiguous + + /* vec_mergee */ + res_vbi = vec_mergee(vbi, vbi); +// CHECK: @llvm.ppc.altivec.vperm +// CHECK-LE: @llvm.ppc.altivec.vperm + + res_vi = vec_mergee(vi, vi); +// CHECK: @llvm.ppc.altivec.vperm +// CHECK-LE: @llvm.ppc.altivec.vperm + + res_vui = vec_mergee(vui, vui); +// CHECK: @llvm.ppc.altivec.vperm +// CHECK-LE: @llvm.ppc.altivec.vperm +// CHECK-PPC: warning: implicit declaration of function 'vec_mergee' + + /* vec_mergeo */ + res_vbi = vec_mergeo(vbi, vbi); +// CHECK: @llvm.ppc.altivec.vperm +// CHECK-LE: @llvm.ppc.altivec.vperm + + res_vi = vec_mergeo(vi, vi); +// CHECK: @llvm.ppc.altivec.vperm +// CHECK-LE: @llvm.ppc.altivec.vperm + + res_vui = vec_mergeo(vui, vui); +// CHECK: @llvm.ppc.altivec.vperm +// CHECK-LE: @llvm.ppc.altivec.vperm +// CHECK-PPC: warning: implicit declaration of function 'vec_mergeo' + /* vec_cmpeq */ res_vbll = vec_cmpeq(vsll, vsll); // CHECK: @llvm.ppc.altivec.vcmpequd @@ -36,6 +94,28 @@ void test1() { // CHECK-LE: @llvm.ppc.altivec.vcmpequd // CHECK-PPC: error: call to 'vec_cmpeq' is ambiguous + /* vec_cmpge */ + res_vbll = vec_cmpge(vsll, vsll); +// CHECK: @llvm.ppc.altivec.vcmpgtsd +// CHECK-LE: @llvm.ppc.altivec.vcmpgtsd +// CHECK-PPC: error: call to 'vec_cmpge' is ambiguous + + res_vbll = vec_cmpge(vull, vull); +// CHECK: @llvm.ppc.altivec.vcmpgtud +// CHECK-LE: @llvm.ppc.altivec.vcmpgtud +// CHECK-PPC: error: call to 'vec_cmpge' is ambiguous + + /* vec_cmple */ + res_vbll = vec_cmple(vsll, vsll); +// CHECK: @llvm.ppc.altivec.vcmpgtsd +// CHECK-LE: @llvm.ppc.altivec.vcmpgtsd +// CHECK-PPC: error: call to 'vec_cmple' is ambiguous + + res_vbll = vec_cmple(vull, vull); +// CHECK: @llvm.ppc.altivec.vcmpgtud +// CHECK-LE: @llvm.ppc.altivec.vcmpgtud +// CHECK-PPC: error: call to 'vec_cmple' is ambiguous + /* vec_cmpgt */ res_vbll = vec_cmpgt(vsll, vsll); // CHECK: @llvm.ppc.altivec.vcmpgtsd @@ -47,6 +127,17 @@ void test1() { // CHECK-LE: @llvm.ppc.altivec.vcmpgtud // CHECK-PPC: error: call to 'vec_cmpgt' is ambiguous + /* vec_cmplt */ + res_vbll = vec_cmplt(vsll, vsll); +// CHECK: call <2 x i64> @llvm.ppc.altivec.vcmpgtsd(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}}) +// CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vcmpgtsd(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}}) +// CHECK-PPC: error: call to 'vec_cmplt' is ambiguous + + res_vbll = vec_cmplt(vull, vull); +// CHECK: call <2 x i64> @llvm.ppc.altivec.vcmpgtud(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}}) +// CHECK-LE: call <2 x i64> @llvm.ppc.altivec.vcmpgtud(<2 x i64> %{{[0-9]*}}, <2 x i64> %{{[0-9]*}}) +// CHECK-PPC: error: call to 'vec_cmplt' is ambiguous + /* ----------------------- predicates --------------------------- */ /* vec_all_eq */ res_i = vec_all_eq(vsll, vsll); diff --git a/test/CodeGen/builtins-ppc-vsx.c b/test/CodeGen/builtins-ppc-vsx.c index 631cb6ccafbed..99362133dd9aa 100644 --- a/test/CodeGen/builtins-ppc-vsx.c +++ b/test/CodeGen/builtins-ppc-vsx.c @@ -1,5 +1,6 @@ // REQUIRES: powerpc-registered-target // RUN: %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -faltivec -target-feature +vsx -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s vector unsigned char vuc = { 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7}; @@ -16,14 +17,98 @@ vector float res_vf; vector double res_vd; vector signed int res_vsi; vector unsigned int res_vui; +vector bool int res_vbi; vector bool long long res_vbll; vector signed long long res_vsll; vector unsigned long long res_vull; double res_d; +void dummy() { } + void test1() { // CHECK-LABEL: define void @test1 + res_vd = vec_add(vd, vd); +// CHECK: fadd <2 x double> + + res_vd = vec_and(vbll, vd); +// CHECK: and <2 x i64> +// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> + + res_vd = vec_and(vd, vbll); +// CHECK: and <2 x i64> +// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> + + res_vd = vec_and(vd, vd); +// CHECK: and <2 x i64> +// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> + + dummy(); +// CHECK: call void @dummy() + + res_vd = vec_andc(vbll, vd); +// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> +// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> +// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> + + dummy(); +// CHECK: call void @dummy() + + res_vd = vec_andc(vd, vbll); +// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> +// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> +// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> + + dummy(); +// CHECK: call void @dummy() + + res_vd = vec_andc(vd, vd); +// CHECK: bitcast <2 x double> %{{[0-9]*}} to <2 x i64> +// CHECK: xor <2 x i64> %{{[0-9]*}}, <i64 -1, i64 -1> +// CHECK: and <2 x i64> +// CHECK: bitcast <2 x i64> %{{[0-9]*}} to <2 x double> + + dummy(); +// CHECK: call void @dummy() + + res_vd = vec_ceil(vd); +// CHECK: call <2 x double> @llvm.ceil.v2f64(<2 x double> %{{[0-9]*}}) + + res_vf = vec_ceil(vf); +// CHECK: call <4 x float> @llvm.ceil.v4f32(<4 x float> %{{[0-9]*}}) + + res_vbll = vec_cmpeq(vd, vd); +// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpeqdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) + + res_vbi = vec_cmpeq(vf, vf); +// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpeqsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) + + res_vbll = vec_cmpge(vd, vd); +// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) + + res_vbi = vec_cmpge(vf, vf); +// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) + + res_vbll = vec_cmpgt(vd, vd); +// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) + + res_vbi = vec_cmpgt(vf, vf); +// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) + + res_vbll = vec_cmple(vd, vd); +// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgedp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) + + res_vbi = vec_cmple(vf, vf); +// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgesp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) + + res_vbll = vec_cmplt(vd, vd); +// CHECK: call <2 x i64> @llvm.ppc.vsx.xvcmpgtdp(<2 x double> %{{[0-9]*}}, <2 x double> %{{[0-9]*}}) + + res_vbi = vec_cmplt(vf, vf); +// CHECK: call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> %{{[0-9]*}}, <4 x float> %{{[0-9]*}}) + /* vec_div */ res_vf = vec_div(vf, vf); // CHECK: @llvm.ppc.vsx.xvdivsp diff --git a/test/CodeGen/builtins-x86.c b/test/CodeGen/builtins-x86.c index 8a5b5a272d4c7..a239889e2b494 100644 --- a/test/CodeGen/builtins-x86.c +++ b/test/CodeGen/builtins-x86.c @@ -260,6 +260,10 @@ void f0() { (void) __builtin_ia32_ldmxcsr(tmp_Ui); tmp_Ui = __builtin_ia32_stmxcsr(); + (void)__builtin_ia32_fxsave(tmp_vp); + (void)__builtin_ia32_fxsave64(tmp_vp); + (void)__builtin_ia32_fxrstor(tmp_vp); + (void)__builtin_ia32_fxrstor64(tmp_vp); tmp_V4f = __builtin_ia32_cvtpi2ps(tmp_V4f, tmp_V2i); tmp_V2i = __builtin_ia32_cvtps2pi(tmp_V4f); tmp_i = __builtin_ia32_cvtss2si(tmp_V4f); diff --git a/test/CodeGen/builtinshufflevector2.c b/test/CodeGen/builtinshufflevector2.c index 8712c991fe18c..0e7b2ecd6871d 100644 --- a/test/CodeGen/builtinshufflevector2.c +++ b/test/CodeGen/builtinshufflevector2.c @@ -3,7 +3,7 @@ typedef float float4 __attribute__((ext_vector_type(4))); typedef unsigned int uint4 __attribute__((ext_vector_type(4))); -// CHECK-LABEL: define void @clang_shufflevector_v_v( +// CHECK-LABEL: define {{.*}}void @clang_shufflevector_v_v( void clang_shufflevector_v_v( float4* A, float4 x, uint4 mask ) { // CHECK: [[MASK:%.*]] = and <4 x i32> {{%.*}}, <i32 3, i32 3, i32 3, i32 3> // CHECK: [[I:%.*]] = extractelement <4 x i32> [[MASK]], i{{[0-9]+}} 0 @@ -27,14 +27,14 @@ void clang_shufflevector_v_v( float4* A, float4 x, uint4 mask ) { *A = __builtin_shufflevector( x, mask ); } -// CHECK-LABEL: define void @clang_shufflevector_v_v_c( +// CHECK-LABEL: define {{.*}}void @clang_shufflevector_v_v_c( void clang_shufflevector_v_v_c( float4* A, float4 x, float4 y) { // CHECK: [[V:%.*]] = shufflevector <4 x float> {{%.*}}, <4 x float> {{%.*}}, <4 x i32> <i32 0, i32 4, i32 1, i32 5> // CHECK: store <4 x float> [[V]], <4 x float>* {{%.*}} *A = __builtin_shufflevector( x, y, 0, 4, 1, 5 ); } -// CHECK-LABEL: define void @clang_shufflevector_v_v_undef( +// CHECK-LABEL: define {{.*}}void @clang_shufflevector_v_v_undef( void clang_shufflevector_v_v_undef( float4* A, float4 x, float4 y) { // CHECK: [[V:%.*]] = shufflevector <4 x float> {{%.*}}, <4 x float> {{%.*}}, <4 x i32> <i32 0, i32 4, i32 undef, i32 5> // CHECK: store <4 x float> [[V]], <4 x float>* {{%.*}} diff --git a/test/CodeGen/c-strings.c b/test/CodeGen/c-strings.c index 588a716a16a4f..974eeea87677c 100644 --- a/test/CodeGen/c-strings.c +++ b/test/CodeGen/c-strings.c @@ -23,44 +23,44 @@ unsigned char align = 1; void bar(const char *); -// CHECK-LABEL: define void @f0() +// CHECK-LABEL: define {{.*}}void @f0() void f0() { bar("hello"); - // ITANIUM: call void @bar({{.*}} @.str - // MSABI: call void @bar({{.*}} @"\01??_C@_05CJBACGMB@hello?$AA@" + // ITANIUM: call {{.*}}void @bar({{.*}} @.str + // MSABI: call {{.*}}void @bar({{.*}} @"\01??_C@_05CJBACGMB@hello?$AA@" } -// CHECK-LABEL: define void @f1() +// CHECK-LABEL: define {{.*}}void @f1() void f1() { static char *x = "hello"; bar(x); // CHECK: [[T1:%.*]] = load i8*, i8** @f1.x - // CHECK: call void @bar(i8* [[T1:%.*]]) + // CHECK: call {{.*}}void @bar(i8* [[T1:%.*]]) } -// CHECK-LABEL: define void @f2() +// CHECK-LABEL: define {{.*}}void @f2() void f2() { static char x[] = "hello"; bar(x); - // CHECK: call void @bar({{.*}} @f2.x + // CHECK: call {{.*}}void @bar({{.*}} @f2.x } -// CHECK-LABEL: define void @f3() +// CHECK-LABEL: define {{.*}}void @f3() void f3() { static char x[8] = "hello"; bar(x); - // CHECK: call void @bar({{.*}} @f3.x + // CHECK: call {{.*}}void @bar({{.*}} @f3.x } void gaz(void *); -// CHECK-LABEL: define void @f4() +// CHECK-LABEL: define {{.*}}void @f4() void f4() { static struct s { char *name; } x = { "hello" }; gaz(&x); - // CHECK: call void @gaz({{.*}} @f4.x + // CHECK: call {{.*}}void @gaz({{.*}} @f4.x } char x[3] = "ola"; diff --git a/test/CodeGen/c11atomics.c b/test/CodeGen/c11atomics.c index a35eef9426484..d1e4478d7ecd5 100644 --- a/test/CodeGen/c11atomics.c +++ b/test/CodeGen/c11atomics.c @@ -12,8 +12,24 @@ // they're sufficiently rare that it's not worth making sure that the semantics // are correct. -// CHECK: @testStructGlobal = global {{.*}} { i16 1, i16 2, i16 3, i16 4 } -// CHECK: @testPromotedStructGlobal = global {{.*}} { %{{.*}} { i16 1, i16 2, i16 3 }, [2 x i8] zeroinitializer } +struct elem; + +struct ptr { + struct elem *ptr; +}; +// CHECK-DAG: %struct.ptr = type { %struct.elem* } + +struct elem { + _Atomic(struct ptr) link; +}; +// CHECK-DAG: %struct.elem = type { %struct.ptr } + +struct ptr object; +// CHECK-DAG: @object = common global %struct.ptr zeroinitializer + +// CHECK-DAG: @testStructGlobal = global {{.*}} { i16 1, i16 2, i16 3, i16 4 } +// CHECK-DAG: @testPromotedStructGlobal = global {{.*}} { %{{.*}} { i16 1, i16 2, i16 3 }, [2 x i8] zeroinitializer } + typedef int __attribute__((vector_size(16))) vector; diff --git a/test/CodeGen/call.c b/test/CodeGen/call.c index 723911158c05e..eec6e52b72f23 100644 --- a/test/CodeGen/call.c +++ b/test/CodeGen/call.c @@ -18,7 +18,7 @@ void JS_ReportErrorNumber(JSErrorCallback errorCallback, ...); void Interpret() { JS_ReportErrorNumber(js_GetErrorMessage, 0); - // CHECK: call void ({{.*}}, ...) @JS_ReportErrorNumber({{.*}}@js_GetErrorMessage + // CHECK: call {{.*}}void ({{.*}}, ...) @JS_ReportErrorNumber({{.*}}@js_GetErrorMessage } diff --git a/test/CodeGen/captured-statements-nested.c b/test/CodeGen/captured-statements-nested.c index 646424339b7fc..b81705b8ad89f 100644 --- a/test/CodeGen/captured-statements-nested.c +++ b/test/CodeGen/captured-statements-nested.c @@ -30,7 +30,7 @@ void test_nest_captured_stmt(int param, int size, int param_arr[size]) { param_arr[size - 1] = 2; arr[10][z.a] = 12; - // CHECK1: define internal void @__captured_stmt{{.*}}([[T]] + // CHECK1: define internal {{.*}}void @__captured_stmt{{.*}}([[T]] // CHECK1: [[PARAM_ARR_SIZE_REF:%.+]] = getelementptr inbounds [[T]], [[T]]* {{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 5 // CHECK1: [[PARAM_ARR_SIZE:%.+]] = load [[SIZE_TYPE]], [[SIZE_TYPE]]* [[PARAM_ARR_SIZE_REF]] // CHECK1: [[ARR_SIZE1_REF:%.+]] = getelementptr inbounds [[T]], [[T]]* {{.+}}, i{{[0-9]+}} 0, i{{[0-9]+}} 8 @@ -106,7 +106,7 @@ void test_nest_block() { } }(); - // CHECK2: define internal void @{{.*}}test_nest_block_block_invoke + // CHECK2: define internal {{.*}}void @{{.*}}test_nest_block_block_invoke // // CHECK2: [[Z:%[0-9a-z_]*]] = alloca i{{[0-9]+}}, // CHECK2: alloca %struct.anon{{.*}} diff --git a/test/CodeGen/captured-statements.c b/test/CodeGen/captured-statements.c index b4fbfd43d5cab..53632ac45d72b 100644 --- a/test/CodeGen/captured-statements.c +++ b/test/CodeGen/captured-statements.c @@ -28,7 +28,7 @@ void test1() { // CHECK-1: call void @[[HelperName:__captured_stmt[\.0-9]+]] } -// CHECK-1: define internal void @[[HelperName]](%struct.anon +// CHECK-1: define internal {{.*}}void @[[HelperName]](%struct.anon // CHECK-1: getelementptr inbounds %struct.anon{{.*}}, i32 0, i32 0 // CHECK-1: load i32*, i32** // CHECK-1: load i32, i32* @@ -48,7 +48,7 @@ void test2(int x) { // CHECK-2: call void @[[HelperName:__captured_stmt[\.0-9]+]] } -// CHECK-2: define internal void @[[HelperName]] +// CHECK-2: define internal {{.*}}void @[[HelperName]] // CHECK-2-NOT: } // CHECK-2: %i = alloca i32 @@ -93,7 +93,7 @@ void dont_capture_global() { // CHECK-GLOBALS: call void @__captured_stmt[[HelperName:[\.0-9]+]](%[[Capture]] } -// CHECK-GLOBALS: define internal void @__captured_stmt[[HelperName]] +// CHECK-GLOBALS: define internal {{.*}}void @__captured_stmt[[HelperName]] // CHECK-GLOBALS-NOT: ret // CHECK-GLOBALS: load i32, i32* @global // CHECK-GLOBALS: load i32, i32* @ diff --git a/test/CodeGen/complex-convert.c b/test/CodeGen/complex-convert.c index 0db2588405770..c65a98cec2be8 100644 --- a/test/CodeGen/complex-convert.c +++ b/test/CodeGen/complex-convert.c @@ -21,7 +21,7 @@ void foo(signed char sc, unsigned char uc, signed long long sll, _Complex unsigned char cuc1; _Complex signed long long csll1; _Complex unsigned long long cull1; - // CHECK-LABEL: define void @foo( + // CHECK-LABEL: define {{.*}}void @foo( // Match the prototype to pick up the size of sc and sll. // CHECK: i[[CHSIZE:[0-9]+]]{{[^,]*}}, // CHECK: i[[CHSIZE]]{{[^,]*}}, diff --git a/test/CodeGen/debug-info-packed-struct.c b/test/CodeGen/debug-info-packed-struct.c new file mode 100644 index 0000000000000..0b5226bf11315 --- /dev/null +++ b/test/CodeGen/debug-info-packed-struct.c @@ -0,0 +1,91 @@ +// RUN: %clang_cc1 -x c -g -emit-llvm -triple x86_64-apple-darwin -o - %s | FileCheck %s + +// CHECK: %struct.layout0 = type { i8, %struct.size8, i8 } +// CHECK: %struct.layout1 = type <{ i8, %struct.size8_anon, i8, [2 x i8] }> +// CHECK: %struct.layout2 = type <{ i8, %struct.size8_pack1, i8 }> +// CHECK: %struct.layout3 = type <{ i8, [3 x i8], %struct.size8_pack4, i8, [3 x i8] }> + +// --------------------------------------------------------------------- +// Not packed. +// --------------------------------------------------------------------- +struct size8 { + int i : 4; + long long l : 60; +}; +struct layout0 { + char l0_ofs0; + struct size8 l0_ofs8; + int l0_ofs16 : 1; +}; +// CHECK: l0_ofs0 +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l0_ofs8", +// CHECK-SAME: {{.*}}size: 64, align: 64, offset: 64) +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l0_ofs16", +// CHECK-SAME: {{.*}}size: 1, align: 32, offset: 128) + + +// --------------------------------------------------------------------- +// Implicitly packed. +// --------------------------------------------------------------------- +struct size8_anon { + int : 4; + long long : 60; +}; +struct layout1 { + char l1_ofs0; + struct size8_anon l1_ofs1; + int l1_ofs9 : 1; +}; +// CHECK: l1_ofs0 +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l1_ofs1", +// CHECK-SAME: {{.*}}size: 64, align: 8, offset: 8) +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l1_ofs9", +// CHECK-SAME: {{.*}}size: 1, align: 32, offset: 72) + + +// --------------------------------------------------------------------- +// Explicitly packed. +// --------------------------------------------------------------------- +#pragma pack(1) +struct size8_pack1 { + int i : 4; + long long l : 60; +}; +struct layout2 { + char l2_ofs0; + struct size8_pack1 l2_ofs1; + int l2_ofs9 : 1; +}; +#pragma pack() +// CHECK: l2_ofs0 +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l2_ofs1", +// CHECK-SAME: {{.*}}size: 64, align: 8, offset: 8) +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l2_ofs9", +// CHECK-SAME: {{.*}}size: 1, align: 32, offset: 72) + + + +// --------------------------------------------------------------------- +// Explicitly packed with different alignment. +// --------------------------------------------------------------------- +#pragma pack(4) +struct size8_pack4 { + int i : 4; + long long l : 60; +}; +struct layout3 { + char l3_ofs0; + struct size8_pack4 l3_ofs4; + int l3_ofs12 : 1; +}; +#pragma pack() +// CHECK: l3_ofs0 +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l3_ofs4", +// CHECK-SAME: {{.*}}size: 64, align: 32, offset: 32) +// CHECK: !DIDerivedType(tag: DW_TAG_member, name: "l3_ofs12", +// CHECK-SAME: {{.*}}size: 1, align: 32, offset: 96) + +struct layout0 l0; +struct layout1 l1; +struct layout2 l2; +struct layout3 l3; diff --git a/test/CodeGen/dostmt.c b/test/CodeGen/dostmt.c index 54973dc99b6e8..67ef64e42d4cf 100644 --- a/test/CodeGen/dostmt.c +++ b/test/CodeGen/dostmt.c @@ -71,6 +71,6 @@ void test6f(void); void test6() { do { } while (test6f(), 0); - // CHECK: call void @test6f() + // CHECK: call {{.*}}void @test6f() } diff --git a/test/CodeGen/fast-math.c b/test/CodeGen/fast-math.c index 4a513589ef4c1..6f98b84327464 100644 --- a/test/CodeGen/fast-math.c +++ b/test/CodeGen/fast-math.c @@ -2,7 +2,7 @@ float f0, f1, f2; void foo(void) { - // CHECK-LABEL: define void @foo() + // CHECK-LABEL: define {{.*}}void @foo() // CHECK: fadd fast f0 = f1 + f2; diff --git a/test/CodeGen/finite-math.c b/test/CodeGen/finite-math.c index 8365b56fe56bb..90a83fa30958d 100644 --- a/test/CodeGen/finite-math.c +++ b/test/CodeGen/finite-math.c @@ -5,7 +5,7 @@ float f0, f1, f2; void foo(void) { - // CHECK-LABEL: define void @foo() + // CHECK-LABEL: define {{.*}}void @foo() // FINITE: fadd nnan ninf // NSZ: fadd nsz diff --git a/test/CodeGen/linkage-redecl.c b/test/CodeGen/linkage-redecl.c index 58993f349f816..4767a94a45f6a 100644 --- a/test/CodeGen/linkage-redecl.c +++ b/test/CodeGen/linkage-redecl.c @@ -16,4 +16,4 @@ void g0() { } extern void f(int x) { } // still has internal linkage -// CHECK-LABEL: define internal void @f +// CHECK-LABEL: define internal {{.*}}void @f diff --git a/test/CodeGen/nomathbuiltin.c b/test/CodeGen/nomathbuiltin.c index f80cd91de9d42..35e7c567e68d2 100644 --- a/test/CodeGen/nomathbuiltin.c +++ b/test/CodeGen/nomathbuiltin.c @@ -7,6 +7,6 @@ double pow(double, double); double foo(double a, double b) { return pow(a, b); -// CHECK: call double @pow +// CHECK: call {{.*}}double @pow } diff --git a/test/CodeGen/openmp_default_simd_align.c b/test/CodeGen/openmp_default_simd_align.c new file mode 100644 index 0000000000000..dcab5abf8fcca --- /dev/null +++ b/test/CodeGen/openmp_default_simd_align.c @@ -0,0 +1,11 @@ +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -O1 -emit-llvm -o - %s | FileCheck %s + +enum e0 { E0 }; +struct s0 { + enum e0 a:31; +}; + +int f0() { + return __builtin_omp_required_simd_align(struct s0); + // CHECK: ret i32 16 +} diff --git a/test/CodeGen/pr9614.c b/test/CodeGen/pr9614.c index 53abef1801d9c..63cb5af1868c1 100644 --- a/test/CodeGen/pr9614.c +++ b/test/CodeGen/pr9614.c @@ -4,26 +4,42 @@ extern void foo_alias (void) __asm ("foo"); inline void foo (void) { return foo_alias (); } -extern void bar_alias (void) __asm ("bar"); -inline __attribute__ ((__always_inline__)) void bar (void) { - return bar_alias (); +extern int abs_alias (int) __asm ("abs"); +inline __attribute__ ((__always_inline__)) int abs (int x) { + return abs_alias(x); } extern char *strrchr_foo (const char *__s, int __c) __asm ("strrchr"); extern inline __attribute__ ((__always_inline__)) __attribute__ ((__gnu_inline__)) char * strrchr_foo (const char *__s, int __c) { return __builtin_strrchr (__s, __c); } + +extern inline void __attribute__((always_inline, __gnu_inline__)) +prefetch(void) { + __builtin_prefetch(0, 0, 1); +} + +extern inline __attribute__((__always_inline__, __gnu_inline__)) void *memchr(void *__s, int __c, __SIZE_TYPE__ __n) { + return __builtin_memchr(__s, __c, __n); +} + void f(void) { foo(); - bar(); + abs(0); strrchr_foo("", '.'); + prefetch(); + memchr("", '.', 0); } // CHECK-LABEL: define void @f() // CHECK: call void @foo() -// CHECK-NEXT: call void @bar() -// CHECK-NEXT: call i8* @strrchr( -// CHECK-NEXT: ret void +// CHECK: call i32 @abs(i32 0) +// CHECK: call i8* @strrchr( +// CHECK: call void @llvm.prefetch( +// CHECK: call i8* @memchr( +// CHECK: ret void // CHECK: declare void @foo() -// CHECK: declare void @bar() +// CHECK: declare i32 @abs(i32 // CHECK: declare i8* @strrchr(i8*, i32) +// CHECK: declare i8* @memchr( +// CHECK: declare void @llvm.prefetch( diff --git a/test/CodeGen/redefine_extname.c b/test/CodeGen/redefine_extname.c index a91e5b836ae6b..ad4106dd4535d 100644 --- a/test/CodeGen/redefine_extname.c +++ b/test/CodeGen/redefine_extname.c @@ -13,3 +13,14 @@ int fish() { return fake() + __PRAGMA_REDEFINE_EXTNAME + name; } // CHECK: call i32 @real() // Check that this also works with variables names // CHECK: load i32, i32* @alias + +// This is a case when redefenition is deferred *and* we have a local of the +// same name. PR23923. +#pragma redefine_extname foo bar +int f() { + int foo = 0; + return foo; +} +extern int foo() { return 1; } +// CHECK: define i32 @bar() + diff --git a/test/CodeGen/stack-protector.c b/test/CodeGen/stack-protector.c index 8039b6059efd4..ecfbc90faa288 100644 --- a/test/CodeGen/stack-protector.c +++ b/test/CodeGen/stack-protector.c @@ -1,13 +1,13 @@ // RUN: %clang_cc1 -emit-llvm -o - %s -stack-protector 0 | FileCheck -check-prefix=NOSSP %s -// NOSSP: define void @test1(i8* %msg) #0 { +// NOSSP: define {{.*}}void @test1(i8* %msg) #0 { // RUN: %clang_cc1 -emit-llvm -o - %s -stack-protector 1 | FileCheck -check-prefix=WITHSSP %s -// WITHSSP: define void @test1(i8* %msg) #0 { +// WITHSSP: define {{.*}}void @test1(i8* %msg) #0 { // RUN: %clang_cc1 -emit-llvm -o - %s -stack-protector 2 | FileCheck -check-prefix=SSPSTRONG %s -// SSPSTRONG: define void @test1(i8* %msg) #0 { +// SSPSTRONG: define {{.*}}void @test1(i8* %msg) #0 { // RUN: %clang_cc1 -emit-llvm -o - %s -stack-protector 3 | FileCheck -check-prefix=SSPREQ %s -// SSPREQ: define void @test1(i8* %msg) #0 { +// SSPREQ: define {{.*}}void @test1(i8* %msg) #0 { // RUN: %clang_cc1 -emit-llvm -o - %s -fsanitize=safe-stack | FileCheck -check-prefix=SAFESTACK %s -// SAFESTACK: define void @test1(i8* %msg) #0 { +// SAFESTACK: define {{.*}}void @test1(i8* %msg) #0 { typedef __SIZE_TYPE__ size_t; diff --git a/test/CodeGen/static-order.c b/test/CodeGen/static-order.c index 58aabbebd57ee..20277d7b65838 100644 --- a/test/CodeGen/static-order.c +++ b/test/CodeGen/static-order.c @@ -1,7 +1,7 @@ // RUN: %clang_cc1 -emit-llvm -o - %s | FileCheck %s // CHECK: ModuleID // CHECK-NOT: zeroinitializer -// CHECK-LABEL: define i8* @f +// CHECK-LABEL: define {{.*}}i8* @f struct s { int a; diff --git a/test/CodeGen/ubsan-blacklist.c b/test/CodeGen/ubsan-blacklist.c index 6c67f027e9226..f6e38822bff82 100644 --- a/test/CodeGen/ubsan-blacklist.c +++ b/test/CodeGen/ubsan-blacklist.c @@ -14,9 +14,9 @@ unsigned i; // FUNC: @hash // FILE: @hash unsigned hash() { -// DEFAULT: call void @__ubsan -// FUNC-NOT: call void @__ubsan -// FILE-NOT: call void @__ubsan +// DEFAULT: call {{.*}}void @__ubsan +// FUNC-NOT: call {{.*}}void @__ubsan +// FILE-NOT: call {{.*}}void @__ubsan return i * 37; } @@ -24,8 +24,8 @@ unsigned hash() { // FUNC: @add // FILE: @add unsigned add() { -// DEFAULT: call void @__ubsan -// FUNC: call void @__ubsan -// FILE-NOT: call void @__ubsan +// DEFAULT: call {{.*}}void @__ubsan +// FUNC: call {{.*}}void @__ubsan +// FILE-NOT: call {{.*}}void @__ubsan return i + 1; } diff --git a/test/CodeGen/volatile-1.c b/test/CodeGen/volatile-1.c index 71cd5f8d1b24d..f63274b37f61b 100644 --- a/test/CodeGen/volatile-1.c +++ b/test/CodeGen/volatile-1.c @@ -22,7 +22,7 @@ int printf(const char *, ...); // that do implicit lvalue-to-rvalue conversion are substantially // reduced. -// CHECK-LABEL: define void @test() +// CHECK-LABEL: define {{.*}}void @test() void test() { // CHECK: load volatile [[INT]], [[INT]]* @i i; @@ -303,11 +303,11 @@ void test() { } extern volatile enum X x; -// CHECK-LABEL: define void @test1() +// CHECK-LABEL: define {{.*}}void @test1() void test1() { extern void test1_helper(void); test1_helper(); - // CHECK: call void @test1_helper() + // CHECK: call {{.*}}void @test1_helper() // CHECK-NEXT: ret void x; (void) x; diff --git a/test/CodeGen/x86_64-arguments.c b/test/CodeGen/x86_64-arguments.c index c412e3c06e865..bb9fba190262d 100644 --- a/test/CodeGen/x86_64-arguments.c +++ b/test/CodeGen/x86_64-arguments.c @@ -1,7 +1,9 @@ // RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | \ -// RUN: FileCheck %s -check-prefix=CHECK -check-prefix=SSE +// RUN: FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=NO-AVX512 // RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s -target-feature +avx | \ -// RUN: FileCheck %s -check-prefix=CHECK -check-prefix=AVX +// RUN: FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=NO-AVX512 +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s -target-feature +avx512f | \ +// RUN: FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX512 #include <stdarg.h> // CHECK-LABEL: define signext i8 @f0() @@ -458,3 +460,77 @@ void test54() { } // AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}}) // AVX: @test54_helper(<8 x float> {{%[a-zA-Z0-9]+}}, <8 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, { double, double }* byval align 8 {{%[a-zA-Z0-9]+}}) + +typedef float __m512 __attribute__ ((__vector_size__ (64))); +typedef struct { + __m512 m; +} s512; + +s512 x55; +__m512 x56; + +// Even on AVX512, aggregates of size larger than four eightbytes have class +// MEMORY (AVX512 draft 0.3 3.2.3p2 Rule 1). +// +// CHECK: declare void @f55(%struct.s512* byval align 64) +void f55(s512 x); + +// However, __m512 has type SSE/SSEUP on AVX512. +// +// AVX512: declare void @f56(<16 x float>) +// NO-AVX512: declare void @f56(<16 x float>* byval align 64) +void f56(__m512 x); +void f57() { f55(x55); f56(x56); } + +// Like for __m128 on AVX, check that the struct below is passed +// in the same way regardless of AVX512 being used. +// +// CHECK: declare void @f58(%struct.t256* byval align 32) +typedef struct t256 { + __m256 m; + __m256 n; +} two256; + +extern void f58(two256 s); +void f59(two256 s) { + f58(s); +} + +// CHECK: declare void @f60(%struct.sat256* byval align 32) +typedef struct at256 { + __m256 array[2]; +} Atwo256; +typedef struct sat256 { + Atwo256 x; +} SAtwo256; + +extern void f60(SAtwo256 s); +void f61(SAtwo256 s) { + f60(s); +} + +// AVX512: @f62_helper(i32 0, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}}) +void f62_helper(int, ...); +__m512 x62; +void f62() { + f62_helper(0, x62, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); +} + +// Like for __m256 on AVX, we always pass __m512 in memory, and don't +// need to use the register save area. +// +// AVX512-LABEL: define void @f63 +// AVX512-NOT: br i1 +// AVX512: ret void +void f63(__m512 *m, __builtin_va_list argList) { + *m = __builtin_va_arg(argList, __m512); +} + +// AVX512: @f64_helper(<16 x float> {{%[a-zA-Z0-9]+}}, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double {{%[a-zA-Z0-9]+}}, double {{%[a-zA-Z0-9]+}}) +// AVX512: @f64_helper(<16 x float> {{%[a-zA-Z0-9]+}}, <16 x float> {{%[a-zA-Z0-9]+}}, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, { double, double }* byval align 8 {{%[a-zA-Z0-9]+}}) +void f64_helper(__m512, ...); +__m512 x64; +void f64() { + f64_helper(x64, x64, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); + f64_helper(x64, x64, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0i); +} |