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Diffstat (limited to 'test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll')
| -rw-r--r-- | test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll | 24 |
1 files changed, 23 insertions, 1 deletions
diff --git a/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll b/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll index 3c4e08b5b515c..9053578175094 100644 --- a/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll +++ b/test/Transforms/InstCombine/2017-07-07-UMul-ZExt.ll @@ -1,7 +1,29 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s -; CHECK: llvm.umul.with.overflow define i32 @sterix(i32, i8, i64) { +; CHECK-LABEL: @sterix( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[TMP0:%.*]] to i64 +; CHECK-NEXT: [[CONV1:%.*]] = sext i8 [[TMP1:%.*]] to i32 +; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[CONV1]], 1945964878 +; CHECK-NEXT: [[SH_PROM:%.*]] = trunc i64 [[TMP2:%.*]] to i32 +; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[MUL]], [[SH_PROM]] +; CHECK-NEXT: [[CONV2:%.*]] = zext i32 [[SHR]] to i64 +; CHECK-NEXT: [[MUL3:%.*]] = mul nuw nsw i64 [[CONV]], [[CONV2]] +; CHECK-NEXT: [[CONV6:%.*]] = and i64 [[MUL3]], 4294967295 +; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[CONV6]], [[MUL3]] +; CHECK-NEXT: br i1 [[TOBOOL]], label [[LOR_RHS:%.*]], label [[LOR_END:%.*]] +; CHECK: lor.rhs: +; CHECK-NEXT: [[AND:%.*]] = and i64 [[MUL3]], [[TMP2]] +; CHECK-NEXT: [[CONV4:%.*]] = trunc i64 [[AND]] to i32 +; CHECK-NEXT: [[TOBOOL7:%.*]] = icmp eq i32 [[CONV4]], 0 +; CHECK-NEXT: [[PHITMP:%.*]] = zext i1 [[TOBOOL7]] to i32 +; CHECK-NEXT: br label [[LOR_END]] +; CHECK: lor.end: +; CHECK-NEXT: [[TMP3:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[PHITMP]], [[LOR_RHS]] ] +; CHECK-NEXT: ret i32 [[TMP3]] +; entry: %conv = zext i32 %0 to i64 %conv1 = sext i8 %1 to i32 |