1 files changed, 49 insertions, 10 deletions
diff --git a/test/Transforms/SimplifyCFG/switch-masked-bits.ll b/test/Transforms/SimplifyCFG/switch-masked-bits.ll
index 692973c362bf5..2d46aac23f61b 100644
--- a/test/Transforms/SimplifyCFG/switch-masked-bits.ll
+++ b/test/Transforms/SimplifyCFG/switch-masked-bits.ll
@@ -1,10 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -S -simplifycfg < %s | FileCheck %s
 
 define i32 @test1(i32 %x) nounwind {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:  a:
+; CHECK-NEXT:    [[I:%.*]] = shl i32 %x, 1
+; CHECK-NEXT:    [[COND:%.*]] = icmp eq i32 [[I]], 24
+; CHECK-NEXT:    [[DOT:%.*]] = select i1 [[COND]], i32 5, i32 0
+; CHECK-NEXT:    ret i32 [[DOT]]
+;
   %i = shl i32 %x, 1
   switch i32 %i, label %a [
-    i32 21, label %b
-    i32 24, label %c
+  i32 21, label %b
+  i32 24, label %c
   ]
 
 a:
@@ -13,18 +21,18 @@ b:
   ret i32 3
 c:
   ret i32 5
-; CHECK-LABEL: @test1(
-; CHECK: %cond = icmp eq i32 %i, 24
-; CHECK: %. = select i1 %cond, i32 5, i32 0
-; CHECK: ret i32 %.
 }
 
 
 define i32 @test2(i32 %x) nounwind {
+; CHECK-LABEL: @test2(
+; CHECK-NEXT:  a:
+; CHECK-NEXT:    ret i32 0
+;
   %i = shl i32 %x, 1
   switch i32 %i, label %a [
-    i32 21, label %b
-    i32 23, label %c
+  i32 21, label %b
+  i32 23, label %c
   ]
 
 a:
@@ -33,6 +41,37 @@ b:
   ret i32 3
 c:
   ret i32 5
-; CHECK-LABEL: @test2(
-; CHECK: ret i32 0
 }
+
+; We're sign extending an 8-bit value.
+; The switch condition must be in the range [-128, 127], so any cases outside of that range must be dead.
+
+define i1 @repeated_signbits(i8 %condition) {
+; CHECK-LABEL: @repeated_signbits(
+; CHECK:         switch i32
+; CHECK-DAG:     i32 -128, label %a
+; CHECK-DAG:     i32 -1, label %a
+; CHECK-DAG:     i32  0, label %a
+; CHECK-DAG:     i32  127, label %a
+; CHECK-NEXT:    ]
+;
+entry:
+  %sext = sext i8 %condition to i32
+  switch i32 %sext, label %default [
+  i32 -2147483648, label %a
+  i32 -129, label %a
+  i32 -128, label %a
+  i32 -1, label %a
+  i32  0, label %a
+  i32  127, label %a
+  i32  128, label %a
+  i32  2147483647, label %a
+  ]
+
+a:
+  ret i1 1
+
+default:
+  ret i1 0
+}
+