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Diffstat (limited to 'test/src/ptxed-tick.ptt')
-rw-r--r-- | test/src/ptxed-tick.ptt | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/test/src/ptxed-tick.ptt b/test/src/ptxed-tick.ptt new file mode 100644 index 0000000000000..ccfff1a70198d --- /dev/null +++ b/test/src/ptxed-tick.ptt @@ -0,0 +1,98 @@ +; Copyright (c) 2017-2019, Intel Corporation +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; +; * Redistributions of source code must retain the above copyright notice, +; this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright notice, +; this list of conditions and the following disclaimer in the documentation +; and/or other materials provided with the distribution. +; * Neither the name of Intel Corporation nor the names of its contributors +; may be used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. + +; Test tick events +; +; opt:ptdump --nom-freq 4 --time --time-delta +; opt:ptxed --nom-freq 4 --event:tick --event:time +; + +org 0x100000 +bits 64 + +; @pt p0: psb() +; @pt p1: fup(3: %l0) +; @pt p2: mode.exec(64bit) +; @pt p3: tsc(0xa000) +; @pt p4: cbr(0x2) +; @pt p5: psbend() + +l0: mov rax, 0x0 +l1: jmp l3 +l2: add rax, 0x1 +l3: cmp rax, 0x1 +; @pt p6: cyc(0x4) +; @pt p7: tnt(t.n) +l4: jle l2 + +; @pt p8: cyc(0x12) +; @pt p9: tip(1: %l8) +; @pt p10: cyc(0x8) +; @pt p11: tnt(t) +l5: call rax +l6: nop + +; @pt p12: cyc(0x6) +; @pt p13: fup(1: %l7) +; @pt p14: tip.pgd(0: %l7) +l7: hlt + +l8: ret + + +; @pt .exp(ptdump) +;%0p0 psb +;%0p1 fup 3: %?l0 +;%0p2 mode.exec cs.l +;%0p3 tsc a000 tsc +a000 +;%0p4 cbr 2 +;%0p5 psbend +;%0p6 cyc 4 tsc +8 +;%0p7 tnt.8 !. +;%0p8 cyc 12 tsc +24 +;%0p9 tip 1: %?l8.2 +;%0p10 cyc 8 tsc +10 +;%0p11 tnt.8 ! +;%0p12 cyc 6 tsc +c +;%0p13 fup 1: %?l7.2 +;%0p14 tip.pgd 0: %?l7.0 + + +; @pt .exp(ptxed) +;%0l0 # mov rax, 0x0 +;%0l1 # jmp l3 +;%0l3 # cmp rax, 0x1 +;%0l4 # jle l2 +;[000000000000a008 tick] +;%0l2 # add rax, 0x1 +;%0l3 # cmp rax, 0x1 +;%0l4 # jle l2 +;%0l5 # call rax +;[000000000000a02c tick] +;%0l8 # ret +;[000000000000a03c tick] +;%0l6 # nop +;[000000000000a048 disabled] |