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Diffstat (limited to 'test/src/tsc-tma-mtc-tsc.ptt')
-rw-r--r-- | test/src/tsc-tma-mtc-tsc.ptt | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/test/src/tsc-tma-mtc-tsc.ptt b/test/src/tsc-tma-mtc-tsc.ptt new file mode 100644 index 0000000000000..e1e1721a9f4be --- /dev/null +++ b/test/src/tsc-tma-mtc-tsc.ptt @@ -0,0 +1,54 @@ +; Copyright (c) 2014-2019, Intel Corporation +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions are met: +; +; * Redistributions of source code must retain the above copyright notice, +; this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright notice, +; this list of conditions and the following disclaimer in the documentation +; and/or other materials provided with the distribution. +; * Neither the name of Intel Corporation nor the names of its contributors +; may be used to endorse or promote products derived from this software +; without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS +; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN +; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) +; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE +; POSSIBILITY OF SUCH DAMAGE. + +; Test MTC-based TSC estimation. +; +; Variant: time correction on TSC +; +; opt:ptdump --time --time-delta --no-tcal +; opt:ptdump --mtc-freq 4 --cpuid-0x15.eax 2 --cpuid-0x15.ebx 1 + +org 0x100000 +bits 64 + +; @pt p1: psb() +; @pt p2: psbend() + +; @pt p3: tsc(0xa0000) +; @pt p4: tma(0xf012, 0x6) +; @pt p5: mtc(0x2) +; @pt p6: mtc(0x3) +; @pt p7: tsc(0xa0008) + + +; @pt .exp(ptdump) +;%0p1 psb +;%0p2 psbend +;%0p3 tsc a0000 tsc +a0000 +;%0p4 tma f012, 6 tsc +0 +;%0p5 mtc 2 tsc +1 +;%0p6 mtc 3 tsc +8 +;%0p7 tsc a0008 tsc -1 |