summaryrefslogtreecommitdiff
path: root/test/src/tsx-no_spurious_commit.ptt
diff options
context:
space:
mode:
Diffstat (limited to 'test/src/tsx-no_spurious_commit.ptt')
-rw-r--r--test/src/tsx-no_spurious_commit.ptt71
1 files changed, 71 insertions, 0 deletions
diff --git a/test/src/tsx-no_spurious_commit.ptt b/test/src/tsx-no_spurious_commit.ptt
new file mode 100644
index 0000000000000..7a00c55498d54
--- /dev/null
+++ b/test/src/tsx-no_spurious_commit.ptt
@@ -0,0 +1,71 @@
+; Copyright (c) 2014-2019, Intel Corporation
+;
+; Redistribution and use in source and binary forms, with or without
+; modification, are permitted provided that the following conditions are met:
+;
+; * Redistributions of source code must retain the above copyright notice,
+; this list of conditions and the following disclaimer.
+; * Redistributions in binary form must reproduce the above copyright notice,
+; this list of conditions and the following disclaimer in the documentation
+; and/or other materials provided with the distribution.
+; * Neither the name of Intel Corporation nor the names of its contributors
+; may be used to endorse or promote products derived from this software
+; without specific prior written permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+; ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+; POSSIBILITY OF SUCH DAMAGE.
+
+; Test that TSX status updates in adjacent PSB+ do not cause spurious
+; commit indications.
+;
+
+org 0x100000
+bits 64
+
+; @pt p1: psb()
+; @pt p2: fup(3: %l1)
+; @pt p3: mode.exec(64bit)
+; @pt p4: mode.tsx(commit)
+; @pt p5: psbend()
+l1: nop
+
+; @pt p6: psb()
+; @pt p7: fup(3: %l2)
+; @pt p8: mode.exec(64bit)
+; @pt p9: mode.tsx(commit)
+; @pt p10: psbend()
+l2: nop
+
+; @pt p11: fup(1: %l3)
+; @pt p12: tip.pgd(0: %l4)
+l3: nop
+l4: hlt
+
+; @pt .exp(ptxed)
+;%0l1 # nop
+;%0l2 # nop
+;[disabled]
+
+
+; @pt .exp(ptdump)
+;%0p1 psb
+;%0p2 fup 3: %0l1
+;%0p3 mode.exec cs.l
+;%0p4 mode.tsx
+;%0p5 psbend
+;%0p6 psb
+;%0p7 fup 3: %0l2
+;%0p8 mode.exec cs.l
+;%0p9 mode.tsx
+;%0p10 psbend
+;%0p11 fup 1: %?l3.2
+;%0p12 tip.pgd 0: %?l4.0