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* - Support for uncore counting events: one fixed PMC with the uncoreFabien Thomas2010-04-021-7/+174
| | | | | | | | | | | | | | | domain clock, 8 programmable PMC. - Westmere based CPU (Xeon 5600, Corei7 980X) support. - New man pages with events list for core and uncore. - Updated Corei7 events with Intel 253669-033US December 2009 doc. There is some removed events in the documentation, they have been kept in the code but documented in the man page as obsolete. - Offcore response events can be setup with rsp token. Sponsored by: NETASQ Notes: svn path=/head/; revision=206089
* Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor.George V. Neville-Neil2010-03-031-2/+65
| | | | | | | | | | | Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month Notes: svn path=/head/; revision=204635
* Bug fix: add a missing initializer.Joseph Koshy2010-01-121-0/+1
| | | | | | | | Submitted by: Luca Pizzamiglio <luca.pizzamiglio at gmail dot com> PR: i386/142742 Notes: svn path=/head/; revision=202157
* Intel XScale hwpmc(4) support.Rui Paulo2009-12-231-0/+45
| | | | | | | | | | | | | | This brings hwpmc(4) support for 2nd and 3rd generation XScale cores. Right now it's enabled by default to make sure we test this a bit. When the time comes it can be disabled by default. Tested on Gateworks boards. A man page is coming. Obtained from: //depot/user/rpaulo/xscalepmc/... Notes: svn path=/head/; revision=200928
* Not all Intel Core (TM) CPUs implement PMC_CLASS_IAF fixed-functionJoseph Koshy2009-10-241-12/+47
| | | | | | | | | | counters. For such CPUs, use an alternate mapping of convenience names to events supported by PMC_CLASS_IAP programmable counters. Testing and review by: fabient Notes: svn path=/head/; revision=198433
* Fix parsing of Core2 event qualifiers.Joseph Koshy2009-06-091-7/+7
| | | | | | | Submitted by: Nikola K <laladelausanne at gmail dot com> Notes: svn path=/head/; revision=193809
* - Add support for nehalem/corei7 cpus. This supports all of the coreJeff Roberson2009-01-271-1/+23
| | | | | | | | | | | counters defined in the reference manual. It does not support the 'uncore' events. Reviewed by: jkoshy Sponsored by: Nokia Notes: svn path=/head/; revision=187761
* Fixes for Core2 Extreme support.Joseph Koshy2008-12-031-1/+5
| | | | | | | Submitted by: "Artem Belevich" <artemb at gmail dot com> Notes: svn path=/head/; revision=185585
* - Add support for PMCs in Intel CPUs of Family 6, model 0xE (Core SoloJoseph Koshy2008-11-271-36/+406
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and Core Duo), models 0xF (Core2), model 0x17 (Core2Extreme) and model 0x1C (Atom). In these CPUs, the actual numbers, kinds and widths of PMCs present need to queried at run time. Support for specific "architectural" events also needs to be queried at run time. Model 0xE CPUs support programmable PMCs, subsequent CPUs additionally support "fixed-function" counters. - Use event names that are close to vendor documentation, taking in account that: - events with identical semantics on two or more CPUs in this family can have differing names in vendor documentation, - identical vendor event names may map to differing events across CPUs, - each type of CPU supports a different subset of measurable events. Fixed-function and programmable counters both use the same vendor names for events. The use of a class name prefix ("iaf-" or "iap-" respectively) permits these to be distinguished. - In libpmc, refactor pmc_name_of_event() into a public interface and an internal helper function, for use by log handling code. - Minor code tweaks: staticize a global, freshen a few comments. Tested by: gnn Notes: svn path=/head/; revision=185363
* - Sparsely number enumerations 'pmc_cputype' and 'pmc_event' in order toJoseph Koshy2008-10-091-101/+287
| | | | | | | | | | | | | | reduce ABI disruptions when new cpu types and new PMC events are added in the future. - Support alternate spellings for PMC events. Derive the canonical spelling of an event name from its enumeration name in 'enum pmc_event'. - Provide a way for users to disambiguate between identically named events supported by multiple classes of PMCs in a CPU. - Change libpmc's machine-dependent event specifier parsing code to better support CPUs containing two or more classes of PMC resources. Notes: svn path=/head/; revision=183725
* Whitespace fixes.Joseph Koshy2008-09-171-10/+10
| | | | Notes: svn path=/head/; revision=183107
* Add event name aliases for Pentium PMCs.Joseph Koshy2008-09-171-1/+8
| | | | Notes: svn path=/head/; revision=183105
* Correct an event name alias: event "k7-dc-misses" does not supportJoseph Koshy2008-09-161-1/+1
| | | | | | | a unitmask. Notes: svn path=/head/; revision=183075
* Bring the behaviour of pmc_capabilities() and pmc_width() in line withJoseph Koshy2008-03-121-3/+5
| | | | | | | | | documentation: set 'errno' and return -1 in case of an error. Update (c) years. Notes: svn path=/head/; revision=177107
* Improve style(9) compliance and trim a long text line.Joseph Koshy2007-12-071-128/+109
| | | | Notes: svn path=/head/; revision=174406
* Correct a typo in an event name alias.Joseph Koshy2007-04-111-1/+1
| | | | | | | Reported by: Harald Servat <redcrash at gmail dot com> Notes: svn path=/head/; revision=168612
* Update the pmc(3) manual page's date string and freshen the year in the (c) ↵Joseph Koshy2006-03-201-1/+1
| | | | | | | | | line for pmc.3 and libpmc.c. Notes: svn path=/head/; revision=156907
* Add an alias 'unhalted-cycles' denoting cycles where the CPU isJoseph Koshy2006-02-251-0/+3
| | | | | | | not in a halt or sleep state. Notes: svn path=/head/; revision=155998
* - Update the CPU version check to recognize P4/EMT64 CPUs. [1]Joseph Koshy2005-07-031-7/+12
| | | | | | | | | | | | - Allow libpmc(3) to support P4/EMT64 PMCs on the amd64 architecture and AMD K8 PMCs on the i386. [2] Submitted by: ps [1] Pointy hat: myself [2] Approved by: re (scottl) Notes: svn path=/head/; revision=147759
* Fix tinderbox breakage.Joseph Koshy2005-06-101-4/+13
| | | | Notes: svn path=/head/; revision=147219
* MFP4:Joseph Koshy2005-06-091-711/+753
| | | | | | | | | | | | | | | | | | | - Implement sampling modes and logging support in hwpmc(4). - Separate MI and MD parts of hwpmc(4) and allow sharing of PMC implementations across different architectures. Add support for P4 (EMT64) style PMCs to the amd64 code. - New pmcstat(8) options: -E (exit time counts) -W (counts every context switch), -R (print log file). - pmc(3) API changes, improve our ability to keep ABI compatibility in the future. Add more 'alias' names for commonly used events. - bug fixes & documentation. Notes: svn path=/head/; revision=147191
* Add convenience APIs pmc_width() and pmc_capabilities() to -lpmc.Joseph Koshy2005-05-011-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Have pmcstat(8) and pmccontrol(8) use these APIs. Return PMC class-related constants (PMC widths and capabilities) with the OP GETCPUINFO call leaving OP PMCINFO to return only the dynamic information associated with a PMC (i.e., whether enabled, owner pid, reload count etc.). Allow pmc_read() (i.e., OPS PMCRW) on active self-attached PMCs to get upto-date values from hardware since we can guarantee that the hardware is running the correct PMC at the time of the call. Bug fixes: - (x86 class processors) Fix a bug that prevented an RDPMC instruction from being recognized as permitted till after the attached process had context switched out and back in again after a pmc_start() call. Tighten the rules for using RDPMC class instructions: a GETMSR OP is now allowed only after an OP ATTACH has been done by the PMC's owner to itself. OP GETMSR is not allowed for PMCs that track descendants, for PMCs attached to processes other than their owner processes. - (P4/HTT processors only) Fix a bug that caused the MI and MD layers to get out of sync. Add a new MD operation 'get_config()' as part of this fix. - Allow multiple system-mode PMCs at the same row-index but on different CPUs to be allocated. - Reject allocation of an administratively disabled PMC. Misc. code cleanups and refactoring. Improve a few comments. Notes: svn path=/head/; revision=145774
* Add event aliases for P6 and K8 PMCs.Joseph Koshy2005-04-211-17/+31
| | | | Notes: svn path=/head/; revision=145351
* o Do not include <machine/pmc_mdep.h>. It's automaticly included forMarcel Moolenaar2005-04-201-9/+9
| | | | | | | | | | | | | | | us when <sys/pmc.h> is included. o Replace "#if __i386__" and "#if __amd64__" with the equivalent of "#ifdef __i386__" and "#ifdef __amd64__" (resp.) These tokens are not defined on all platforms. o Conditionally compile pmc_parse_mask() on i386 and amd64 only. It's only referenced there. This will change when support for other platforms is added, of course. Ok'd by: jkoshy@ Notes: svn path=/head/; revision=145340
* Remove extra Id keyword.Joseph Koshy2005-04-201-2/+0
| | | | Notes: svn path=/head/; revision=145315
* Bring a working snapshot of hwpmc(4), its associated libraries, userland ↵Joseph Koshy2005-04-191-0/+2136
utilities and documentation into -CURRENT. Bump FreeBSD_version. Reviewed by: alc, jhb (kernel changes) Notes: svn path=/head/; revision=145256
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