summaryrefslogtreecommitdiff
path: root/sys/dev/ath/if_ath.c
Commit message (Collapse)AuthorAgeFilesLines
...
* Break out the node cleanup and node free path, in preparation forAdrian Chadd2011-11-081-2/+15
| | | | | | | | | | | | doing software TX queue management. The software queued TX frames will be freed by the new cleanup function. Sponsored by: Hobnob, Inc. Notes: svn path=/head/; revision=227352
* Preparation for correct 802.11n tx/rx handling.Adrian Chadd2011-11-081-17/+32
| | | | | | | | | | | | | | | | * Change ath_rx_proc() to ath_rx_tasklet(); make that the taskqueue function. This way (eventually) ath_rx_proc() can be called from elsewhere in the packet reset/processing queue so frames aren't just "flushed" during interface resets/reconfigure. This breaks 802.11n RX aggregation tracking. * Extend ath_tx_proc() to take a 'resched' flag, which marks whether to reschedule further RX PCU reads or not. * Change ath_tx_processq() to take a "dosched" flag, which will eventually be used to indicate whether to reschedule the software TX scheduler. Sponsored by: Hobnob, Inc. Notes: svn path=/head/; revision=227351
* Merge in some fixes from the if_ath_tx branch.Adrian Chadd2011-11-081-31/+95
| | | | | | | | | | | | | | | | | | | | | | * Close down some of the kickpcu races, where the interrupt handler can and will run concurrently with the taskqueue. * Close down the TXQ active/completed race between the interrupt handler and the concurrently running tx completion taskqueue function. * Add some tx and rx interrupt count tracking, for debugging. * Fix the kickpcu logic in ath_rx_proc() to not simply drain and restart the TX queue - instead, assume the hardware isn't (too) confused and just restart RX DMA. This may break on previous chipsets, so if it does I'll add a HAL flag and conditionally handle this (ie, for broken chipsets, I'll just restore the "stop PCU / flush things / restart PCU" logic.) * Misc stuff Sponsored by: Hobnob, Inc. Notes: svn path=/head/; revision=227346
* Migrate the STAILQ lists to TAILQs.Adrian Chadd2011-11-081-38/+41
| | | | | | | | | | | | | | | A bunch of the 11n TX aggregation logic wants to traverse lists of buffers in various ways. In order to provide O(1) behaviour in this instance, use TAILQs. This does blow out the memory footprint and CPU cycles slightly for some of these operations. I may convert some of these back to STAILQs once the rest of the software transmit queue handling has been stabilised. Sponsored by: Hobnob, Inc. Notes: svn path=/head/; revision=227344
* Begin merging in some of my 802.11n TX aggregation driver changes.Adrian Chadd2011-11-081-1/+6
| | | | | | | | | | | | | | | | | | | | | * Add a PCU lock, which isn't currently used but will eventually be used to serialise some of the driver access. * Add in all the software TX aggregation state, that's kept per-node and per-TID. * Add in the software and aggregation state to ath_buf. * Add in hooks to ath_softc for aggregation state and the (upcoming) aggregation TX state calls. * Add / fix the HAL access macros. Obtained from: Linux, ath9k Sponsored by: Hobnob, Inc. Notes: svn path=/head/; revision=227328
* Mark MALLOC_DEFINEs static that have no corresponding MALLOC_DECLAREs.Ed Schouten2011-11-071-1/+1
| | | | | | | This means that their use is restricted to a single C file. Notes: svn path=/head/; revision=227293
* When punting frames to the RX tap, free the mbufs since we've tampered withAdrian Chadd2011-10-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | their length. Without this, an error frame mbuf would: * have its size adjusted; * thrown at the radiotap code; * then since it's never consumed, the rxbuf/mbuf is then re-added to the RX descriptor list with the small size; * .. and the hardware ends up (sometimes) only DMA'ing part of a frame into the small buffer, chaining RX frames together (setting the more flag). I discovered this particular issue when doing some promiscuous radiotap testing; I found that I'd occasionally get rs_more set in RX descriptors w/ the first frame length being very small (sub-100 bytes.) The driver handles 2-descriptor RX frames (but not more), so this still worked; it was just odd. This is suboptimal and may benefit from being replaced with caching the m_pkthdr_len and m_len fields, then restoring them after completion. Notes: svn path=/head/; revision=226884
* Include opt_ah.h when compiling the driver.Adrian Chadd2011-10-181-0/+5
| | | | | | | | | | | | | | There are HAL methods which are actually direct register access, rather than simply HAL calls. Because of this, these register accesses would use the non-debug path in ah_osdep.h as opt_ah.h isn't included. With this, the correct register access methods are used, so debugging traces show things such as TXDP checking and TSF32 access. Notes: svn path=/head/; revision=226486
* Don't enable the PHY radar errors in calcrxfilter.Adrian Chadd2011-10-171-4/+0
| | | | | | | | | | That way the radar errors aren't enabled prematurely. A DFS tester has reported that radar events are reported during channel scanning, before DFS is actually enabled. Notes: svn path=/head/; revision=226469
* Don't bother triggering the cabq queue if it's empty.Adrian Chadd2011-09-281-1/+2
| | | | | | | Obtained from: Atheros Notes: svn path=/head/; revision=225822
* Fix lock order to be correcter.Adrian Chadd2011-09-281-1/+1
| | | | | | | | Nothing else locks these two queues (cabq, avp mcastq), but it should be consistent and correct. Notes: svn path=/head/; revision=225821
* Update the TSF and next-TBTT methods to work for the AR5416 and later NICs.Adrian Chadd2011-09-081-46/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is another commit in a series of TDMA support fixes for the 11n NICs. * Move ath_hal_getnexttbtt() into the HAL; write methods for it. This returns a timer value in TSF, rather than TU. * Move ath_hal_getcca() and ath_hal_setcca() into the HAL too, where they likely now belong. * Create a new HAL capability: HAL_CAP_LONG_RXDESC_TSF. The pre-11n NICs write 15 bit TSF snapshots into the RX descriptor; the AR5416 and later write 32 bit TSF snapshots into the RX descriptor. * Use the new capability to choose between 15 and 31 bit TSF adjustment functions in ath_extend_tsf(). * Write ar5416GetTsf64() and ar5416SetTsf64() methods. ar5416GetTsf64() tries to compensate for TSF changes at the 32 bit boundary. According to yin, this fixes the TDMA beaconing on 11n chipsets and TDMA stations can now associate/talk, but there are still issues with traffic stability which need to be investigated. The ath_hal_extendtsf() function is also used in RX packet timestamping; this may improve adhoc mode on the 11n chipsets. It also will affect the timestamps seen in radiotap frames. Submitted by: Kang Yin Su <cantona@cantona.net> Approved by: re (kib) Notes: svn path=/head/; revision=225444
* Fix a missing initialisation of bt_flags when setting up the TDMA beacon.Adrian Chadd2011-08-241-0/+2
| | | | | | | | | | | | | | | | | The AR5212 HAL didn't check this field; timers are enabled a different way. The AR5416 HAL however did, and since this field was uninitialised, it had whatever was on the stack at the time. This lead to "unpredictable" behaviour. This allows TDMA to work on the AR5416 and later chipsets. Thanks to: paradyse@gmail.com Approved by: re (kib, blanket) Notes: svn path=/head/; revision=225145
* Remove this call, now that I've solved the radar module problem withoutAdrian Chadd2011-08-091-6/+0
| | | | | | | | | | | | needing this particular modification. It can be called during ath_dfs_radar_enable() and still achieve the same functionality, so I am. Approved by: re (kib, blanket) Notes: svn path=/head/; revision=224724
* Introduce some more DFS related hooks, inspired both by local workAdrian Chadd2011-08-081-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | and the Atheros reference code. The radar detection code needs to know what the current DFS domain is. Since net80211 doesn't currently know this information, it's extracted from the HAL regulatory domain information. The specifics: * add a new ath_dfs API hook, ath_dfs_init_radar_filters(), which updates the radar filters whenever the regulatory domain changes. * add HAL_DFS_DOMAIN which describes the currently configured DFS domain . * add a new HAL internal variable which tracks the currently configured HAL DFS domain. * add a new HAL capability, HAL_CAP_DFS_DMN, which returns the currently configured HAL DFS domain setting. * update the HAL DFS domain setting whenever the channel setting is updated. Since this isn't currently used by any radar code, these should all be no-ops for existing users. Obtained from: Atheros Submitted by: KBC Networks, sibridge Approved by: re (kib, blanket) Notes: svn path=/head/; revision=224716
* Fix a corner case in RXEOL handling which was likely introduced by yoursAdrian Chadd2011-08-021-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | truly. Before 802.11n, the RX descriptor list would employ the "self-linked tail descriptor" trick which linked the last descriptor back to itself. This way, the RX engine would never hit the "end" of the list and stop processing RX (and assert RXEOL) as it never hit a descriptor whose next pointer was 0. It would just keep overwriting the last descriptor until the software freed up some more RX descriptors and chained them onto the end. For 802.11n, this needs to stop as a self-linked RX descriptor tickles the block-ack logic into ACK'ing whatever frames are received into that self-linked descriptor - so in very busy periods, you could end up with A-MPDU traffic that is ACKed but never received by the 802.11 stack. This would cause some confusion as the ADDBA windows would suddenly be out of sync. So when that occured here, the last descriptor would be hit and the PCU logic would stop. It would only start again when the RX descriptor list was updated and the PCU RX engine was re-tickled. That wasn't being done, so RXEOL would be continuously asserted and no RX would continue. This patch introduces a new flag - sc->sc_kickpcu - which when set, signals the RX task to kick the PCU after its processed whatever packets it can. This way completed packets aren't discarded. In case some other task gets called which resets the hardware, don't update sc->sc_imask - instead, just update the hardware interrupt mask directly and let either ath_rx_proc() or ath_reset() restore the imask to its former setting. Note: this bug was only triggered when doing a whole lot of frame snooping with serial console IO in the RX task. This would defer interrupt processing enough to cause an RX descriptor overflow. It doesn't happen in normal conditions. Approved by: re (kib, blanket) Notes: svn path=/head/; revision=224588
* Disable the RXORN/RXEOL interrupts if RXEOL occurs, preventing anAdrian Chadd2011-07-311-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | interrupt storm. This is easily triggered by flipping on and off tcpdump -y IEEE802_11_RADIO w/ witness enabled. This causes a whole lot of console IO and when you're attached to a serial console (eg on my AR7161 embedded board), the RX interrupt doesn't get called quickly enough and the RX queue fills up. This wasn't a problem in the past because of the self-linked RX descriptor trick - the RX would never hit the "end" of the RX descriptor list. However this isn't possible for 802.11n (see previous commit history for why.) Both Linux ath9k and the Atheros reference driver code do this; I'm just looking now for where they then restart the PCU receive. Right now the RX will just stop until the interface is reset. Obtained from: Linux, Atheros Approved by: re (kib) Notes: svn path=/head/; revision=224550
* Remove two debugging printf()s which snuck in during the testing of theAdrian Chadd2011-07-311-5/+0
| | | | | | | | | | last commit. Approved by: re (kib) Pointy-hat-to: adrian@ Notes: svn path=/head/; revision=224542
* Implement the 4KB split transaction workaround for Merlin (AR9280).Adrian Chadd2011-07-311-5/+40
| | | | | | | | | | | | | | | | | | | | The AR9280 apparently has an issue with descriptors which straddle a page boundary (4k). I'm not yet sure whether I should use PAGE_SIZE in the calculations or whether I should use 4096; the reference code uses 4096. This patch fiddles with descriptor allocation so a descriptor entry doesn't straddle a 4kb address boundary. The descriptor memory allocation is made larger to contain extra descriptors and then the descriptor address is advanced to the next 4kb boundary where needed. I've tested this both on Merlin (AR9280) and non-Merlin (in this case, AR9160.) Obtained from: Linux, Atheros Approved by: re (kib) Notes: svn path=/head/; revision=224541
* This links in the ath dfs ioctl into the driver and defines theAdrian Chadd2011-07-211-0/+3
| | | | | | | | | | | | ioctl interface for DFS modules to use. Since there's no open source dfs code yet, this doesn't introduce any operational changes. Approved by: re (kib) Notes: svn path=/head/; revision=224245
* Fix a corner case in STA beacon processing when a CSA is received butAdrian Chadd2011-06-291-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the AP doesn't transmit beacons. If the AP requests a CSA (ie, a channel switch) and then enters CAC (channel availability check) for 60 seconds, it doesn't send beacons and it just listens for radar events (and other things which we don't do yet.) Now, ath_newstate() was not resetting the beacon timer config on a transition to the RUN state when in STA mode - it was setting sc_syncbeacon, which simply updates the beacon config from the contents of the next received beacon. This means the STA never generates beacon miss events. If the AP goes into CAC for 60 seconds and recovers, the STA will happily receive the first beacon and reconfigure timers. But if it gets a radar event after that, it'll change channel again, not notify the station that it's changed channel.. and since the station is happily waiting for the first beacon to configure the beacon timer details from, it won't ever generate a beacon miss interrupt and it'll sit there forever (or until the AP appears on that channel once again.) This change forces the last known beacon timer config to be written to hardware on a transition from CSA->RUN in STA mode. This forces bmiss events to occur and the STA will eventually (after a handful of beacon miss events) begin scanning for another access point. Notes: svn path=/head/; revision=223671
* Fix beacon transmission after a channel set.Adrian Chadd2011-06-261-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | The DFS code was tickling the channel set directly whilst going through the state RUN -> CSA -> RUN. This only changed the channel; it didn't go via ath_reset(). However in this driver, a channel change always causes a chip reset, which resets the beacon timer configuration and interrupt setup. This meant that data would go out but as the beacon timers never fired, beacons would never be queued. The confusing part is that sometimes the state transition was RUN -> SCAN -> CAC -> RUN (with CSA being in there sometimes); going via SCAN would clear sc_beacons and thus the transition to RUN would reprogram beacon transmission. In case someone tries debugging why suspending a device currently beaconing (versus just RX'ing beacons which is what occurs in STA mode), add a silly comment which should hopefully land them at this commit message. The call to ath_hal_reset() will be clearing the beacon config and it may not be always reset. Notes: svn path=/head/; revision=223568
* Add ATH_ENABLE_DFS which enables the DFS flag so the DFS codeAdrian Chadd2011-06-261-0/+3
| | | | | | | | | | | | can be tested. This doesn't at all actually do radar detection! It's just so developers who wish to test the net80211 DFS code can easily do so. Without this flag, the DFS channels are never marked DFS and thus the DFS stuff doesn't run. Notes: svn path=/head/; revision=223567
* Break out most of the HAL related tweaks into a per-HAL instance,Adrian Chadd2011-06-231-0/+1
| | | | | | | | | | | | | | | | | | | | rather than global variables. This specifically allows for debugging to be enabled per-NIC, rather than globally. Since the ath driver doesn't know about AH_DEBUG, and to keep the ABI consistent regardless of whether AH_DEBUG is enabled or not, enable the debug parameter always but only conditionally compile in the debug methods if needed. The ALQ support is currently still global pending some brainstorming. Submitted by: ssgriffonuser@gmail.com Reviewed by: adrian, bschmidt Notes: svn path=/head/; revision=223459
* Add a missing call to sync the DMAed buffer before the radar event data is ↵Adrian Chadd2011-06-051-1/+9
| | | | | | | extracted. Notes: svn path=/head/; revision=222707
* A few changes to make radar detection implementable in a hal_dfs/Adrian Chadd2011-06-041-1/+9
| | | | | | | | | | | | | | | | | | module. * If sc->sc_dodfs is set to 1 by the ath_dfs_radar_enable(), set the relevant rx filter bit to begin receiving radar PHY errors. The HAL code already knows how to set the relevant error mask register to enable radar events. * Add a missing call to ath_dfs_radar_enable() after ath_hal_reset() * change ath_dfs_process_phyerr() to take a const char *buf for now, rather than a descriptor. This way it can get access to the packet buffer contents. Notes: svn path=/head/; revision=222668
* Flesh out the radar detection related operations for the ath driver.Adrian Chadd2011-06-011-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is in no way a complete DFS/radar detection implementation! It merely creates an abstracted interface which allows for future development of the DFS radar detection code. Note: Net80211 already handles the bulk of the DFS machinery, all we need to do here is figure out that a radar event has occured and inform it as such. It then drives the DFS state engine for us. The "null" DFS radar detection module is included by default; it doesn't require a device line. This commit: * Adds a simple abstracted layer for radar detection state - sys/dev/ath/ath_dfs/; * Implements a null DFS module which doesn't do anything; (ie, implements the exact behaviour at the moment); * Adds hooks to the ath driver to process received radar events and gives the DFS module a chance to determine whether a radar has been detected. Obtained from: Atheros Notes: svn path=/head/; revision=222585
* Set default A-MPDU density/size.Adrian Chadd2011-05-301-0/+15
| | | | Notes: svn path=/head/; revision=222497
* Teach if_ath about devices which have short-GI in 20MHz channel modes.Adrian Chadd2011-05-291-4/+13
| | | | | | | | | | This has been disabled until now because there hasn't been any supported device which has this feature. Since the AR9287 is the first device to support it, and since now the HAL has functional AR9287+11n support, flip this on. Notes: svn path=/head/; revision=222432
* * Add some more TX descriptor error counters; this'll be helpful whenAdrian Chadd2011-05-151-0/+12
| | | | | | | | implementing TX aggregation * Whilst I'm there, comment some RX error counters Notes: svn path=/head/; revision=221965
* Now that the devices with functioning ps-poll hardware support haveAdrian Chadd2011-05-121-3/+1
| | | | | | | been enumerated (merlin and later), flick this on. Notes: svn path=/head/; revision=221811
* Cosmetic changes to fit 80 character screen width.Adrian Chadd2011-04-291-3/+3
| | | | Notes: svn path=/head/; revision=221210
* Fix a corner-case of interrupt handling which resulted in potentiallyAdrian Chadd2011-04-231-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spurious (and fatal) interrupt errors. One user reported seeing this: Apr 22 18:04:24 ceres kernel: ar5416GetPendingInterrupts: fatal error, ISR_RAC 0x0 SYNC_CAUSE 0x2000 SYNC_CAUSE of 0x2000 is AR_INTR_SYNC_LOCAL_TIMEOUT which is a bus timeout; this shouldn't cause HAL_INT_FATAL to be set. After checking out ath9k, ath9k_ar9002_hw_get_isr() clears (*masked) before continuing, regardless of whether any bits in the ISR registers are set. So if AR_INTR_SYNC_CAUSE is set to something that isn't treated as fatal, and AR_ISR isn't read or is read and is 0, then (*masked) wouldn't be cleared. Thus any of the existing bits set that were passed in would be preserved in the output. The caller in if_ath - ath_intr() - wasn't setting the masked value to 0 before calling ath_hal_getisr(), so anything that was present in that uninitialised variable would be preserved in the case above of AR_ISR=0, AR_INTR_SYNC_CAUSE != 0; and if the HAL_INT_FATAL bit was set, a fatal condition would be interpreted and the chip was reset. This patch does the following: * ath_intr() - set masked to 0 before calling ath_hal_getisr(); * ar5416GetPendingInterrupts() - clear (*masked) before processing continues; so if the interrupt source is AR_INTR_SYNC_CAUSE and it isn't fatal, the hardware isn't reset via returning HAL_INT_FATAL. This doesn't fix any underlying errors which trigger AR_INTR_SYNC_LOCAL_TIMEOUT - which is a bus timeout of some sort - so that likely should be further investigated. Notes: svn path=/head/; revision=220966
* For now, only enable GTT. CST is firing very frequently during local tests;Adrian Chadd2011-04-181-1/+1
| | | | | | | | I'll figure out what's going on before re-enabling this as it does add to the interrupt load. Notes: svn path=/head/; revision=220784
* Add TX carrier sense timeout statistics.Adrian Chadd2011-04-181-2/+4
| | | | Notes: svn path=/head/; revision=220782
* Rework the Global TX timeout handling to look more like ath9k.Adrian Chadd2011-04-181-1/+4
| | | | | | | | It correctly now sets the AR_IMR BCNMISC register, along with the GTT register in AR_IMR_S2. Notes: svn path=/head/; revision=220779
* Add global TX timeout handling.Adrian Chadd2011-04-181-0/+6
| | | | | | | | The global TX timeout counter increments whenever a frame is ready to be transmitted and the medium is busy. Notes: svn path=/head/; revision=220772
* Add in the AR9285 (Kite) diversity to if_ath, enabling TX/RX antennaAdrian Chadd2011-04-131-0/+6
| | | | | | | | | | | | diversity. This is bit dirty and likely should be revised at a later date, with an eye to unifying/tidying up the whole diversity setup and allowing developers to do "tricky stuff" as they desire. For now, this works. Notes: svn path=/head/; revision=220601
* Add a HAL capability bit for supporting self-linked RX descriptors and ↵Adrian Chadd2011-04-041-2/+19
| | | | | | | | | | | | | | | | | | | | | | disable it for the 11n chipsets. From the ath9k source: == 11N: we can no longer afford to self link the last descriptor. MAC acknowledges BA status as long as it copies frames to host buffer (or rx fifo). This can incorrectly acknowledge packets to a sender if last desc is self-linked. == Since this is useful for pre-AR5416 chips that communicate PHY errors via error frames rather than by on-chip counters, leave the support in there, but disable it for AR5416 and later. Notes: svn path=/head/; revision=220324
* Break out the ath PCI logic into a separate device/module.Adrian Chadd2011-03-311-0/+3
| | | | | | | | | | | | Introduce the AHB glue for Atheros embedded systems. Right now it's hard-coded for the AR9130 chip whose support isn't yet in this HAL; it'll be added in a subsequent commit. Kernel configuration files now need both 'ath' and 'ath_pci' devices; both modules need to be loaded for the ath device to work. Notes: svn path=/head/; revision=220185
* According to ath9k recv.c, one shouldn't be doing self-linked descriptorsAdrian Chadd2011-03-291-0/+1
| | | | | | | | | | | | | | in the RX path when doing 11n and block-ack'ed frames. Apparently, the MAC will loop over that self-linked descriptor and treat it as "good enough" for (incorrectly!) ACKing the frames in the block-ack. Until I figure out how to work around this issue in the future, this counter will tell me if packet RX processing ever gets to the point where it's touching the self-linked descriptor. If there's ever enough packets to get to that point, BA's will be invalid and likely very unhappy. Notes: svn path=/head/; revision=220132
* Fix typo.Adrian Chadd2011-03-271-2/+2
| | | | Notes: svn path=/head/; revision=220054
* Rename AH_ENABLE_11N to ATH_ENABLE_11 - the HAL supports 11n byAdrian Chadd2011-03-271-1/+1
| | | | | | | | default but the ath driver doesn't. This is a much more consistent name. Notes: svn path=/head/; revision=220053
* Add in the hardware PS-POLL frame reception setting, but leave it disabledAdrian Chadd2011-03-261-0/+19
| | | | | | | | | | | by default. Adventourous souls with an AR9220/AR9280 or later and who have a device that sends PS-POLL frames may wish to try tinkering with this option and get back to me. Notes: svn path=/head/; revision=220029
* Enable setting the MCS rate bit for ast_tx_rate.Adrian Chadd2011-03-221-1/+2
| | | | | | | This allows ath_stats to print the MCS rate when TX'ing. Notes: svn path=/head/; revision=219891
* Flip this over to be a configurable option for people who wish to play with it.Adrian Chadd2011-03-221-1/+1
| | | | | | | | | It's still not ready for prime-time - there's some TX niggles with these 11n cards that I'm still trying to wrap my head around, and AMPDU-TX is just not implemented so things will come to a crashing halt if you're not careful. Notes: svn path=/head/; revision=219869
* This isn't actually needed any longer, A-MPDU frames work fine if only ↵Adrian Chadd2011-03-221-9/+0
| | | | | | | tagged for 11n nodes. Notes: svn path=/head/; revision=219868
* Break the keycache management functions out into if_ath_keycache.c .Adrian Chadd2011-03-021-427/+1
| | | | Notes: svn path=/head/; revision=219185
* Migrate the sysctl related routines (statistics, debugging, etc) out ofAdrian Chadd2011-03-021-613/+2
| | | | | | | if_ath.c and into if_ath_sysctl.c . Notes: svn path=/head/; revision=219180
* Fix formatting of new stat sysctls; add descriptionsAdrian Chadd2011-02-211-6/+12
| | | | Notes: svn path=/head/; revision=218925
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-18 07:35:25 +0000