From d0e4e96dc17a6c1c6de3340842c80f0e187ba349 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sat, 26 Feb 2011 22:03:50 +0000 Subject: Vendor import of llvm trunk r126547: http://llvm.org/svn/llvm-project/llvm/trunk@126547 --- CMakeLists.txt | 3 +- Makefile.rules | 2 + cmake/modules/AddLLVM.cmake | 13 +- cmake/modules/CMakeLists.txt | 1 - cmake/modules/HandleLLVMOptions.cmake | 1 + cmake/modules/LLVM.cmake | 6 +- docs/GettingStartedVS.html | 4 +- docs/LangRef.html | 41 +- include/llvm/ADT/APInt.h | 6 + include/llvm/ADT/ArrayRef.h | 5 +- include/llvm/ADT/ImmutableIntervalMap.h | 2 +- include/llvm/ADT/ImmutableMap.h | 2 +- include/llvm/Analysis/DIBuilder.h | 154 +-- include/llvm/CMakeLists.txt | 2 + include/llvm/CodeGen/AsmPrinter.h | 3 +- include/llvm/CodeGen/FunctionLoweringInfo.h | 63 +- include/llvm/CodeGen/MachineConstantPool.h | 3 + include/llvm/CodeGen/MachineFunction.h | 2 +- include/llvm/CodeGen/MachineRegisterInfo.h | 14 +- include/llvm/IntrinsicsXCore.td | 19 + include/llvm/MC/MCAsmInfo.h | 8 + include/llvm/MC/MCParser/MCAsmParserExtension.h | 4 + include/llvm/MC/MCStreamer.h | 37 +- include/llvm/Support/NoFolder.h | 72 +- include/llvm/Support/PathV1.h | 6 +- include/llvm/Target/TargetLowering.h | 96 +- include/llvm/Transforms/Utils/Local.h | 2 +- lib/Analysis/DIBuilder.cpp | 154 +-- lib/Analysis/InstructionSimplify.cpp | 10 + lib/CodeGen/AllocationOrder.h | 2 + lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 10 +- lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 9 +- lib/CodeGen/BranchFolding.cpp | 6 +- lib/CodeGen/InlineSpiller.cpp | 20 +- lib/CodeGen/LowerSubregs.cpp | 10 +- lib/CodeGen/MachineFunction.cpp | 12 +- lib/CodeGen/MachineRegisterInfo.cpp | 9 +- lib/CodeGen/RegAllocBase.h | 15 +- lib/CodeGen/RegAllocBasic.cpp | 60 +- lib/CodeGen/RegAllocGreedy.cpp | 197 ++- lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 133 +- lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp | 118 ++ lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 49 +- lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp | 10 +- lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 19 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 31 +- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 +- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 55 +- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 26 +- lib/CodeGen/SplitKit.cpp | 18 +- lib/CodeGen/SplitKit.h | 7 + lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 30 +- lib/CodeGen/VirtRegRewriter.cpp | 6 +- lib/MC/ELFObjectWriter.cpp | 10 +- lib/MC/MCAsmInfo.cpp | 1 + lib/MC/MCAsmInfoDarwin.cpp | 1 + lib/MC/MCDisassembler/EDOperand.cpp | 20 +- lib/MC/MCDisassembler/EDToken.cpp | 4 + lib/MC/MCObjectStreamer.cpp | 18 +- lib/MC/MCParser/AsmParser.cpp | 2 + lib/MC/MCParser/ELFAsmParser.cpp | 12 +- lib/MC/MCParser/MCAsmParserExtension.cpp | 3 +- lib/MC/MCSectionMachO.cpp | 17 +- lib/MC/MCStreamer.cpp | 4 +- lib/Support/APInt.cpp | 2 +- lib/Target/ARM/ARMBaseInstrInfo.h | 3 +- lib/Target/ARM/ARMFastISel.cpp | 38 +- lib/Target/ARM/ARMFrameLowering.cpp | 16 +- lib/Target/ARM/ARMHazardRecognizer.cpp | 17 +- lib/Target/ARM/ARMISelDAGToDAG.cpp | 15 + lib/Target/ARM/ARMISelLowering.cpp | 102 +- lib/Target/ARM/ARMInstrFormats.td | 7 +- lib/Target/ARM/ARMInstrInfo.td | 4 +- lib/Target/ARM/ARMInstrNEON.td | 31 +- lib/Target/ARM/ARMInstrVFP.td | 162 +-- lib/Target/ARM/ARMSubtarget.cpp | 4 +- lib/Target/ARM/MLxExpansionPass.cpp | 20 +- lib/Target/ARM/NEONMoveFix.cpp | 9 +- lib/Target/ARM/Thumb2InstrInfo.cpp | 6 + lib/Target/Alpha/AlphaISelLowering.cpp | 1 - lib/Target/Alpha/AlphaISelLowering.h | 14 +- lib/Target/Blackfin/BlackfinISelLowering.cpp | 1 - lib/Target/Blackfin/BlackfinISelLowering.h | 1 + lib/Target/CellSPU/SPUISelLowering.cpp | 7 +- lib/Target/CellSPU/SPUISelLowering.h | 6 +- lib/Target/MBlaze/MBlazeISelLowering.cpp | 4 +- lib/Target/MSP430/MSP430ISelLowering.cpp | 6 +- lib/Target/MSP430/MSP430ISelLowering.h | 2 + lib/Target/PowerPC/PPCISelLowering.cpp | 25 +- lib/Target/PowerPC/PPCISelLowering.h | 94 +- lib/Target/README.txt | 24 + lib/Target/Sparc/DelaySlotFiller.cpp | 31 + lib/Target/Sparc/SparcISelLowering.cpp | 43 +- lib/Target/Sparc/SparcISelLowering.h | 2 + lib/Target/Sparc/SparcInstrInfo.td | 18 +- lib/Target/SystemZ/SystemZISelLowering.cpp | 3 - lib/Target/SystemZ/SystemZISelLowering.h | 2 + lib/Target/X86/AsmParser/X86AsmParser.cpp | 13 + lib/Target/X86/Disassembler/X86Disassembler.cpp | 8 +- .../X86/Disassembler/X86DisassemblerDecoder.h | 2 +- lib/Target/X86/README.txt | 82 +- lib/Target/X86/X86FastISel.cpp | 8 +- lib/Target/X86/X86ISelLowering.cpp | 50 +- lib/Target/X86/X86ISelLowering.h | 18 +- lib/Target/X86/X86InstrFormats.td | 2 + lib/Target/X86/X86InstrInfo.cpp | 4 +- lib/Target/X86/X86InstrInfo.h | 4 + lib/Target/X86/X86InstrInfo.td | 3 + lib/Target/X86/X86InstrSystem.td | 5 + lib/Target/X86/X86MCCodeEmitter.cpp | 8 + lib/Target/X86/X86Subtarget.cpp | 7 +- lib/Target/X86/X86Subtarget.h | 2 + lib/Target/XCore/XCoreISelLowering.cpp | 125 +- lib/Target/XCore/XCoreISelLowering.h | 23 +- lib/Target/XCore/XCoreInstrInfo.td | 55 +- lib/Transforms/InstCombine/InstCombineAndOrXor.cpp | 33 + lib/Transforms/InstCombine/InstCombineCalls.cpp | 20 +- lib/Transforms/Scalar/LoopDeletion.cpp | 23 +- lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 18 +- lib/Transforms/Scalar/SimplifyLibCalls.cpp | 1343 ++++++++++---------- lib/Transforms/Utils/Local.cpp | 42 +- lib/Transforms/Utils/PromoteMemoryToRegister.cpp | 13 +- lib/Transforms/Utils/SimplifyCFG.cpp | 5 + test/CMakeLists.txt | 2 + test/CodeGen/ARM/2009-10-16-Scope.ll | 32 + test/CodeGen/ARM/2010-08-04-StackVariable.ll | 124 ++ test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll | 11 +- test/CodeGen/ARM/available_externally.ll | 16 + test/CodeGen/ARM/fcopysign.ll | 17 +- test/CodeGen/ARM/vstlane.ll | 26 + test/CodeGen/SPARC/2011-01-19-DelaySlot.ll | 6 +- test/CodeGen/SPARC/2011-01-22-SRet.ll | 3 +- test/CodeGen/X86/2009-10-16-Scope.ll | 32 + test/CodeGen/X86/2010-06-28-DbgEntryPC.ll | 2 +- test/CodeGen/X86/2010-08-04-StackVariable.ll | 124 ++ .../X86/2011-02-21-VirtRegRewriter-KillSubReg.ll | 50 + test/CodeGen/X86/2011-02-23-UnfoldBug.ll | 42 + test/CodeGen/X86/add.ll | 13 +- test/CodeGen/X86/break-sse-dep.ll | 15 +- test/CodeGen/X86/codegen-dce.ll | 43 - test/CodeGen/X86/codegen-prepare-extload.ll | 5 +- test/CodeGen/X86/constant-pool-sharing.ll | 7 +- test/CodeGen/X86/ctpop-combine.ll | 4 +- test/CodeGen/X86/dbg-live-in-location.ll | 84 -- test/CodeGen/X86/dbg-value-location.ll | 8 +- test/CodeGen/X86/divide-by-constant.ll | 2 +- test/CodeGen/X86/dll-linkage.ll | 5 + test/CodeGen/X86/fast-isel-cmp-branch.ll | 7 +- test/CodeGen/X86/fast-isel-gep.ll | 17 +- test/CodeGen/X86/gather-addresses.ll | 23 +- test/CodeGen/X86/i128-ret.ll | 6 +- test/CodeGen/X86/lea.ll | 9 +- test/CodeGen/X86/lsr-overflow.ll | 5 +- test/CodeGen/X86/lsr-reuse-trunc.ll | 9 +- test/CodeGen/X86/memcmp.ll | 21 +- test/CodeGen/X86/movgs.ll | 7 +- test/CodeGen/X86/non-globl-eh-frame.ll | 24 - test/CodeGen/X86/optimize-max-3.ll | 11 +- test/CodeGen/X86/phi-constants.ll | 35 + test/CodeGen/X86/pr9127.ll | 5 +- test/CodeGen/X86/red-zone.ll | 2 +- test/CodeGen/X86/remat-mov-0.ll | 15 +- test/CodeGen/X86/test-shrink.ll | 21 +- test/CodeGen/X86/use-add-flags.ll | 13 +- test/CodeGen/X86/vec_anyext.ll | 77 ++ test/CodeGen/X86/vec_sext.ll | 69 + test/CodeGen/X86/vec_shuffle-37.ll | 5 +- test/CodeGen/X86/vec_zext.ll | 69 + test/CodeGen/X86/xor.ll | 9 +- test/CodeGen/XCore/events.ll | 24 + test/CodeGen/XCore/resources.ll | 65 + test/DebugInfo/2009-03-03-deadstore.ll | 108 -- test/DebugInfo/2009-03-03-store-to-load-forward.ll | 260 ---- test/DebugInfo/2009-10-16-Scope.ll | 33 - test/DebugInfo/2010-08-04-StackVariable.ll | 125 -- test/FrontendC/2011-02-21-DATA-common.c | 5 + test/MC/ARM/bracket-darwin.s | 5 + test/MC/ARM/bracket-exprs.s | 15 + test/MC/ARM/darwin-ARM-reloc.s | 171 +++ test/MC/ARM/darwin-Thumb-reloc.s | 139 ++ test/MC/ARM/full_line_comment.s | 8 + test/MC/AsmParser/exprs.s | 2 - test/MC/AsmParser/full_line_comment.s | 8 - test/MC/AsmParser/paren.s | 8 - test/MC/Disassembler/X86/enhanced.txt | 6 + test/MC/ELF/bracket-exprs.s | 15 + test/MC/ELF/bracket.s | 8 + test/MC/ELF/org.s | 13 + test/MC/ELF/pr9292.s | 26 + test/MC/ELF/relocation-pc.s | 33 + test/MC/MachO/darwin-ARM-reloc.s | 171 --- test/MC/MachO/darwin-Thumb-reloc.s | 139 -- test/MC/X86/x86-32.s | 8 + test/MC/X86/x86-64.s | 37 +- .../InstCombine/2003-11-13-ConstExprCastCall.ll | 12 - test/Transforms/InstCombine/call.ll | 16 +- test/Transforms/InstCombine/or-xor.ll | 94 ++ test/Transforms/LoopDeletion/multiple-exits.ll | 26 + test/Transforms/SimplifyCFG/select-gep.ll | 40 + test/lit.cfg | 11 +- tools/bugpoint/OptimizerDriver.cpp | 3 +- tools/gold/gold-plugin.cpp | 48 +- tools/llvm-config/CMakeLists.txt | 3 +- tools/llvm-mc/Disassembler.cpp | 169 +-- tools/lto/LTOCodeGenerator.cpp | 157 +-- tools/lto/LTOCodeGenerator.h | 10 +- tools/lto/LTOModule.cpp | 81 +- tools/lto/lto.cpp | 4 +- unittests/ADT/APIntTest.cpp | 18 + unittests/CMakeLists.txt | 2 + unittests/Transforms/Utils/Local.cpp | 11 + utils/FileCheck/CMakeLists.txt | 2 +- utils/FileUpdate/CMakeLists.txt | 2 +- utils/KillTheDoctor/CMakeLists.txt | 2 +- utils/TableGen/AsmWriterEmitter.cpp | 249 ++++ utils/TableGen/AsmWriterEmitter.h | 1 + utils/TableGen/CMakeLists.txt | 2 +- utils/TableGen/ClangSACheckersEmitter.cpp | 1 + utils/TableGen/X86RecognizableInstr.cpp | 4 +- utils/buildit/GNUmakefile | 6 +- utils/buildit/build_llvm | 8 +- utils/count/CMakeLists.txt | 2 +- utils/llvmbuild | 740 +++++++++++ utils/not/CMakeLists.txt | 2 +- utils/valgrind/i386-pc-linux-gnu.supp | 8 +- 225 files changed, 5461 insertions(+), 3154 deletions(-) create mode 100644 test/CodeGen/ARM/2009-10-16-Scope.ll create mode 100644 test/CodeGen/ARM/2010-08-04-StackVariable.ll create mode 100644 test/CodeGen/ARM/available_externally.ll create mode 100644 test/CodeGen/X86/2009-10-16-Scope.ll create mode 100644 test/CodeGen/X86/2010-08-04-StackVariable.ll create mode 100644 test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll create mode 100644 test/CodeGen/X86/2011-02-23-UnfoldBug.ll delete mode 100644 test/CodeGen/X86/codegen-dce.ll delete mode 100644 test/CodeGen/X86/dbg-live-in-location.ll delete mode 100644 test/CodeGen/X86/non-globl-eh-frame.ll create mode 100644 test/CodeGen/X86/phi-constants.ll create mode 100644 test/CodeGen/X86/vec_anyext.ll create mode 100644 test/CodeGen/X86/vec_sext.ll create mode 100644 test/CodeGen/X86/vec_zext.ll create mode 100644 test/CodeGen/XCore/events.ll delete mode 100644 test/DebugInfo/2009-03-03-deadstore.ll delete mode 100644 test/DebugInfo/2009-03-03-store-to-load-forward.ll delete mode 100644 test/DebugInfo/2009-10-16-Scope.ll delete mode 100644 test/DebugInfo/2010-08-04-StackVariable.ll create mode 100644 test/FrontendC/2011-02-21-DATA-common.c create mode 100644 test/MC/ARM/bracket-darwin.s create mode 100644 test/MC/ARM/bracket-exprs.s create mode 100644 test/MC/ARM/darwin-ARM-reloc.s create mode 100644 test/MC/ARM/darwin-Thumb-reloc.s create mode 100644 test/MC/ARM/full_line_comment.s delete mode 100644 test/MC/AsmParser/full_line_comment.s delete mode 100644 test/MC/AsmParser/paren.s create mode 100644 test/MC/Disassembler/X86/enhanced.txt create mode 100644 test/MC/ELF/bracket-exprs.s create mode 100644 test/MC/ELF/bracket.s create mode 100644 test/MC/ELF/org.s create mode 100644 test/MC/ELF/pr9292.s create mode 100644 test/MC/ELF/relocation-pc.s delete mode 100644 test/MC/MachO/darwin-ARM-reloc.s delete mode 100644 test/MC/MachO/darwin-Thumb-reloc.s delete mode 100644 test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll create mode 100644 test/Transforms/InstCombine/or-xor.ll create mode 100644 test/Transforms/LoopDeletion/multiple-exits.ll create mode 100644 test/Transforms/SimplifyCFG/select-gep.ll create mode 100755 utils/llvmbuild diff --git a/CMakeLists.txt b/CMakeLists.txt index 0a5d5f39d85a0..b357478bbc3a3 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -12,6 +12,8 @@ set(CMAKE_MODULE_PATH set(PACKAGE_VERSION "2.9") +set_property(GLOBAL PROPERTY USE_FOLDERS ON) + include(VersionFromVCS) option(LLVM_APPEND_VC_REV @@ -238,7 +240,6 @@ endif() option(LLVM_BUILD_TESTS "Build LLVM unit tests. If OFF, just generate build targes." OFF) -option(LLVM_INCLUDE_TESTS "Generate build targets for the LLVM unit tests." ON) if( LLVM_INCLUDE_TESTS ) add_subdirectory(test) add_subdirectory(utils/unittest) diff --git a/Makefile.rules b/Makefile.rules index 363fa9605b5a8..c0a9112c31bee 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -973,7 +973,9 @@ $(NativeExportsFile): $(EXPORTED_SYMBOL_FILE) $(ObjDir)/.dir $(Verb) echo "{" > $@ $(Verb) grep -q "\<" $< && echo " global:" >> $@ || : $(Verb) sed -e 's/$$/;/' -e 's/^/ /' < $< >> $@ +ifneq ($(HOST_OS),OpenBSD) $(Verb) echo " local: *;" >> $@ +endif $(Verb) echo "};" >> $@ clean-local:: -$(Verb) $(RM) -f $(NativeExportsFile) diff --git a/cmake/modules/AddLLVM.cmake b/cmake/modules/AddLLVM.cmake index dfe67cded331a..764c6591c457e 100755 --- a/cmake/modules/AddLLVM.cmake +++ b/cmake/modules/AddLLVM.cmake @@ -5,7 +5,6 @@ macro(add_llvm_library name) llvm_process_sources( ALL_FILES ${ARGN} ) add_library( ${name} ${ALL_FILES} ) set_property( GLOBAL APPEND PROPERTY LLVM_LIBS ${name} ) - set_property( GLOBAL APPEND PROPERTY LLVM_LIB_TARGETS ${name} ) if( LLVM_COMMON_DEPENDS ) add_dependencies( ${name} ${LLVM_COMMON_DEPENDS} ) endif( LLVM_COMMON_DEPENDS ) @@ -25,6 +24,7 @@ macro(add_llvm_library name) if( CURRENT_LLVM_TARGET ) add_dependencies(${name} ${CURRENT_LLVM_TARGET}) endif() + set_target_properties(${name} PROPERTIES FOLDER "Libraries") endmacro(add_llvm_library name) @@ -55,6 +55,8 @@ ${name} ignored.") LIBRARY DESTINATION lib${LLVM_LIBDIR_SUFFIX} ARCHIVE DESTINATION lib${LLVM_LIBDIR_SUFFIX}) endif() + + set_target_properties(${name} PROPERTIES FOLDER "Loadable modules") endmacro(add_llvm_loadable_module name) @@ -95,6 +97,7 @@ macro(add_llvm_tool name) if( LLVM_BUILD_TOOLS ) install(TARGETS ${name} RUNTIME DESTINATION bin) endif() + set_target_properties(${name} PROPERTIES FOLDER "Tools") endmacro(add_llvm_tool name) @@ -107,9 +110,16 @@ macro(add_llvm_example name) if( LLVM_BUILD_EXAMPLES ) install(TARGETS ${name} RUNTIME DESTINATION examples) endif() + set_target_properties(${name} PROPERTIES FOLDER "Examples") endmacro(add_llvm_example name) +macro(add_llvm_utility name) + add_llvm_executable(${name} ${ARGN}) + set_target_properties(${name} PROPERTIES FOLDER "Utils") +endmacro(add_llvm_utility name) + + macro(add_llvm_target target_name) if( TABLEGEN_OUTPUT ) add_custom_target(${target_name}Table_gen @@ -120,6 +130,7 @@ macro(add_llvm_target target_name) add_llvm_library(LLVM${target_name} ${ARGN} ${TABLEGEN_OUTPUT}) if ( TABLEGEN_OUTPUT ) add_dependencies(LLVM${target_name} ${target_name}Table_gen) + set_target_properties(${target_name}Table_gen PROPERTIES FOLDER "Tablegenning") endif (TABLEGEN_OUTPUT) set( CURRENT_LLVM_TARGET LLVM${target_name} ) endmacro(add_llvm_target) diff --git a/cmake/modules/CMakeLists.txt b/cmake/modules/CMakeLists.txt index 9a5566effb085..1ab94749f1569 100644 --- a/cmake/modules/CMakeLists.txt +++ b/cmake/modules/CMakeLists.txt @@ -1,7 +1,6 @@ set(llvm_cmake_builddir "${LLVM_BINARY_DIR}/share/llvm/cmake") get_property(llvm_libs GLOBAL PROPERTY LLVM_LIBS) -get_property(llvm_lib_targets GLOBAL PROPERTY LLVM_LIB_TARGETS) configure_file( LLVM.cmake diff --git a/cmake/modules/HandleLLVMOptions.cmake b/cmake/modules/HandleLLVMOptions.cmake index 7ca2bd07fd539..f62e86ae494bd 100644 --- a/cmake/modules/HandleLLVMOptions.cmake +++ b/cmake/modules/HandleLLVMOptions.cmake @@ -159,3 +159,4 @@ endif( MSVC ) add_llvm_definitions( -D__STDC_LIMIT_MACROS ) add_llvm_definitions( -D__STDC_CONSTANT_MACROS ) +option(LLVM_INCLUDE_TESTS "Generate build targets for the LLVM unit tests." ON) diff --git a/cmake/modules/LLVM.cmake b/cmake/modules/LLVM.cmake index d610f3e76516d..9182afdf2758c 100644 --- a/cmake/modules/LLVM.cmake +++ b/cmake/modules/LLVM.cmake @@ -4,14 +4,14 @@ set(LLVM_PACKAGE_VERSION @PACKAGE_VERSION@) set(LLVM_COMMON_DEPENDS @LLVM_COMMON_DEPENDS@) -set(llvm_libs @llvm_libs@) - -set(llvm_lib_targets @llvm_lib_targets@) +set_property( GLOBAL PROPERTY LLVM_LIBS "@llvm_libs@") set(LLVM_ALL_TARGETS @LLVM_ALL_TARGETS@) set(LLVM_TARGETS_TO_BUILD @LLVM_TARGETS_TO_BUILD@) +set(TARGET_TRIPLE "@TARGET_TRIPLE@") + set(LLVM_TOOLS_BINARY_DIR @LLVM_TOOLS_BINARY_DIR@) set(LLVM_ENABLE_THREADS @LLVM_ENABLE_THREADS@) diff --git a/docs/GettingStartedVS.html b/docs/GettingStartedVS.html index b6aa4c692d434..7c0bf007ec3a2 100644 --- a/docs/GettingStartedVS.html +++ b/docs/GettingStartedVS.html @@ -348,8 +348,6 @@ out:

@@ -365,7 +363,7 @@ out:

Jeff Cohen
The LLVM Compiler Infrastructure
- Last modified: $Date: 2011-02-09 05:19:28 +0100 (Wed, 09 Feb 2011) $ + Last modified: $Date: 2011-02-20 16:34:12 +0100 (Sun, 20 Feb 2011) $ diff --git a/docs/LangRef.html b/docs/LangRef.html index 05130c29efc29..580ae7964b5a3 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -4575,12 +4575,12 @@ entry: type ty2.

Arguments:
-

The 'trunc' instruction takes a value to trunc, which must - be an integer type, and a type that specifies the - size and type of the result, which must be - an integer type. The bit size of value must - be larger than the bit size of ty2. Equal sized types are not - allowed.

+

The 'trunc' instruction takes a value to trunc, and a type to trunc it to. + Both types must be of integer types, or vectors + of the same number of integers. + The bit size of the value must be larger than + the bit size of the destination type, ty2. + Equal sized types are not allowed.

Semantics:

The 'trunc' instruction truncates the high order bits @@ -4590,9 +4590,10 @@ entry:

Example:
-  %X = trunc i32 257 to i8              ; yields i8:1
-  %Y = trunc i32 123 to i1              ; yields i1:true
-  %Z = trunc i32 122 to i1              ; yields i1:false
+  %X = trunc i32 257 to i8                        ; yields i8:1
+  %Y = trunc i32 123 to i1                        ; yields i1:true
+  %Z = trunc i32 122 to i1                        ; yields i1:false
+  %W = trunc <2 x i16> <i16 8, i16 7> to <2 x i8> ; yields <i8 8, i8 7>
@@ -4614,10 +4615,11 @@ entry:
Arguments:
-

The 'zext' instruction takes a value to cast, which must be of - integer type, and a type to cast it to, which must - also be of integer type. The bit size of the - value must be smaller than the bit size of the destination type, +

The 'zext' instruction takes a value to cast, and a type to cast it to. + Both types must be of integer types, or vectors + of the same number of integers. + The bit size of the value must be smaller than + the bit size of the destination type, ty2.

Semantics:
@@ -4630,6 +4632,7 @@ entry: 
   %X = zext i32 257 to i64              ; yields i64:257
   %Y = zext i1 true to i32              ; yields i32:1
+  %Z = zext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>
@@ -4649,10 +4652,11 @@ entry:

The 'sext' sign extends value to the type ty2.

Arguments:
-

The 'sext' instruction takes a value to cast, which must be of - integer type, and a type to cast it to, which must - also be of integer type. The bit size of the - value must be smaller than the bit size of the destination type, +

The 'sext' instruction takes a value to cast, and a type to cast it to. + Both types must be of integer types, or vectors + of the same number of integers. + The bit size of the value must be smaller than + the bit size of the destination type, ty2.

Semantics:
@@ -4666,6 +4670,7 @@ entry: 
   %X = sext i8  -1 to i16              ; yields i16   :65535
   %Y = sext i1 true to i32             ; yields i32:-1
+  %Z = sext <2 x i16> <i16 8, i16 7> to <2 x i32> ; yields <i32 8, i32 7>
@@ -7781,7 +7786,7 @@ LLVM.

Chris Lattner
The LLVM Compiler Infrastructure
- Last modified: $Date: 2011-02-09 17:44:44 +0100 (Wed, 09 Feb 2011) $ + Last modified: $Date: 2011-02-24 22:01:34 +0100 (Thu, 24 Feb 2011) $ diff --git a/include/llvm/ADT/APInt.h b/include/llvm/ADT/APInt.h index b91d5dc9bcf9e..d1fd3e5034bf0 100644 --- a/include/llvm/ADT/APInt.h +++ b/include/llvm/ADT/APInt.h @@ -1193,6 +1193,12 @@ public: /// @brief Count the number of leading one bits. unsigned countLeadingOnes() const; + /// Computes the number of leading bits of this APInt that are equal to its + /// sign bit. + unsigned getNumSignBits() const { + return isNegative() ? countLeadingOnes() : countLeadingZeros(); + } + /// countTrailingZeros - This function is an APInt version of the /// countTrailingZeros_{32,64} functions in MathExtras.h. It counts /// the number of zeros from the least significant bit to the first set bit. diff --git a/include/llvm/ADT/ArrayRef.h b/include/llvm/ADT/ArrayRef.h index 1c5470d678b62..d3ea9c0f03b75 100644 --- a/include/llvm/ADT/ArrayRef.h +++ b/include/llvm/ADT/ArrayRef.h @@ -64,7 +64,10 @@ namespace llvm { /*implicit*/ ArrayRef(const std::vector &Vec) : Data(Vec.empty() ? (T*)0 : &Vec[0]), Length(Vec.size()) {} - // TODO: C arrays. + /// Construct an ArrayRef from a C array. + template + /*implicit*/ ArrayRef(const T (&Arr)[N]) + : Data(Arr), Length(N) {} /// @} /// @name Simple Operations diff --git a/include/llvm/ADT/ImmutableIntervalMap.h b/include/llvm/ADT/ImmutableIntervalMap.h index d3196ca23df90..0d8fcf3433855 100644 --- a/include/llvm/ADT/ImmutableIntervalMap.h +++ b/include/llvm/ADT/ImmutableIntervalMap.h @@ -215,7 +215,7 @@ public: ImmutableIntervalMap add(ImmutableIntervalMap Old, key_type_ref K, data_type_ref D) { - TreeTy *T = F.add(Old.Root, std::make_pair(K, D)); + TreeTy *T = F.add(Old.Root, std::pair(K, D)); return ImmutableIntervalMap(F.getCanonicalTree(T)); } diff --git a/include/llvm/ADT/ImmutableMap.h b/include/llvm/ADT/ImmutableMap.h index e439a09948219..d6cce7ccfa05f 100644 --- a/include/llvm/ADT/ImmutableMap.h +++ b/include/llvm/ADT/ImmutableMap.h @@ -108,7 +108,7 @@ public: ImmutableMap getEmptyMap() { return ImmutableMap(F.getEmptyTree()); } ImmutableMap add(ImmutableMap Old, key_type_ref K, data_type_ref D) { - TreeTy *T = F.add(Old.Root, std::make_pair(K,D)); + TreeTy *T = F.add(Old.Root, std::pair(K,D)); return ImmutableMap(Canonicalize ? F.getCanonicalTree(T): T); } diff --git a/include/llvm/Analysis/DIBuilder.h b/include/llvm/Analysis/DIBuilder.h index bd221344e5fa8..417dbc4e802ce 100644 --- a/include/llvm/Analysis/DIBuilder.h +++ b/include/llvm/Analysis/DIBuilder.h @@ -58,7 +58,7 @@ namespace llvm { const MDNode *getCU() { return TheCU; } enum ComplexAddrKind { OpPlus=1, OpDeref }; - /// CreateCompileUnit - A CompileUnit provides an anchor for all debugging + /// createCompileUnit - A CompileUnit provides an anchor for all debugging /// information generated during this instance of compilation. /// @param Lang Source programming language, eg. dwarf::DW_LANG_C99 /// @param File File name @@ -72,67 +72,67 @@ namespace llvm { /// by a tool analyzing generated debugging information. /// @param RV This indicates runtime version for languages like /// Objective-C. - void CreateCompileUnit(unsigned Lang, StringRef File, StringRef Dir, + void createCompileUnit(unsigned Lang, StringRef File, StringRef Dir, StringRef Producer, bool isOptimized, StringRef Flags, unsigned RV); - /// CreateFile - Create a file descriptor to hold debugging information + /// createFile - Create a file descriptor to hold debugging information /// for a file. - DIFile CreateFile(StringRef Filename, StringRef Directory); + DIFile createFile(StringRef Filename, StringRef Directory); - /// CreateEnumerator - Create a single enumerator value. - DIEnumerator CreateEnumerator(StringRef Name, uint64_t Val); + /// createEnumerator - Create a single enumerator value. + DIEnumerator createEnumerator(StringRef Name, uint64_t Val); - /// CreateBasicType - Create debugging information entry for a basic + /// createBasicType - Create debugging information entry for a basic /// type. /// @param Name Type name. /// @param SizeInBits Size of the type. /// @param AlignInBits Type alignment. /// @param Encoding DWARF encoding code, e.g. dwarf::DW_ATE_float. - DIType CreateBasicType(StringRef Name, uint64_t SizeInBits, + DIType createBasicType(StringRef Name, uint64_t SizeInBits, uint64_t AlignInBits, unsigned Encoding); - /// CreateQualifiedType - Create debugging information entry for a qualified + /// createQualifiedType - Create debugging information entry for a qualified /// type, e.g. 'const int'. /// @param Tag Tag identifing type, e.g. dwarf::TAG_volatile_type /// @param FromTy Base Type. - DIType CreateQualifiedType(unsigned Tag, DIType FromTy); + DIType createQualifiedType(unsigned Tag, DIType FromTy); - /// CreatePointerType - Create debugging information entry for a pointer. + /// createPointerType - Create debugging information entry for a pointer. /// @param PointeeTy Type pointed by this pointer. /// @param SizeInBits Size. /// @param AlignInBits Alignment. (optional) /// @param Name Pointer type name. (optional) - DIType CreatePointerType(DIType PointeeTy, uint64_t SizeInBits, + DIType createPointerType(DIType PointeeTy, uint64_t SizeInBits, uint64_t AlignInBits = 0, StringRef Name = StringRef()); - /// CreateReferenceType - Create debugging information entry for a c++ + /// createReferenceType - Create debugging information entry for a c++ /// style reference. - DIType CreateReferenceType(DIType RTy); + DIType createReferenceType(DIType RTy); - /// CreateTypedef - Create debugging information entry for a typedef. + /// createTypedef - Create debugging information entry for a typedef. /// @param Ty Original type. /// @param Name Typedef name. /// @param File File where this type is defined. /// @param LineNo Line number. - DIType CreateTypedef(DIType Ty, StringRef Name, DIFile File, + DIType createTypedef(DIType Ty, StringRef Name, DIFile File, unsigned LineNo); - /// CreateFriend - Create debugging information entry for a 'friend'. - DIType CreateFriend(DIType Ty, DIType FriendTy); + /// createFriend - Create debugging information entry for a 'friend'. + DIType createFriend(DIType Ty, DIType FriendTy); - /// CreateInheritance - Create debugging information entry to establish + /// createInheritance - Create debugging information entry to establish /// inheritance relationship between two types. /// @param Ty Original type. /// @param BaseTy Base type. Ty is inherits from base. /// @param BaseOffset Base offset. /// @param Flags Flags to describe inheritance attribute, /// e.g. private - DIType CreateInheritance(DIType Ty, DIType BaseTy, uint64_t BaseOffset, + DIType createInheritance(DIType Ty, DIType BaseTy, uint64_t BaseOffset, unsigned Flags); - /// CreateMemberType - Create debugging information entry for a member. + /// createMemberType - Create debugging information entry for a member. /// @param Name Member name. /// @param File File where this member is defined. /// @param LineNo Line number. @@ -141,12 +141,12 @@ namespace llvm { /// @param OffsetInBits Member offset. /// @param Flags Flags to encode member attribute, e.g. private /// @param Ty Parent type. - DIType CreateMemberType(StringRef Name, DIFile File, + DIType createMemberType(StringRef Name, DIFile File, unsigned LineNo, uint64_t SizeInBits, uint64_t AlignInBits, uint64_t OffsetInBits, unsigned Flags, DIType Ty); - /// CreateClassType - Create debugging information entry for a class. + /// createClassType - Create debugging information entry for a class. /// @param Scope Scope in which this class is defined. /// @param Name class name. /// @param File File where this member is defined. @@ -161,14 +161,14 @@ namespace llvm { /// DW_AT_containing_type. See DWARF documentation /// for more info. /// @param TemplateParms Template type parameters. - DIType CreateClassType(DIDescriptor Scope, StringRef Name, DIFile File, + DIType createClassType(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, uint64_t OffsetInBits, unsigned Flags, DIType DerivedFrom, DIArray Elements, MDNode *VTableHolder = 0, MDNode *TemplateParms = 0); - /// CreateStructType - Create debugging information entry for a struct. + /// createStructType - Create debugging information entry for a struct. /// @param Scope Scope in which this struct is defined. /// @param Name Struct name. /// @param File File where this member is defined. @@ -178,12 +178,12 @@ namespace llvm { /// @param Flags Flags to encode member attribute, e.g. private /// @param Elements Struct elements. /// @param RunTimeLang Optional parameter, Objective-C runtime version. - DIType CreateStructType(DIDescriptor Scope, StringRef Name, DIFile File, + DIType createStructType(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, unsigned Flags, DIArray Elements, unsigned RunTimeLang = 0); - /// CreateUnionType - Create debugging information entry for an union. + /// createUnionType - Create debugging information entry for an union. /// @param Scope Scope in which this union is defined. /// @param Name Union name. /// @param File File where this member is defined. @@ -193,12 +193,12 @@ namespace llvm { /// @param Flags Flags to encode member attribute, e.g. private /// @param Elements Union elements. /// @param RunTimeLang Optional parameter, Objective-C runtime version. - DIType CreateUnionType(DIDescriptor Scope, StringRef Name, DIFile File, + DIType createUnionType(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, unsigned Flags, DIArray Elements, unsigned RunTimeLang = 0); - /// CreateTemplateTypeParameter - Create debugging information for template + /// createTemplateTypeParameter - Create debugging information for template /// type parameter. /// @param Scope Scope in which this type is defined. /// @param Name Type parameter name. @@ -207,11 +207,11 @@ namespace llvm { /// @param LineNo Line number. /// @param ColumnNo Column Number. DITemplateTypeParameter - CreateTemplateTypeParameter(DIDescriptor Scope, StringRef Name, DIType Ty, + createTemplateTypeParameter(DIDescriptor Scope, StringRef Name, DIType Ty, MDNode *File = 0, unsigned LineNo = 0, unsigned ColumnNo = 0); - /// CreateTemplateValueParameter - Create debugging information for template + /// createTemplateValueParameter - Create debugging information for template /// value parameter. /// @param Scope Scope in which this type is defined. /// @param Name Value parameter name. @@ -221,28 +221,28 @@ namespace llvm { /// @param LineNo Line number. /// @param ColumnNo Column Number. DITemplateValueParameter - CreateTemplateValueParameter(DIDescriptor Scope, StringRef Name, DIType Ty, + createTemplateValueParameter(DIDescriptor Scope, StringRef Name, DIType Ty, uint64_t Value, MDNode *File = 0, unsigned LineNo = 0, unsigned ColumnNo = 0); - /// CreateArrayType - Create debugging information entry for an array. + /// createArrayType - Create debugging information entry for an array. /// @param Size Array size. /// @param AlignInBits Alignment. /// @param Ty Element type. /// @param Subscripts Subscripts. - DIType CreateArrayType(uint64_t Size, uint64_t AlignInBits, + DIType createArrayType(uint64_t Size, uint64_t AlignInBits, DIType Ty, DIArray Subscripts); - /// CreateVectorType - Create debugging information entry for a vector type. + /// createVectorType - Create debugging information entry for a vector type. /// @param Size Array size. /// @param AlignInBits Alignment. /// @param Ty Element type. /// @param Subscripts Subscripts. - DIType CreateVectorType(uint64_t Size, uint64_t AlignInBits, + DIType createVectorType(uint64_t Size, uint64_t AlignInBits, DIType Ty, DIArray Subscripts); - /// CreateEnumerationType - Create debugging information entry for an + /// createEnumerationType - Create debugging information entry for an /// enumeration. /// @param Scope Scope in which this enumeration is defined. /// @param Name Union name. @@ -251,40 +251,40 @@ namespace llvm { /// @param SizeInBits Member size. /// @param AlignInBits Member alignment. /// @param Elements Enumeration elements. - DIType CreateEnumerationType(DIDescriptor Scope, StringRef Name, + DIType createEnumerationType(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, DIArray Elements); - /// CreateSubroutineType - Create subroutine type. + /// createSubroutineType - Create subroutine type. /// @param File File in which this subroutine is defined. /// @param ParamterTypes An array of subroutine parameter types. This /// includes return type at 0th index. - DIType CreateSubroutineType(DIFile File, DIArray ParameterTypes); + DIType createSubroutineType(DIFile File, DIArray ParameterTypes); - /// CreateArtificialType - Create a new DIType with "artificial" flag set. - DIType CreateArtificialType(DIType Ty); + /// createArtificialType - Create a new DIType with "artificial" flag set. + DIType createArtificialType(DIType Ty); - /// CreateTemporaryType - Create a temporary forward-declared type. - DIType CreateTemporaryType(); - DIType CreateTemporaryType(DIFile F); + /// createTemporaryType - Create a temporary forward-declared type. + DIType createTemporaryType(); + DIType createTemporaryType(DIFile F); - /// RetainType - Retain DIType in a module even if it is not referenced + /// retainType - Retain DIType in a module even if it is not referenced /// through debug info anchors. - void RetainType(DIType T); + void retainType(DIType T); - /// CreateUnspecifiedParameter - Create unspeicified type descriptor + /// createUnspecifiedParameter - Create unspeicified type descriptor /// for a subroutine type. - DIDescriptor CreateUnspecifiedParameter(); + DIDescriptor createUnspecifiedParameter(); - /// GetOrCreateArray - Get a DIArray, create one if required. - DIArray GetOrCreateArray(Value *const *Elements, unsigned NumElements); + /// getOrCreateArray - Get a DIArray, create one if required. + DIArray getOrCreateArray(Value *const *Elements, unsigned NumElements); - /// GetOrCreateSubrange - Create a descriptor for a value range. This + /// getOrCreateSubrange - Create a descriptor for a value range. This /// implicitly uniques the values returned. - DISubrange GetOrCreateSubrange(int64_t Lo, int64_t Hi); + DISubrange getOrCreateSubrange(int64_t Lo, int64_t Hi); - /// CreateGlobalVariable - Create a new descriptor for the specified global. + /// createGlobalVariable - Create a new descriptor for the specified global. /// @param Name Name of the variable. /// @param File File where this variable is defined. /// @param LineNo Line number. @@ -293,11 +293,11 @@ namespace llvm { /// externally visible or not. /// @param Val llvm::Value of the variable. DIGlobalVariable - CreateGlobalVariable(StringRef Name, DIFile File, unsigned LineNo, + createGlobalVariable(StringRef Name, DIFile File, unsigned LineNo, DIType Ty, bool isLocalToUnit, llvm::Value *Val); - /// CreateStaticVariable - Create a new descriptor for the specified + /// createStaticVariable - Create a new descriptor for the specified /// variable. /// @param Conext Variable scope. /// @param Name Name of the variable. @@ -309,12 +309,12 @@ namespace llvm { /// externally visible or not. /// @param Val llvm::Value of the variable. DIGlobalVariable - CreateStaticVariable(DIDescriptor Context, StringRef Name, + createStaticVariable(DIDescriptor Context, StringRef Name, StringRef LinkageName, DIFile File, unsigned LineNo, DIType Ty, bool isLocalToUnit, llvm::Value *Val); - /// CreateLocalVariable - Create a new descriptor for the specified + /// createLocalVariable - Create a new descriptor for the specified /// local variable. /// @param Tag Dwarf TAG. Usually DW_TAG_auto_variable or /// DW_TAG_arg_variable. @@ -326,14 +326,14 @@ namespace llvm { /// @param AlwaysPreserve Boolean. Set to true if debug info for this /// variable should be preserved in optimized build. /// @param Flags Flags, e.g. artificial variable. - DIVariable CreateLocalVariable(unsigned Tag, DIDescriptor Scope, + DIVariable createLocalVariable(unsigned Tag, DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNo, DIType Ty, bool AlwaysPreserve = false, unsigned Flags = 0); - /// CreateComplexVariable - Create a new descriptor for the specified + /// createComplexVariable - Create a new descriptor for the specified /// variable which has a complex address expression for its address. /// @param Tag Dwarf TAG. Usually DW_TAG_auto_variable or /// DW_TAG_arg_variable. @@ -344,12 +344,12 @@ namespace llvm { /// @param Ty Variable Type /// @param Addr A pointer to a vector of complex address operations. /// @param NumAddr Num of address operations in the vector. - DIVariable CreateComplexVariable(unsigned Tag, DIDescriptor Scope, + DIVariable createComplexVariable(unsigned Tag, DIDescriptor Scope, StringRef Name, DIFile F, unsigned LineNo, DIType Ty, Value *const *Addr, unsigned NumAddr); - /// CreateFunction - Create a new descriptor for the specified subprogram. + /// createFunction - Create a new descriptor for the specified subprogram. /// See comments in DISubprogram for descriptions of these fields. /// @param Scope Function scope. /// @param Name Function name. @@ -363,7 +363,7 @@ namespace llvm { /// This flags are used to emit dwarf attributes. /// @param isOptimized True if optimization is ON. /// @param Fn llvm::Function pointer. - DISubprogram CreateFunction(DIDescriptor Scope, StringRef Name, + DISubprogram createFunction(DIDescriptor Scope, StringRef Name, StringRef LinkageName, DIFile File, unsigned LineNo, DIType Ty, bool isLocalToUnit, @@ -372,7 +372,7 @@ namespace llvm { bool isOptimized = false, Function *Fn = 0); - /// CreateMethod - Create a new descriptor for the specified C++ method. + /// createMethod - Create a new descriptor for the specified C++ method. /// See comments in DISubprogram for descriptions of these fields. /// @param Scope Function scope. /// @param Name Function name. @@ -390,7 +390,7 @@ namespace llvm { /// This flags are used to emit dwarf attributes. /// @param isOptimized True if optimization is ON. /// @param Fn llvm::Function pointer. - DISubprogram CreateMethod(DIDescriptor Scope, StringRef Name, + DISubprogram createMethod(DIDescriptor Scope, StringRef Name, StringRef LinkageName, DIFile File, unsigned LineNo, DIType Ty, bool isLocalToUnit, @@ -401,55 +401,55 @@ namespace llvm { bool isOptimized = false, Function *Fn = 0); - /// CreateNameSpace - This creates new descriptor for a namespace + /// createNameSpace - This creates new descriptor for a namespace /// with the specified parent scope. /// @param Scope Namespace scope /// @param Name Name of this namespace /// @param File Source file /// @param LineNo Line number - DINameSpace CreateNameSpace(DIDescriptor Scope, StringRef Name, + DINameSpace createNameSpace(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNo); - /// CreateLexicalBlock - This creates a descriptor for a lexical block + /// createLexicalBlock - This creates a descriptor for a lexical block /// with the specified parent context. /// @param Scope Parent lexical scope. /// @param File Source file /// @param Line Line number /// @param Col Column number - DILexicalBlock CreateLexicalBlock(DIDescriptor Scope, DIFile File, + DILexicalBlock createLexicalBlock(DIDescriptor Scope, DIFile File, unsigned Line, unsigned Col); - /// InsertDeclare - Insert a new llvm.dbg.declare intrinsic call. + /// insertDeclare - Insert a new llvm.dbg.declare intrinsic call. /// @param Storage llvm::Value of the variable /// @param VarInfo Variable's debug info descriptor. /// @param InsertAtEnd Location for the new intrinsic. - Instruction *InsertDeclare(llvm::Value *Storage, DIVariable VarInfo, + Instruction *insertDeclare(llvm::Value *Storage, DIVariable VarInfo, BasicBlock *InsertAtEnd); - /// InsertDeclare - Insert a new llvm.dbg.declare intrinsic call. + /// insertDeclare - Insert a new llvm.dbg.declare intrinsic call. /// @param Storage llvm::Value of the variable /// @param VarInfo Variable's debug info descriptor. /// @param InsertBefore Location for the new intrinsic. - Instruction *InsertDeclare(llvm::Value *Storage, DIVariable VarInfo, + Instruction *insertDeclare(llvm::Value *Storage, DIVariable VarInfo, Instruction *InsertBefore); - /// InsertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. + /// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. /// @param Val llvm::Value of the variable /// @param Offset Offset /// @param VarInfo Variable's debug info descriptor. /// @param InsertAtEnd Location for the new intrinsic. - Instruction *InsertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, + Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, DIVariable VarInfo, BasicBlock *InsertAtEnd); - /// InsertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. + /// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. /// @param Val llvm::Value of the variable /// @param Offset Offset /// @param VarInfo Variable's debug info descriptor. /// @param InsertBefore Location for the new intrinsic. - Instruction *InsertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, + Instruction *insertDbgValueIntrinsic(llvm::Value *Val, uint64_t Offset, DIVariable VarInfo, Instruction *InsertBefore); diff --git a/include/llvm/CMakeLists.txt b/include/llvm/CMakeLists.txt index 5e4f40881d00e..0c3ca1cd0c5c5 100644 --- a/include/llvm/CMakeLists.txt +++ b/include/llvm/CMakeLists.txt @@ -4,6 +4,7 @@ tablegen(Intrinsics.gen -gen-intrinsic) add_custom_target(intrinsics_gen ALL DEPENDS ${llvm_builded_incs_dir}/Intrinsics.gen) +set_target_properties(intrinsics_gen PROPERTIES FOLDER "Tablegenning") set(LLVM_COMMON_DEPENDS ${LLVM_COMMON_DEPENDS} intrinsics_gen PARENT_SCOPE) @@ -16,4 +17,5 @@ if( MSVC_IDE OR XCODE ) # We need at least one source file: ${LLVM_MAIN_SRC_DIR}/lib/Transforms/Hello/Hello.cpp ${headers}) + set_target_properties(llvm_headers_do_not_build PROPERTIES FOLDER "Misc") endif() diff --git a/include/llvm/CodeGen/AsmPrinter.h b/include/llvm/CodeGen/AsmPrinter.h index 357b933db54c1..a071febb102f4 100644 --- a/include/llvm/CodeGen/AsmPrinter.h +++ b/include/llvm/CodeGen/AsmPrinter.h @@ -445,7 +445,8 @@ namespace llvm { /// EmitVisibility - This emits visibility information about symbol, if /// this is suported by the target. - void EmitVisibility(MCSymbol *Sym, unsigned Visibility) const; + void EmitVisibility(MCSymbol *Sym, unsigned Visibility, + bool IsDefinition = true) const; void EmitLinkage(unsigned Linkage, MCSymbol *GVSym) const; diff --git a/include/llvm/CodeGen/FunctionLoweringInfo.h b/include/llvm/CodeGen/FunctionLoweringInfo.h index 27631b7ea12fb..b41f30d8251d9 100644 --- a/include/llvm/CodeGen/FunctionLoweringInfo.h +++ b/include/llvm/CodeGen/FunctionLoweringInfo.h @@ -101,13 +101,16 @@ public: #endif struct LiveOutInfo { - unsigned NumSignBits; + unsigned NumSignBits : 31; + bool IsValid : 1; APInt KnownOne, KnownZero; - LiveOutInfo() : NumSignBits(0), KnownOne(1, 0), KnownZero(1, 0) {} + LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0), + KnownZero(1, 0) {} }; - - /// LiveOutRegInfo - Information about live out vregs. - IndexedMap LiveOutRegInfo; + + /// VisitedBBs - The set of basic blocks visited thus far by instruction + /// selection. + DenseSet VisitedBBs; /// PHINodesToUpdate - A list of phi instructions whose operand list will /// be updated after processing the current basic block. @@ -143,12 +146,62 @@ public: return R = CreateRegs(V->getType()); } + /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the + /// register is a PHI destination and the PHI's LiveOutInfo is not valid. + const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) { + if (!LiveOutRegInfo.inBounds(Reg)) + return NULL; + + const LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; + if (!LOI->IsValid) + return NULL; + + return LOI; + } + + /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the + /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If + /// the register's LiveOutInfo is for a smaller bit width, it is extended to + /// the larger bit width by zero extension. The bit width must be no smaller + /// than the LiveOutInfo's existing bit width. + const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth); + + /// AddLiveOutRegInfo - Adds LiveOutInfo for a register. + void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits, + const APInt &KnownZero, const APInt &KnownOne) { + // Only install this information if it tells us something. + if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0) + return; + + LiveOutRegInfo.grow(Reg); + LiveOutInfo &LOI = LiveOutRegInfo[Reg]; + LOI.NumSignBits = NumSignBits; + LOI.KnownOne = KnownOne; + LOI.KnownZero = KnownZero; + } + + /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination + /// register based on the LiveOutInfo of its operands. + void ComputePHILiveOutRegInfo(const PHINode*); + + /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be + /// called when a block is visited before all of its predecessors. + void InvalidatePHILiveOutRegInfo(const PHINode *PN) { + unsigned Reg = ValueMap[PN]; + LiveOutRegInfo.grow(Reg); + LiveOutRegInfo[Reg].IsValid = false; + } + /// setByValArgumentFrameIndex - Record frame index for the byval /// argument. void setByValArgumentFrameIndex(const Argument *A, int FI); /// getByValArgumentFrameIndex - Get frame index for the byval argument. int getByValArgumentFrameIndex(const Argument *A); + +private: + /// LiveOutRegInfo - Information about live out vregs. + IndexedMap LiveOutRegInfo; }; /// AddCatchInfo - Extract the personality and type infos from an eh.selector diff --git a/include/llvm/CodeGen/MachineConstantPool.h b/include/llvm/CodeGen/MachineConstantPool.h index 498f815b9b5a9..5727321a0da46 100644 --- a/include/llvm/CodeGen/MachineConstantPool.h +++ b/include/llvm/CodeGen/MachineConstantPool.h @@ -16,6 +16,7 @@ #ifndef LLVM_CODEGEN_MACHINECONSTANTPOOL_H #define LLVM_CODEGEN_MACHINECONSTANTPOOL_H +#include "llvm/ADT/DenseSet.h" #include #include #include @@ -130,6 +131,8 @@ class MachineConstantPool { const TargetData *TD; ///< The machine's TargetData. unsigned PoolAlignment; ///< The alignment for the pool. std::vector Constants; ///< The pool of constants. + /// MachineConstantPoolValues that use an existing MachineConstantPoolEntry. + DenseSet MachineCPVsSharingEntries; public: /// @brief The only constructor. explicit MachineConstantPool(const TargetData *td) diff --git a/include/llvm/CodeGen/MachineFunction.h b/include/llvm/CodeGen/MachineFunction.h index abeaa4f58d3d2..f56c053e4708f 100644 --- a/include/llvm/CodeGen/MachineFunction.h +++ b/include/llvm/CodeGen/MachineFunction.h @@ -281,7 +281,7 @@ public: /// addLiveIn - Add the specified physical register as a live-in value and /// create a corresponding virtual register for it. - unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC, DebugLoc DL); + unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC); //===--------------------------------------------------------------------===// // BasicBlock accessor functions. diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index 79ff714df63dd..74df8da20ed39 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -17,8 +17,6 @@ #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/IndexedMap.h" -#include "llvm/ADT/DenseMap.h" -#include "llvm/Support/DebugLoc.h" #include namespace llvm { @@ -66,10 +64,7 @@ class MachineRegisterInfo { /// stored in the second element. std::vector > LiveIns; std::vector LiveOuts; - - /// LiveInLocs - Keep track of location livein registers. - DenseMap LiveInLocs; - + MachineRegisterInfo(const MachineRegisterInfo&); // DO NOT IMPLEMENT void operator=(const MachineRegisterInfo&); // DO NOT IMPLEMENT public: @@ -276,12 +271,7 @@ public: LiveIns.push_back(std::make_pair(Reg, vreg)); } void addLiveOut(unsigned Reg) { LiveOuts.push_back(Reg); } - - /// addLiveInLoc - Keep track of location info for live in reg. - void addLiveInLoc(unsigned VReg, DebugLoc DL) { - LiveInLocs[VReg] = DL; - } - + // Iteration support for live in/out sets. These sets are kept in sorted // order by their register number. typedef std::vector >::const_iterator diff --git a/include/llvm/IntrinsicsXCore.td b/include/llvm/IntrinsicsXCore.td index 97bac1d2daafd..944120fc8c6e2 100644 --- a/include/llvm/IntrinsicsXCore.td +++ b/include/llvm/IntrinsicsXCore.td @@ -33,4 +33,23 @@ let TargetPrefix = "xcore" in { // All intrinsics start with "llvm.xcore.". [NoCapture<0>]>; def int_xcore_setc : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], [NoCapture<0>]>; + def int_xcore_inshr : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty, llvm_i32_ty], + [NoCapture<0>]>; + def int_xcore_outshr : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty, llvm_i32_ty], + [NoCapture<0>]>; + def int_xcore_setpt : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], + [NoCapture<0>]>; + def int_xcore_getts : Intrinsic<[llvm_i32_ty],[llvm_anyptr_ty], + [NoCapture<0>]>; + def int_xcore_syncr : Intrinsic<[],[llvm_anyptr_ty], + [NoCapture<0>]>; + def int_xcore_settw : Intrinsic<[],[llvm_anyptr_ty, llvm_i32_ty], + [NoCapture<0>]>; + def int_xcore_setv : Intrinsic<[],[llvm_anyptr_ty, llvm_ptr_ty], + [NoCapture<0>]>; + def int_xcore_eeu : Intrinsic<[],[llvm_anyptr_ty], [NoCapture<0>]>; + + // Intrinsics for events. + def int_xcore_waitevent : Intrinsic<[llvm_ptr_ty],[], [IntrReadMem]>; + def int_xcore_clre : Intrinsic<[],[],[]>; } diff --git a/include/llvm/MC/MCAsmInfo.h b/include/llvm/MC/MCAsmInfo.h index 9cfd0048a607b..0bf364a6dfcf4 100644 --- a/include/llvm/MC/MCAsmInfo.h +++ b/include/llvm/MC/MCAsmInfo.h @@ -246,6 +246,11 @@ namespace llvm { /// declare a symbol as having hidden visibility. MCSymbolAttr HiddenVisibilityAttr; // Defaults to MCSA_Hidden. + /// HiddenDeclarationVisibilityAttr - This attribute, if not MCSA_Invalid, + /// is used to declare an undefined symbol as having hidden visibility. + MCSymbolAttr HiddenDeclarationVisibilityAttr; // Defaults to MCSA_Hidden. + + /// ProtectedVisibilityAttr - This attribute, if not MCSA_Invalid, is used /// to declare a symbol as having protected visibility. MCSymbolAttr ProtectedVisibilityAttr; // Defaults to MCSA_Protected @@ -425,6 +430,9 @@ namespace llvm { const char *getLinkOnceDirective() const { return LinkOnceDirective; } MCSymbolAttr getHiddenVisibilityAttr() const { return HiddenVisibilityAttr;} + MCSymbolAttr getHiddenDeclarationVisibilityAttr() const { + return HiddenDeclarationVisibilityAttr; + } MCSymbolAttr getProtectedVisibilityAttr() const { return ProtectedVisibilityAttr; } diff --git a/include/llvm/MC/MCParser/MCAsmParserExtension.h b/include/llvm/MC/MCParser/MCAsmParserExtension.h index 95184cdfcf328..ceb57f57e9e12 100644 --- a/include/llvm/MC/MCParser/MCAsmParserExtension.h +++ b/include/llvm/MC/MCParser/MCAsmParserExtension.h @@ -38,6 +38,8 @@ protected: return (Obj->*Handler)(Directive, DirectiveLoc); } + bool BracketExpressionsSupported; + public: virtual ~MCAsmParserExtension(); @@ -68,6 +70,8 @@ public: const AsmToken &getTok() { return getParser().getTok(); } + bool HasBracketExpressions() const { return BracketExpressionsSupported; } + /// @} }; diff --git a/include/llvm/MC/MCStreamer.h b/include/llvm/MC/MCStreamer.h index fc2451f9c19ca..4451199b7fb37 100644 --- a/include/llvm/MC/MCStreamer.h +++ b/include/llvm/MC/MCStreamer.h @@ -57,13 +57,10 @@ namespace llvm { MCDwarfFrameInfo *getCurrentFrameInfo(); void EnsureValidFrame(); - /// CurSectionStack - This is stack of CurSection values saved by - /// PushSection. - SmallVector CurSectionStack; - - /// PrevSectionStack - This is stack of PrevSection values saved by - /// PushSection. - SmallVector PrevSectionStack; + /// SectionStack - This is stack of current and previous section + /// values saved by PushSection. + SmallVector, 4> SectionStack; protected: MCStreamer(MCContext &Ctx); @@ -117,16 +114,16 @@ namespace llvm { /// getCurrentSection - Return the current section that the streamer is /// emitting code to. const MCSection *getCurrentSection() const { - if (!CurSectionStack.empty()) - return CurSectionStack.back(); + if (!SectionStack.empty()) + return SectionStack.back().first; return NULL; } /// getPreviousSection - Return the previous section that the streamer is /// emitting code to. const MCSection *getPreviousSection() const { - if (!PrevSectionStack.empty()) - return PrevSectionStack.back(); + if (!SectionStack.empty()) + return SectionStack.back().second; return NULL; } @@ -139,8 +136,8 @@ namespace llvm { /// pushSection - Save the current and previous section on the /// section stack. void PushSection() { - PrevSectionStack.push_back(getPreviousSection()); - CurSectionStack.push_back(getCurrentSection()); + SectionStack.push_back(std::make_pair(getCurrentSection(), + getPreviousSection())); } /// popSection - Restore the current and previous section from @@ -148,12 +145,10 @@ namespace llvm { /// /// Returns false if the stack was empty. bool PopSection() { - if (PrevSectionStack.size() <= 1) + if (SectionStack.size() <= 1) return false; - assert(CurSectionStack.size() > 1); - PrevSectionStack.pop_back(); - const MCSection *oldSection = CurSectionStack.pop_back_val(); - const MCSection *curSection = CurSectionStack.back(); + const MCSection *oldSection = SectionStack.pop_back_val().first; + const MCSection *curSection = SectionStack.back().first; if (oldSection != curSection) ChangeSection(curSection); @@ -166,10 +161,10 @@ namespace llvm { /// This corresponds to assembler directives like .section, .text, etc. void SwitchSection(const MCSection *Section) { assert(Section && "Cannot switch to a null section!"); - const MCSection *curSection = CurSectionStack.back(); - PrevSectionStack.back() = curSection; + const MCSection *curSection = SectionStack.back().first; + SectionStack.back().second = curSection; if (Section != curSection) { - CurSectionStack.back() = Section; + SectionStack.back().first = Section; ChangeSection(Section); } } diff --git a/include/llvm/Support/NoFolder.h b/include/llvm/Support/NoFolder.h index d7b5b42924c3f..92a9fd695e583 100644 --- a/include/llvm/Support/NoFolder.h +++ b/include/llvm/Support/NoFolder.h @@ -38,8 +38,12 @@ public: // Binary Operators //===--------------------------------------------------------------------===// - Instruction *CreateAdd(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateAdd(LHS, RHS); + Instruction *CreateAdd(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + BinaryOperator *BO = BinaryOperator::CreateAdd(LHS, RHS); + if (HasNUW) BO->setHasNoUnsignedWrap(); + if (HasNSW) BO->setHasNoSignedWrap(); + return BO; } Instruction *CreateNSWAdd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNSWAdd(LHS, RHS); @@ -50,8 +54,12 @@ public: Instruction *CreateFAdd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFAdd(LHS, RHS); } - Instruction *CreateSub(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateSub(LHS, RHS); + Instruction *CreateSub(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + BinaryOperator *BO = BinaryOperator::CreateSub(LHS, RHS); + if (HasNUW) BO->setHasNoUnsignedWrap(); + if (HasNSW) BO->setHasNoSignedWrap(); + return BO; } Instruction *CreateNSWSub(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNSWSub(LHS, RHS); @@ -62,8 +70,12 @@ public: Instruction *CreateFSub(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFSub(LHS, RHS); } - Instruction *CreateMul(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateMul(LHS, RHS); + Instruction *CreateMul(Constant *LHS, Constant *RHS, + bool HasNUW = false, bool HasNSW = false) const { + BinaryOperator *BO = BinaryOperator::CreateMul(LHS, RHS); + if (HasNUW) BO->setHasNoUnsignedWrap(); + if (HasNSW) BO->setHasNoSignedWrap(); + return BO; } Instruction *CreateNSWMul(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateNSWMul(LHS, RHS); @@ -74,14 +86,20 @@ public: Instruction *CreateFMul(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFMul(LHS, RHS); } - Instruction *CreateUDiv(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateUDiv(LHS, RHS); + Instruction *CreateUDiv(Constant *LHS, Constant *RHS, + bool isExact = false) const { + if (!isExact) + return BinaryOperator::CreateUDiv(LHS, RHS); + return BinaryOperator::CreateExactUDiv(LHS, RHS); } Instruction *CreateExactUDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateExactUDiv(LHS, RHS); } - Instruction *CreateSDiv(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateSDiv(LHS, RHS); + Instruction *CreateSDiv(Constant *LHS, Constant *RHS, + bool isExact = false) const { + if (!isExact) + return BinaryOperator::CreateSDiv(LHS, RHS); + return BinaryOperator::CreateExactSDiv(LHS, RHS); } Instruction *CreateExactSDiv(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateExactSDiv(LHS, RHS); @@ -98,14 +116,24 @@ public: Instruction *CreateFRem(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateFRem(LHS, RHS); } - Instruction *CreateShl(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateShl(LHS, RHS); - } - Instruction *CreateLShr(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateLShr(LHS, RHS); - } - Instruction *CreateAShr(Constant *LHS, Constant *RHS) const { - return BinaryOperator::CreateAShr(LHS, RHS); + Instruction *CreateShl(Constant *LHS, Constant *RHS, bool HasNUW = false, + bool HasNSW = false) const { + BinaryOperator *BO = BinaryOperator::CreateShl(LHS, RHS); + if (HasNUW) BO->setHasNoUnsignedWrap(); + if (HasNSW) BO->setHasNoSignedWrap(); + return BO; + } + Instruction *CreateLShr(Constant *LHS, Constant *RHS, + bool isExact = false) const { + if (!isExact) + return BinaryOperator::CreateLShr(LHS, RHS); + return BinaryOperator::CreateExactLShr(LHS, RHS); + } + Instruction *CreateAShr(Constant *LHS, Constant *RHS, + bool isExact = false) const { + if (!isExact) + return BinaryOperator::CreateAShr(LHS, RHS); + return BinaryOperator::CreateExactAShr(LHS, RHS); } Instruction *CreateAnd(Constant *LHS, Constant *RHS) const { return BinaryOperator::CreateAnd(LHS, RHS); @@ -126,8 +154,12 @@ public: // Unary Operators //===--------------------------------------------------------------------===// - Instruction *CreateNeg(Constant *C) const { - return BinaryOperator::CreateNeg(C); + Instruction *CreateNeg(Constant *C, + bool HasNUW = false, bool HasNSW = false) const { + BinaryOperator *BO = BinaryOperator::CreateNeg(C); + if (HasNUW) BO->setHasNoUnsignedWrap(); + if (HasNSW) BO->setHasNoSignedWrap(); + return BO; } Instruction *CreateNSWNeg(Constant *C) const { return BinaryOperator::CreateNSWNeg(C); diff --git a/include/llvm/Support/PathV1.h b/include/llvm/Support/PathV1.h index a1c3f6a49a190..d7753a3e71e79 100644 --- a/include/llvm/Support/PathV1.h +++ b/include/llvm/Support/PathV1.h @@ -312,9 +312,9 @@ namespace sys { /// This function determines if the path name is absolute, as opposed to /// relative. /// @brief Determine if the path is absolute. -//FIXME: LLVM_ATTRIBUTE_DEPRECATED( - bool isAbsolute() const; -//FIXME: LLVMV_PATH_DEPRECATED_MSG(path::is_absolute)); + LLVM_ATTRIBUTE_DEPRECATED( + bool isAbsolute() const, + LLVM_PATH_DEPRECATED_MSG(path::is_absolute)); /// This function determines if the path name is absolute, as opposed to /// relative. diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 5141b7b562297..ba7574dfdbd74 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -111,7 +111,7 @@ public: bool isBigEndian() const { return !IsLittleEndian; } bool isLittleEndian() const { return IsLittleEndian; } MVT getPointerTy() const { return PointerTy; } - MVT getShiftAmountTy() const { return ShiftAmountTy; } + virtual MVT getShiftAmountTy(EVT LHSTy) const; /// isSelectExpensive - Return true if the select operation is expensive for /// this target. @@ -210,7 +210,7 @@ public: /// ValueTypeActions - For each value type, keep a LegalizeAction enum /// that indicates how instruction selection should deal with the type. uint8_t ValueTypeActions[MVT::LAST_VALUETYPE]; - + LegalizeAction getExtendedTypeAction(EVT VT) const { // Handle non-vector integers. if (!VT.isVector()) { @@ -221,42 +221,56 @@ public: return Promote; return Expand; } - - // If this is a type smaller than a legal vector type, promote to that - // type, e.g. <2 x float> -> <4 x float>. - if (VT.getVectorElementType().isSimple() && - VT.getVectorNumElements() != 1) { - MVT EltType = VT.getVectorElementType().getSimpleVT(); - unsigned NumElts = VT.getVectorNumElements(); - while (1) { - // Round up to the nearest power of 2. - NumElts = (unsigned)NextPowerOf2(NumElts); - - MVT LargerVector = MVT::getVectorVT(EltType, NumElts); - if (LargerVector == MVT()) break; - - // If this the larger type is legal, promote to it. - if (getTypeAction(LargerVector) == Legal) return Promote; - } + + // Vectors with only one element are always scalarized. + if (VT.getVectorNumElements() == 1) + return Expand; + + // Vectors with a number of elements that is not a power of two are always + // widened, for example <3 x float> -> <4 x float>. + if (!VT.isPow2VectorType()) + return Promote; + + // Vectors with a crazy element type are always expanded, for example + // <4 x i2> is expanded into two vectors of type <2 x i2>. + if (!VT.getVectorElementType().isSimple()) + return Expand; + + // If this type is smaller than a legal vector type then widen it, + // otherwise expand it. E.g. <2 x float> -> <4 x float>. + MVT EltType = VT.getVectorElementType().getSimpleVT(); + unsigned NumElts = VT.getVectorNumElements(); + while (1) { + // Round up to the next power of 2. + NumElts = (unsigned)NextPowerOf2(NumElts); + + // If there is no simple vector type with this many elements then there + // cannot be a larger legal vector type. Note that this assumes that + // there are no skipped intermediate vector types in the simple types. + MVT LargerVector = MVT::getVectorVT(EltType, NumElts); + if (LargerVector == MVT()) + return Expand; + + // If this type is legal then widen the vector. + if (getTypeAction(LargerVector) == Legal) + return Promote; } - - return VT.isPow2VectorType() ? Expand : Promote; - } + } public: ValueTypeActionImpl() { std::fill(ValueTypeActions, array_endof(ValueTypeActions), 0); } - + LegalizeAction getTypeAction(EVT VT) const { if (!VT.isExtended()) return getTypeAction(VT.getSimpleVT()); return getExtendedTypeAction(VT); } - + LegalizeAction getTypeAction(MVT VT) const { return (LegalizeAction)ValueTypeActions[VT.SimpleTy]; } - + void setTypeAction(EVT VT, LegalizeAction Action) { unsigned I = VT.getSimpleVT().SimpleTy; ValueTypeActions[I] = Action; @@ -277,7 +291,7 @@ public: LegalizeAction getTypeAction(MVT VT) const { return ValueTypeActions.getTypeAction(VT); } - + /// getTypeToTransformTo - For types supported by the target, this is an /// identity function. For types that must be promoted to larger types, this /// returns the larger type to promote to. For integer types that are larger @@ -310,7 +324,7 @@ public: EVT NVT = VT.getRoundIntegerType(Context); if (NVT == VT) // Size is a power of two - expand to half the size. return EVT::getIntegerVT(Context, VT.getSizeInBits() / 2); - + // Promote to a power of two size, avoiding multi-step promotion. return getTypeAction(NVT) == Promote ? getTypeToTransformTo(Context, NVT) : NVT; @@ -983,10 +997,6 @@ public: // protected: - /// setShiftAmountType - Describe the type that should be used for shift - /// amounts. This type defaults to the pointer type. - void setShiftAmountType(MVT VT) { ShiftAmountTy = VT; } - /// setBooleanContents - Specify how the target extends the result of a /// boolean value from i1 to a wider type. See getBooleanContents. void setBooleanContents(BooleanContent Ty) { BooleanContents = Ty; } @@ -1033,12 +1043,12 @@ protected: /// SelectIsExpensive - Tells the code generator not to expand operations /// into sequences that use the select operations if possible. - void setSelectIsExpensive(bool isExpensive = true) { - SelectIsExpensive = isExpensive; + void setSelectIsExpensive(bool isExpensive = true) { + SelectIsExpensive = isExpensive; } - /// JumpIsExpensive - Tells the code generator not to expand sequence of - /// operations into a seperate sequences that increases the amount of + /// JumpIsExpensive - Tells the code generator not to expand sequence of + /// operations into a seperate sequences that increases the amount of /// flow control. void setJumpIsExpensive(bool isExpensive = true) { JumpIsExpensive = isExpensive; @@ -1355,7 +1365,7 @@ public: CW_Good = 1, // Good weight. CW_Better = 2, // Better weight. CW_Best = 3, // Best weight. - + // Well-known weights. CW_SpecificReg = CW_Okay, // Specific register operands. CW_Register = CW_Good, // Register operands. @@ -1408,21 +1418,21 @@ public: CallOperandVal(0), ConstraintVT(MVT::Other) { } }; - + typedef std::vector AsmOperandInfoVector; - + /// ParseConstraints - Split up the constraint string from the inline /// assembly value into the specific constraints and their prefixes, /// and also tie in the associated operand values. /// If this returns an empty vector, and if the constraint string itself /// isn't empty, there was an error parsing. virtual AsmOperandInfoVector ParseConstraints(ImmutableCallSite CS) const; - + /// Examine constraint type and operand type and determine a weight value. /// The operand object must already have been set up with the operand type. virtual ConstraintWeight getMultipleConstraintMatchWeight( AsmOperandInfo &info, int maIndex) const; - + /// Examine constraint string and operand type and determine a weight value. /// The operand object must already have been set up with the operand type. virtual ConstraintWeight getSingleConstraintMatchWeight( @@ -1432,7 +1442,7 @@ public: /// type to use for the specific AsmOperandInfo, setting /// OpInfo.ConstraintCode and OpInfo.ConstraintType. If the actual operand /// being passed in is available, it can be passed in as Op, otherwise an - /// empty SDValue can be passed. + /// empty SDValue can be passed. virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo, SDValue Op, SelectionDAG *DAG = 0) const; @@ -1646,10 +1656,6 @@ private: /// llvm.longjmp. Defaults to false. bool UseUnderscoreLongJmp; - /// ShiftAmountTy - The type to use for shift amounts, usually i8 or whatever - /// PointerTy is. - MVT ShiftAmountTy; - /// BooleanContents - Information about the contents of the high-bits in /// boolean values held in a type wider than i1. See getBooleanContents. BooleanContent BooleanContents; diff --git a/include/llvm/Transforms/Utils/Local.h b/include/llvm/Transforms/Utils/Local.h index 26b5dd8365f19..2823fbb71997e 100644 --- a/include/llvm/Transforms/Utils/Local.h +++ b/include/llvm/Transforms/Utils/Local.h @@ -60,7 +60,7 @@ bool RecursivelyDeleteTriviallyDeadInstructions(Value *V); /// dead PHI node, due to being a def-use chain of single-use nodes that /// either forms a cycle or is terminated by a trivially dead instruction, /// delete it. If that makes any of its operands trivially dead, delete them -/// too, recursively. Return true if the PHI node is actually deleted. +/// too, recursively. Return true if a change was made. bool RecursivelyDeleteDeadPHINode(PHINode *PN); diff --git a/lib/Analysis/DIBuilder.cpp b/lib/Analysis/DIBuilder.cpp index c1072df729252..590a9c17a8fa2 100644 --- a/lib/Analysis/DIBuilder.cpp +++ b/lib/Analysis/DIBuilder.cpp @@ -31,9 +31,9 @@ static Constant *GetTagConstant(LLVMContext &VMContext, unsigned Tag) { DIBuilder::DIBuilder(Module &m) : M(m), VMContext(M.getContext()), TheCU(0), DeclareFn(0), ValueFn(0) {} -/// CreateCompileUnit - A CompileUnit provides an anchor for all debugging +/// createCompileUnit - A CompileUnit provides an anchor for all debugging /// information generated during this instance of compilation. -void DIBuilder::CreateCompileUnit(unsigned Lang, StringRef Filename, +void DIBuilder::createCompileUnit(unsigned Lang, StringRef Filename, StringRef Directory, StringRef Producer, bool isOptimized, StringRef Flags, unsigned RunTimeVer) { @@ -53,9 +53,9 @@ void DIBuilder::CreateCompileUnit(unsigned Lang, StringRef Filename, TheCU = DICompileUnit(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateFile - Create a file descriptor to hold debugging information +/// createFile - Create a file descriptor to hold debugging information /// for a file. -DIFile DIBuilder::CreateFile(StringRef Filename, StringRef Directory) { +DIFile DIBuilder::createFile(StringRef Filename, StringRef Directory) { assert(TheCU && "Unable to create DW_TAG_file_type without CompileUnit"); Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_file_type), @@ -66,8 +66,8 @@ DIFile DIBuilder::CreateFile(StringRef Filename, StringRef Directory) { return DIFile(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateEnumerator - Create a single enumerator value. -DIEnumerator DIBuilder::CreateEnumerator(StringRef Name, uint64_t Val) { +/// createEnumerator - Create a single enumerator value. +DIEnumerator DIBuilder::createEnumerator(StringRef Name, uint64_t Val) { Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_enumerator), MDString::get(VMContext, Name), @@ -76,9 +76,9 @@ DIEnumerator DIBuilder::CreateEnumerator(StringRef Name, uint64_t Val) { return DIEnumerator(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateBasicType - Create debugging information entry for a basic +/// createBasicType - Create debugging information entry for a basic /// type, e.g 'char'. -DIType DIBuilder::CreateBasicType(StringRef Name, uint64_t SizeInBits, +DIType DIBuilder::createBasicType(StringRef Name, uint64_t SizeInBits, uint64_t AlignInBits, unsigned Encoding) { // Basic types are encoded in DIBasicType format. Line number, filename, @@ -98,9 +98,9 @@ DIType DIBuilder::CreateBasicType(StringRef Name, uint64_t SizeInBits, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateQaulifiedType - Create debugging information entry for a qualified +/// createQaulifiedType - Create debugging information entry for a qualified /// type, e.g. 'const int'. -DIType DIBuilder::CreateQualifiedType(unsigned Tag, DIType FromTy) { +DIType DIBuilder::createQualifiedType(unsigned Tag, DIType FromTy) { // Qualified types are encoded in DIDerivedType format. Value *Elts[] = { GetTagConstant(VMContext, Tag), @@ -117,8 +117,8 @@ DIType DIBuilder::CreateQualifiedType(unsigned Tag, DIType FromTy) { return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreatePointerType - Create debugging information entry for a pointer. -DIType DIBuilder::CreatePointerType(DIType PointeeTy, uint64_t SizeInBits, +/// createPointerType - Create debugging information entry for a pointer. +DIType DIBuilder::createPointerType(DIType PointeeTy, uint64_t SizeInBits, uint64_t AlignInBits, StringRef Name) { // Pointer types are encoded in DIDerivedType format. Value *Elts[] = { @@ -136,8 +136,8 @@ DIType DIBuilder::CreatePointerType(DIType PointeeTy, uint64_t SizeInBits, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateReferenceType - Create debugging information entry for a reference. -DIType DIBuilder::CreateReferenceType(DIType RTy) { +/// createReferenceType - Create debugging information entry for a reference. +DIType DIBuilder::createReferenceType(DIType RTy) { // References are encoded in DIDerivedType format. Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_reference_type), @@ -154,8 +154,8 @@ DIType DIBuilder::CreateReferenceType(DIType RTy) { return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateTypedef - Create debugging information entry for a typedef. -DIType DIBuilder::CreateTypedef(DIType Ty, StringRef Name, DIFile File, +/// createTypedef - Create debugging information entry for a typedef. +DIType DIBuilder::createTypedef(DIType Ty, StringRef Name, DIFile File, unsigned LineNo) { // typedefs are encoded in DIDerivedType format. assert(Ty.Verify() && "Invalid typedef type!"); @@ -174,8 +174,8 @@ DIType DIBuilder::CreateTypedef(DIType Ty, StringRef Name, DIFile File, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateFriend - Create debugging information entry for a 'friend'. -DIType DIBuilder::CreateFriend(DIType Ty, DIType FriendTy) { +/// createFriend - Create debugging information entry for a 'friend'. +DIType DIBuilder::createFriend(DIType Ty, DIType FriendTy) { // typedefs are encoded in DIDerivedType format. assert(Ty.Verify() && "Invalid type!"); assert(FriendTy.Verify() && "Invalid friend type!"); @@ -194,9 +194,9 @@ DIType DIBuilder::CreateFriend(DIType Ty, DIType FriendTy) { return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateInheritance - Create debugging information entry to establish +/// createInheritance - Create debugging information entry to establish /// inheritnace relationship between two types. -DIType DIBuilder::CreateInheritance(DIType Ty, DIType BaseTy, +DIType DIBuilder::createInheritance(DIType Ty, DIType BaseTy, uint64_t BaseOffset, unsigned Flags) { // TAG_inheritance is encoded in DIDerivedType format. Value *Elts[] = { @@ -214,8 +214,8 @@ DIType DIBuilder::CreateInheritance(DIType Ty, DIType BaseTy, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateMemberType - Create debugging information entry for a member. -DIType DIBuilder::CreateMemberType(StringRef Name, +/// createMemberType - Create debugging information entry for a member. +DIType DIBuilder::createMemberType(StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, uint64_t OffsetInBits, unsigned Flags, @@ -236,8 +236,8 @@ DIType DIBuilder::CreateMemberType(StringRef Name, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateClassType - Create debugging information entry for a class. -DIType DIBuilder::CreateClassType(DIDescriptor Context, StringRef Name, +/// createClassType - Create debugging information entry for a class. +DIType DIBuilder::createClassType(DIDescriptor Context, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, uint64_t OffsetInBits, unsigned Flags, @@ -263,10 +263,10 @@ DIType DIBuilder::CreateClassType(DIDescriptor Context, StringRef Name, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateTemplateTypeParameter - Create debugging information for template +/// createTemplateTypeParameter - Create debugging information for template /// type parameter. DITemplateTypeParameter -DIBuilder::CreateTemplateTypeParameter(DIDescriptor Context, StringRef Name, +DIBuilder::createTemplateTypeParameter(DIDescriptor Context, StringRef Name, DIType Ty, MDNode *File, unsigned LineNo, unsigned ColumnNo) { Value *Elts[] = { @@ -282,10 +282,10 @@ DIBuilder::CreateTemplateTypeParameter(DIDescriptor Context, StringRef Name, array_lengthof(Elts))); } -/// CreateTemplateValueParameter - Create debugging information for template +/// createTemplateValueParameter - Create debugging information for template /// value parameter. DITemplateValueParameter -DIBuilder::CreateTemplateValueParameter(DIDescriptor Context, StringRef Name, +DIBuilder::createTemplateValueParameter(DIDescriptor Context, StringRef Name, DIType Ty, uint64_t Val, MDNode *File, unsigned LineNo, unsigned ColumnNo) { @@ -303,8 +303,8 @@ DIBuilder::CreateTemplateValueParameter(DIDescriptor Context, StringRef Name, array_lengthof(Elts))); } -/// CreateStructType - Create debugging information entry for a struct. -DIType DIBuilder::CreateStructType(DIDescriptor Context, StringRef Name, +/// createStructType - Create debugging information entry for a struct. +DIType DIBuilder::createStructType(DIDescriptor Context, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, unsigned Flags, DIArray Elements, @@ -328,8 +328,8 @@ DIType DIBuilder::CreateStructType(DIDescriptor Context, StringRef Name, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateUnionType - Create debugging information entry for an union. -DIType DIBuilder::CreateUnionType(DIDescriptor Scope, StringRef Name, +/// createUnionType - Create debugging information entry for an union. +DIType DIBuilder::createUnionType(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, unsigned Flags, @@ -353,8 +353,8 @@ DIType DIBuilder::CreateUnionType(DIDescriptor Scope, StringRef Name, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateSubroutineType - Create subroutine type. -DIType DIBuilder::CreateSubroutineType(DIFile File, DIArray ParameterTypes) { +/// createSubroutineType - Create subroutine type. +DIType DIBuilder::createSubroutineType(DIFile File, DIArray ParameterTypes) { // TAG_subroutine_type is encoded in DICompositeType format. Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_subroutine_type), @@ -374,9 +374,9 @@ DIType DIBuilder::CreateSubroutineType(DIFile File, DIArray ParameterTypes) { return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateEnumerationType - Create debugging information entry for an +/// createEnumerationType - Create debugging information entry for an /// enumeration. -DIType DIBuilder::CreateEnumerationType(DIDescriptor Scope, StringRef Name, +DIType DIBuilder::createEnumerationType(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNumber, uint64_t SizeInBits, uint64_t AlignInBits, DIArray Elements) { @@ -402,8 +402,8 @@ DIType DIBuilder::CreateEnumerationType(DIDescriptor Scope, StringRef Name, return DIType(Node); } -/// CreateArrayType - Create debugging information entry for an array. -DIType DIBuilder::CreateArrayType(uint64_t Size, uint64_t AlignInBits, +/// createArrayType - Create debugging information entry for an array. +DIType DIBuilder::createArrayType(uint64_t Size, uint64_t AlignInBits, DIType Ty, DIArray Subscripts) { // TAG_array_type is encoded in DICompositeType format. Value *Elts[] = { @@ -424,8 +424,8 @@ DIType DIBuilder::CreateArrayType(uint64_t Size, uint64_t AlignInBits, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateVectorType - Create debugging information entry for a vector. -DIType DIBuilder::CreateVectorType(uint64_t Size, uint64_t AlignInBits, +/// createVectorType - Create debugging information entry for a vector. +DIType DIBuilder::createVectorType(uint64_t Size, uint64_t AlignInBits, DIType Ty, DIArray Subscripts) { // TAG_vector_type is encoded in DICompositeType format. Value *Elts[] = { @@ -446,8 +446,8 @@ DIType DIBuilder::CreateVectorType(uint64_t Size, uint64_t AlignInBits, return DIType(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// CreateArtificialType - Create a new DIType with "artificial" flag set. -DIType DIBuilder::CreateArtificialType(DIType Ty) { +/// createArtificialType - Create a new DIType with "artificial" flag set. +DIType DIBuilder::createArtificialType(DIType Ty) { if (Ty.isArtificial()) return Ty; @@ -470,24 +470,24 @@ DIType DIBuilder::CreateArtificialType(DIType Ty) { return DIType(MDNode::get(VMContext, Elts.data(), Elts.size())); } -/// RetainType - Retain DIType in a module even if it is not referenced +/// retainType - Retain DIType in a module even if it is not referenced /// through debug info anchors. -void DIBuilder::RetainType(DIType T) { +void DIBuilder::retainType(DIType T) { NamedMDNode *NMD = M.getOrInsertNamedMetadata("llvm.dbg.ty"); NMD->addOperand(T); } -/// CreateUnspecifiedParameter - Create unspeicified type descriptor +/// createUnspecifiedParameter - Create unspeicified type descriptor /// for the subroutine type. -DIDescriptor DIBuilder::CreateUnspecifiedParameter() { +DIDescriptor DIBuilder::createUnspecifiedParameter() { Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_unspecified_parameters) }; return DIDescriptor(MDNode::get(VMContext, &Elts[0], 1)); } -/// CreateTemporaryType - Create a temporary forward-declared type. -DIType DIBuilder::CreateTemporaryType() { +/// createTemporaryType - Create a temporary forward-declared type. +DIType DIBuilder::createTemporaryType() { // Give the temporary MDNode a tag. It doesn't matter what tag we // use here as long as DIType accepts it. Value *Elts[] = { GetTagConstant(VMContext, DW_TAG_base_type) }; @@ -495,8 +495,8 @@ DIType DIBuilder::CreateTemporaryType() { return DIType(Node); } -/// CreateTemporaryType - Create a temporary forward-declared type. -DIType DIBuilder::CreateTemporaryType(DIFile F) { +/// createTemporaryType - Create a temporary forward-declared type. +DIType DIBuilder::createTemporaryType(DIFile F) { // Give the temporary MDNode a tag. It doesn't matter what tag we // use here as long as DIType accepts it. Value *Elts[] = { @@ -509,8 +509,8 @@ DIType DIBuilder::CreateTemporaryType(DIFile F) { return DIType(Node); } -/// GetOrCreateArray - Get a DIArray, create one if required. -DIArray DIBuilder::GetOrCreateArray(Value *const *Elements, unsigned NumElements) { +/// getOrCreateArray - Get a DIArray, create one if required. +DIArray DIBuilder::getOrCreateArray(Value *const *Elements, unsigned NumElements) { if (NumElements == 0) { Value *Null = llvm::Constant::getNullValue(Type::getInt32Ty(VMContext)); return DIArray(MDNode::get(VMContext, &Null, 1)); @@ -518,9 +518,9 @@ DIArray DIBuilder::GetOrCreateArray(Value *const *Elements, unsigned NumElements return DIArray(MDNode::get(VMContext, Elements, NumElements)); } -/// GetOrCreateSubrange - Create a descriptor for a value range. This +/// getOrCreateSubrange - Create a descriptor for a value range. This /// implicitly uniques the values returned. -DISubrange DIBuilder::GetOrCreateSubrange(int64_t Lo, int64_t Hi) { +DISubrange DIBuilder::getOrCreateSubrange(int64_t Lo, int64_t Hi) { Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_subrange_type), ConstantInt::get(Type::getInt64Ty(VMContext), Lo), @@ -530,9 +530,9 @@ DISubrange DIBuilder::GetOrCreateSubrange(int64_t Lo, int64_t Hi) { return DISubrange(MDNode::get(VMContext, &Elts[0], 3)); } -/// CreateGlobalVariable - Create a new descriptor for the specified global. +/// createGlobalVariable - Create a new descriptor for the specified global. DIGlobalVariable DIBuilder:: -CreateGlobalVariable(StringRef Name, DIFile F, unsigned LineNumber, +createGlobalVariable(StringRef Name, DIFile F, unsigned LineNumber, DIType Ty, bool isLocalToUnit, llvm::Value *Val) { Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_variable), @@ -555,10 +555,10 @@ CreateGlobalVariable(StringRef Name, DIFile F, unsigned LineNumber, return DIGlobalVariable(Node); } -/// CreateStaticVariable - Create a new descriptor for the specified static +/// createStaticVariable - Create a new descriptor for the specified static /// variable. DIGlobalVariable DIBuilder:: -CreateStaticVariable(DIDescriptor Context, StringRef Name, +createStaticVariable(DIDescriptor Context, StringRef Name, StringRef LinkageName, DIFile F, unsigned LineNumber, DIType Ty, bool isLocalToUnit, llvm::Value *Val) { Value *Elts[] = { @@ -582,8 +582,8 @@ CreateStaticVariable(DIDescriptor Context, StringRef Name, return DIGlobalVariable(Node); } -/// CreateVariable - Create a new descriptor for the specified variable. -DIVariable DIBuilder::CreateLocalVariable(unsigned Tag, DIDescriptor Scope, +/// createVariable - Create a new descriptor for the specified variable. +DIVariable DIBuilder::createLocalVariable(unsigned Tag, DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNo, DIType Ty, bool AlwaysPreserve, unsigned Flags) { @@ -614,9 +614,9 @@ DIVariable DIBuilder::CreateLocalVariable(unsigned Tag, DIDescriptor Scope, return DIVariable(Node); } -/// CreateComplexVariable - Create a new descriptor for the specified variable +/// createComplexVariable - Create a new descriptor for the specified variable /// which has a complex address expression for its address. -DIVariable DIBuilder::CreateComplexVariable(unsigned Tag, DIDescriptor Scope, +DIVariable DIBuilder::createComplexVariable(unsigned Tag, DIDescriptor Scope, StringRef Name, DIFile F, unsigned LineNo, DIType Ty, Value *const *Addr, @@ -633,8 +633,8 @@ DIVariable DIBuilder::CreateComplexVariable(unsigned Tag, DIDescriptor Scope, return DIVariable(MDNode::get(VMContext, Elts.data(), Elts.size())); } -/// CreateFunction - Create a new descriptor for the specified function. -DISubprogram DIBuilder::CreateFunction(DIDescriptor Context, +/// createFunction - Create a new descriptor for the specified function. +DISubprogram DIBuilder::createFunction(DIDescriptor Context, StringRef Name, StringRef LinkageName, DIFile File, unsigned LineNo, @@ -670,8 +670,8 @@ DISubprogram DIBuilder::CreateFunction(DIDescriptor Context, return DISubprogram(Node); } -/// CreateMethod - Create a new descriptor for the specified C++ method. -DISubprogram DIBuilder::CreateMethod(DIDescriptor Context, +/// createMethod - Create a new descriptor for the specified C++ method. +DISubprogram DIBuilder::createMethod(DIDescriptor Context, StringRef Name, StringRef LinkageName, DIFile F, @@ -710,9 +710,9 @@ DISubprogram DIBuilder::CreateMethod(DIDescriptor Context, return DISubprogram(Node); } -/// CreateNameSpace - This creates new descriptor for a namespace +/// createNameSpace - This creates new descriptor for a namespace /// with the specified parent scope. -DINameSpace DIBuilder::CreateNameSpace(DIDescriptor Scope, StringRef Name, +DINameSpace DIBuilder::createNameSpace(DIDescriptor Scope, StringRef Name, DIFile File, unsigned LineNo) { Value *Elts[] = { GetTagConstant(VMContext, dwarf::DW_TAG_namespace), @@ -724,7 +724,7 @@ DINameSpace DIBuilder::CreateNameSpace(DIDescriptor Scope, StringRef Name, return DINameSpace(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -DILexicalBlock DIBuilder::CreateLexicalBlock(DIDescriptor Scope, DIFile File, +DILexicalBlock DIBuilder::createLexicalBlock(DIDescriptor Scope, DIFile File, unsigned Line, unsigned Col) { // Defeat MDNode uniqing for lexical blocks by using unique id. static unsigned int unique_id = 0; @@ -739,8 +739,8 @@ DILexicalBlock DIBuilder::CreateLexicalBlock(DIDescriptor Scope, DIFile File, return DILexicalBlock(MDNode::get(VMContext, &Elts[0], array_lengthof(Elts))); } -/// InsertDeclare - Insert a new llvm.dbg.declare intrinsic call. -Instruction *DIBuilder::InsertDeclare(Value *Storage, DIVariable VarInfo, +/// insertDeclare - Insert a new llvm.dbg.declare intrinsic call. +Instruction *DIBuilder::insertDeclare(Value *Storage, DIVariable VarInfo, Instruction *InsertBefore) { assert(Storage && "no storage passed to dbg.declare"); assert(VarInfo.Verify() && "empty DIVariable passed to dbg.declare"); @@ -751,8 +751,8 @@ Instruction *DIBuilder::InsertDeclare(Value *Storage, DIVariable VarInfo, return CallInst::Create(DeclareFn, Args, Args+2, "", InsertBefore); } -/// InsertDeclare - Insert a new llvm.dbg.declare intrinsic call. -Instruction *DIBuilder::InsertDeclare(Value *Storage, DIVariable VarInfo, +/// insertDeclare - Insert a new llvm.dbg.declare intrinsic call. +Instruction *DIBuilder::insertDeclare(Value *Storage, DIVariable VarInfo, BasicBlock *InsertAtEnd) { assert(Storage && "no storage passed to dbg.declare"); assert(VarInfo.Verify() && "invalid DIVariable passed to dbg.declare"); @@ -769,8 +769,8 @@ Instruction *DIBuilder::InsertDeclare(Value *Storage, DIVariable VarInfo, return CallInst::Create(DeclareFn, Args, Args+2, "", InsertAtEnd); } -/// InsertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. -Instruction *DIBuilder::InsertDbgValueIntrinsic(Value *V, uint64_t Offset, +/// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. +Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset, DIVariable VarInfo, Instruction *InsertBefore) { assert(V && "no value passed to dbg.value"); @@ -784,8 +784,8 @@ Instruction *DIBuilder::InsertDbgValueIntrinsic(Value *V, uint64_t Offset, return CallInst::Create(ValueFn, Args, Args+3, "", InsertBefore); } -/// InsertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. -Instruction *DIBuilder::InsertDbgValueIntrinsic(Value *V, uint64_t Offset, +/// insertDbgValueIntrinsic - Insert a new llvm.dbg.value intrinsic call. +Instruction *DIBuilder::insertDbgValueIntrinsic(Value *V, uint64_t Offset, DIVariable VarInfo, BasicBlock *InsertAtEnd) { assert(V && "no value passed to dbg.value"); diff --git a/lib/Analysis/InstructionSimplify.cpp b/lib/Analysis/InstructionSimplify.cpp index a2f9862383fd8..982dacb50bfc4 100644 --- a/lib/Analysis/InstructionSimplify.cpp +++ b/lib/Analysis/InstructionSimplify.cpp @@ -1161,6 +1161,16 @@ static Value *SimplifyOrInst(Value *Op0, Value *Op1, const TargetData *TD, (A == Op0 || B == Op0)) return Op0; + // ~(A & ?) | A = -1 + if (match(Op0, m_Not(m_And(m_Value(A), m_Value(B)))) && + (A == Op1 || B == Op1)) + return Constant::getAllOnesValue(Op1->getType()); + + // A | ~(A & ?) = -1 + if (match(Op1, m_Not(m_And(m_Value(A), m_Value(B)))) && + (A == Op0 || B == Op0)) + return Constant::getAllOnesValue(Op0->getType()); + // Try some generic simplifications for associative operations. if (Value *V = SimplifyAssociativeBinOp(Instruction::Or, Op0, Op1, TD, DT, MaxRecurse)) diff --git a/lib/CodeGen/AllocationOrder.h b/lib/CodeGen/AllocationOrder.h index 3db4b6925fca8..61fd8f881a8c7 100644 --- a/lib/CodeGen/AllocationOrder.h +++ b/lib/CodeGen/AllocationOrder.h @@ -47,6 +47,8 @@ public: /// rewind - Start over from the beginning. void rewind() { Pos = 0; } + /// isHint - Return true if PhysReg is a preferred register. + bool isHint(unsigned PhysReg) const { return PhysReg == Hint; } }; } // end namespace llvm diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 43e8990a9da1e..9cb882e6a1bb2 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -764,7 +764,7 @@ bool AsmPrinter::doFinalization(Module &M) { continue; MCSymbol *Name = Mang->getSymbol(&F); - EmitVisibility(Name, V); + EmitVisibility(Name, V, false); } // Finalize debug and EH information. @@ -1820,13 +1820,17 @@ void AsmPrinter::EmitBasicBlockStart(const MachineBasicBlock *MBB) const { } } -void AsmPrinter::EmitVisibility(MCSymbol *Sym, unsigned Visibility) const { +void AsmPrinter::EmitVisibility(MCSymbol *Sym, unsigned Visibility, + bool IsDefinition) const { MCSymbolAttr Attr = MCSA_Invalid; switch (Visibility) { default: break; case GlobalValue::HiddenVisibility: - Attr = MAI->getHiddenVisibilityAttr(); + if (IsDefinition) + Attr = MAI->getHiddenVisibilityAttr(); + else + Attr = MAI->getHiddenDeclarationVisibilityAttr(); break; case GlobalValue::ProtectedVisibility: Attr = MAI->getProtectedVisibilityAttr(); diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp index 5106d5778c29d..780fa405ef512 100644 --- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp +++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp @@ -31,6 +31,7 @@ #include "llvm/Target/TargetRegisterInfo.h" #include "llvm/Target/TargetOptions.h" #include "llvm/Analysis/DebugInfo.h" +#include "llvm/Analysis/DIBuilder.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringExtras.h" @@ -644,12 +645,12 @@ void DwarfDebug::addComplexAddress(DbgVariable *&DV, DIE *Die, for (unsigned i = 0, N = DV->getNumAddrElements(); i < N; ++i) { uint64_t Element = DV->getAddrElement(i); - if (Element == DIFactory::OpPlus) { + if (Element == DIBuilder::OpPlus) { addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_plus_uconst); addUInt(Block, 0, dwarf::DW_FORM_udata, DV->getAddrElement(++i)); - } else if (Element == DIFactory::OpDeref) { + } else if (Element == DIBuilder::OpDeref) { addUInt(Block, 0, dwarf::DW_FORM_data1, dwarf::DW_OP_deref); - } else llvm_unreachable("unknown DIFactory Opcode"); + } else llvm_unreachable("unknown DIBuilder Opcode"); } // Now attach the location information to the DIE. @@ -1894,7 +1895,7 @@ void DwarfDebug::constructCompileUnit(const MDNode *N) { DIE *Die = new DIE(dwarf::DW_TAG_compile_unit); addString(Die, dwarf::DW_AT_producer, dwarf::DW_FORM_string, DIUnit.getProducer()); - addUInt(Die, dwarf::DW_AT_language, dwarf::DW_FORM_data1, + addUInt(Die, dwarf::DW_AT_language, dwarf::DW_FORM_data2, DIUnit.getLanguage()); addString(Die, dwarf::DW_AT_name, dwarf::DW_FORM_string, FN); // Use DW_AT_entry_pc instead of DW_AT_low_pc/DW_AT_high_pc pair. This diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp index cb81aa3c88ce6..78a87431feaa6 100644 --- a/lib/CodeGen/BranchFolding.cpp +++ b/lib/CodeGen/BranchFolding.cpp @@ -501,10 +501,11 @@ static bool ProfitableToMerge(MachineBasicBlock *MBB1, MachineBasicBlock *SuccBB, MachineBasicBlock *PredBB) { CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2); - MachineFunction *MF = MBB1->getParent(); - if (CommonTailLen == 0) return false; + DEBUG(dbgs() << "Common tail length of BB#" << MBB1->getNumber() + << " and BB#" << MBB2->getNumber() << " is " << CommonTailLen + << '\n'); // It's almost always profitable to merge any number of non-terminator // instructions with the block that falls through into the common successor. @@ -541,6 +542,7 @@ static bool ProfitableToMerge(MachineBasicBlock *MBB1, // we don't have to split a block. At worst we will be introducing 1 new // branch instruction, which is likely to be smaller than the 2 // instructions that would be deleted in the merge. + MachineFunction *MF = MBB1->getParent(); if (EffectiveTailLen >= 2 && MF->getFunction()->hasFnAttr(Attribute::OptimizeForSize) && (I1 == MBB1->begin() || I2 == MBB2->begin())) diff --git a/lib/CodeGen/InlineSpiller.cpp b/lib/CodeGen/InlineSpiller.cpp index a1bd972d38e25..38e6c8590269d 100644 --- a/lib/CodeGen/InlineSpiller.cpp +++ b/lib/CodeGen/InlineSpiller.cpp @@ -102,8 +102,7 @@ Spiller *createInlineSpiller(MachineFunctionPass &pass, } } -/// reMaterializeFor - Attempt to rematerialize edit_->getReg() before MI instead of -/// reloading it. +/// reMaterializeFor - Attempt to rematerialize before MI instead of reloading. bool InlineSpiller::reMaterializeFor(MachineBasicBlock::iterator MI) { SlotIndex UseIdx = lis_.getInstructionIndex(MI).getUseIndex(); VNInfo *OrigVNI = edit_->getParent().getVNInfoAt(UseIdx); @@ -346,7 +345,8 @@ void InlineSpiller::spill(LiveRangeEdit &edit) { && "Trying to spill a stack slot."); DEBUG(dbgs() << "Inline spilling " << mri_.getRegClass(edit.getReg())->getName() - << ':' << edit.getParent() << "\n"); + << ':' << edit.getParent() << "\nFrom original " + << PrintReg(vrm_.getOriginal(edit.getReg())) << '\n'); assert(edit.getParent().isSpillable() && "Attempting to spill already spilled value."); @@ -357,12 +357,20 @@ void InlineSpiller::spill(LiveRangeEdit &edit) { return; rc_ = mri_.getRegClass(edit.getReg()); - stackSlot_ = vrm_.assignVirt2StackSlot(edit_->getReg()); + + // Share a stack slot among all descendants of Orig. + unsigned Orig = vrm_.getOriginal(edit.getReg()); + stackSlot_ = vrm_.getStackSlot(Orig); + if (stackSlot_ == VirtRegMap::NO_STACK_SLOT) + stackSlot_ = vrm_.assignVirt2StackSlot(Orig); + + if (Orig != edit.getReg()) + vrm_.assignVirt2StackSlot(edit.getReg(), stackSlot_); // Update LiveStacks now that we are committed to spilling. LiveInterval &stacklvr = lss_.getOrCreateInterval(stackSlot_, rc_); - assert(stacklvr.empty() && "Just created stack slot not empty"); - stacklvr.getNextValue(SlotIndex(), 0, lss_.getVNInfoAllocator()); + if (!stacklvr.hasAtLeastOneValue()) + stacklvr.getNextValue(SlotIndex(), 0, lss_.getVNInfoAllocator()); stacklvr.MergeRangesInAsValue(edit_->getParent(), stacklvr.getValNumInfo(0)); // Iterate over instructions using register. diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp index ad1c537c1911a..7871ba9c17e49 100644 --- a/lib/CodeGen/LowerSubregs.cpp +++ b/lib/CodeGen/LowerSubregs.cpp @@ -37,7 +37,7 @@ namespace { public: static char ID; // Pass identification, replacement for typeid LowerSubregsInstructionPass() : MachineFunctionPass(ID) {} - + const char *getPassName() const { return "Subregister lowering instruction pass"; } @@ -64,8 +64,8 @@ namespace { char LowerSubregsInstructionPass::ID = 0; } -FunctionPass *llvm::createLowerSubregsPass() { - return new LowerSubregsInstructionPass(); +FunctionPass *llvm::createLowerSubregsPass() { + return new LowerSubregsInstructionPass(); } /// TransferDeadFlag - MI is a pseudo-instruction with DstReg dead, @@ -192,9 +192,9 @@ bool LowerSubregsInstructionPass::LowerCopy(MachineInstr *MI) { /// copies. /// bool LowerSubregsInstructionPass::runOnMachineFunction(MachineFunction &MF) { - DEBUG(dbgs() << "Machine Function\n" + DEBUG(dbgs() << "Machine Function\n" << "********** LOWERING SUBREG INSTRS **********\n" - << "********** Function: " + << "********** Function: " << MF.getFunction()->getName() << '\n'); TRI = MF.getTarget().getRegisterInfo(); TII = MF.getTarget().getInstrInfo(); diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index 85532407ca43c..d81e4a1d015f5 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -396,8 +396,7 @@ void MachineFunction::viewCFGOnly() const /// addLiveIn - Add the specified physical register as a live-in value and /// create a corresponding virtual register for it. unsigned MachineFunction::addLiveIn(unsigned PReg, - const TargetRegisterClass *RC, - DebugLoc DL) { + const TargetRegisterClass *RC) { MachineRegisterInfo &MRI = getRegInfo(); unsigned VReg = MRI.getLiveInVirtReg(PReg); if (VReg) { @@ -406,7 +405,6 @@ unsigned MachineFunction::addLiveIn(unsigned PReg, } VReg = MRI.createVirtualRegister(RC); MRI.addLiveIn(PReg, VReg); - MRI.addLiveInLoc(VReg, DL); return VReg; } @@ -646,6 +644,10 @@ MachineConstantPool::~MachineConstantPool() { for (unsigned i = 0, e = Constants.size(); i != e; ++i) if (Constants[i].isMachineConstantPoolEntry()) delete Constants[i].Val.MachineCPVal; + for (DenseSet::iterator I = + MachineCPVsSharingEntries.begin(), E = MachineCPVsSharingEntries.end(); + I != E; ++I) + delete *I; } /// CanShareConstantPoolEntry - Test whether the given two constants @@ -723,8 +725,10 @@ unsigned MachineConstantPool::getConstantPoolIndex(MachineConstantPoolValue *V, // // FIXME, this could be made much more efficient for large constant pools. int Idx = V->getExistingMachineCPValue(this, Alignment); - if (Idx != -1) + if (Idx != -1) { + MachineCPVsSharingEntries.insert(V); return (unsigned)Idx; + } Constants.push_back(MachineConstantPoolEntry(V, Alignment)); return Constants.size()-1; diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp index b3fb33736ffcf..7244d5f03a90a 100644 --- a/lib/CodeGen/MachineRegisterInfo.cpp +++ b/lib/CodeGen/MachineRegisterInfo.cpp @@ -210,15 +210,8 @@ MachineRegisterInfo::EmitLiveInCopies(MachineBasicBlock *EntryMBB, LiveIns.erase(LiveIns.begin() + i); --i; --e; } else { - DebugLoc DL; - // If there is a location for this live in then use it. - DenseMap::iterator DLI = - LiveInLocs.find(LiveIns[i].second); - if (DLI != LiveInLocs.end()) - DL = DLI->second; - // Emit a copy. - BuildMI(*EntryMBB, EntryMBB->begin(), DL, + BuildMI(*EntryMBB, EntryMBB->begin(), DebugLoc(), TII.get(TargetOpcode::COPY), LiveIns[i].second) .addReg(LiveIns[i].first); diff --git a/lib/CodeGen/RegAllocBase.h b/lib/CodeGen/RegAllocBase.h index 8c7e5f53b824c..5af0ce79acf7c 100644 --- a/lib/CodeGen/RegAllocBase.h +++ b/lib/CodeGen/RegAllocBase.h @@ -39,7 +39,6 @@ #include "llvm/ADT/OwningPtr.h" #include "LiveIntervalUnion.h" -#include namespace llvm { @@ -58,8 +57,8 @@ class LiveVirtRegQueue; /// be extended to add interesting heuristics. /// /// Register allocators must override the selectOrSplit() method to implement -/// live range splitting. They may also override getPriority() which otherwise -/// defaults to the spill weight computed by CalculateSpillWeights. +/// live range splitting. They must also override enqueue/dequeue to provide an +/// assignment order. class RegAllocBase { LiveIntervalUnion::Allocator UnionAllocator; protected: @@ -120,9 +119,11 @@ protected: // Get a temporary reference to a Spiller instance. virtual Spiller &spiller() = 0; - // getPriority - Calculate the allocation priority for VirtReg. - // Virtual registers with higher priorities are allocated first. - virtual float getPriority(LiveInterval *LI) = 0; + /// enqueue - Add VirtReg to the priority queue of unassigned registers. + virtual void enqueue(LiveInterval *LI) = 0; + + /// dequeue - Return the next unassigned register, or NULL. + virtual LiveInterval *dequeue() = 0; // A RegAlloc pass should override this to provide the allocation heuristics. // Each call must guarantee forward progess by returning an available PhysReg @@ -170,7 +171,7 @@ public: static bool VerifyEnabled; private: - void seedLiveVirtRegs(std::priority_queue >&); + void seedLiveRegs(); void spillReg(LiveInterval &VirtReg, unsigned PhysReg, SmallVectorImpl &SplitVRegs); diff --git a/lib/CodeGen/RegAllocBasic.cpp b/lib/CodeGen/RegAllocBasic.cpp index 045c8db9dadb6..6923908a32d92 100644 --- a/lib/CodeGen/RegAllocBasic.cpp +++ b/lib/CodeGen/RegAllocBasic.cpp @@ -45,6 +45,7 @@ #include "llvm/Support/Timer.h" #include +#include using namespace llvm; @@ -64,6 +65,14 @@ VerifyRegAlloc("verify-regalloc", cl::location(RegAllocBase::VerifyEnabled), const char *RegAllocBase::TimerGroupName = "Register Allocation"; bool RegAllocBase::VerifyEnabled = false; +namespace { + struct CompSpillWeight { + bool operator()(LiveInterval *A, LiveInterval *B) const { + return A->weight < B->weight; + } + }; +} + namespace { /// RABasic provides a minimal implementation of the basic register allocation /// algorithm. It prioritizes live virtual registers by spill weight and spills @@ -82,7 +91,8 @@ class RABasic : public MachineFunctionPass, public RegAllocBase // state std::auto_ptr SpillerInstance; - + std::priority_queue, + CompSpillWeight> Queue; public: RABasic(); @@ -100,6 +110,18 @@ public: virtual float getPriority(LiveInterval *LI) { return LI->weight; } + virtual void enqueue(LiveInterval *LI) { + Queue.push(LI); + } + + virtual LiveInterval *dequeue() { + if (Queue.empty()) + return 0; + LiveInterval *LI = Queue.top(); + Queue.pop(); + return LI; + } + virtual unsigned selectOrSplit(LiveInterval &VirtReg, SmallVectorImpl &SplitVRegs); @@ -227,18 +249,17 @@ void RegAllocBase::releaseMemory() { PhysReg2LiveUnion.clear(); } -// Visit all the live virtual registers. If they are already assigned to a -// physical register, unify them with the corresponding LiveIntervalUnion, -// otherwise push them on the priority queue for later assignment. -void RegAllocBase:: -seedLiveVirtRegs(std::priority_queue > &VirtRegQ) { +// Visit all the live registers. If they are already assigned to a physical +// register, unify them with the corresponding LiveIntervalUnion, otherwise push +// them on the priority queue for later assignment. +void RegAllocBase::seedLiveRegs() { for (LiveIntervals::iterator I = LIS->begin(), E = LIS->end(); I != E; ++I) { unsigned RegNum = I->first; LiveInterval &VirtReg = *I->second; if (TargetRegisterInfo::isPhysicalRegister(RegNum)) PhysReg2LiveUnion[RegNum].unify(VirtReg); else - VirtRegQ.push(std::make_pair(getPriority(&VirtReg), RegNum)); + enqueue(&VirtReg); } } @@ -263,38 +284,31 @@ void RegAllocBase::unassign(LiveInterval &VirtReg, unsigned PhysReg) { // Top-level driver to manage the queue of unassigned VirtRegs and call the // selectOrSplit implementation. void RegAllocBase::allocatePhysRegs() { - - // Push each vreg onto a queue or "precolor" by adding it to a physreg union. - std::priority_queue > VirtRegQ; - seedLiveVirtRegs(VirtRegQ); + seedLiveRegs(); // Continue assigning vregs one at a time to available physical registers. - while (!VirtRegQ.empty()) { - // Pop the highest priority vreg. - LiveInterval &VirtReg = LIS->getInterval(VirtRegQ.top().second); - VirtRegQ.pop(); - + while (LiveInterval *VirtReg = dequeue()) { // selectOrSplit requests the allocator to return an available physical // register if possible and populate a list of new live intervals that // result from splitting. - DEBUG(dbgs() << "\nselectOrSplit " << MRI->getRegClass(VirtReg.reg)->getName() - << ':' << VirtReg << '\n'); + DEBUG(dbgs() << "\nselectOrSplit " + << MRI->getRegClass(VirtReg->reg)->getName() + << ':' << *VirtReg << '\n'); typedef SmallVector VirtRegVec; VirtRegVec SplitVRegs; - unsigned AvailablePhysReg = selectOrSplit(VirtReg, SplitVRegs); + unsigned AvailablePhysReg = selectOrSplit(*VirtReg, SplitVRegs); if (AvailablePhysReg) - assign(VirtReg, AvailablePhysReg); + assign(*VirtReg, AvailablePhysReg); for (VirtRegVec::iterator I = SplitVRegs.begin(), E = SplitVRegs.end(); I != E; ++I) { - LiveInterval* SplitVirtReg = *I; + LiveInterval *SplitVirtReg = *I; if (SplitVirtReg->empty()) continue; DEBUG(dbgs() << "queuing new interval: " << *SplitVirtReg << "\n"); assert(TargetRegisterInfo::isVirtualRegister(SplitVirtReg->reg) && "expect split value in virtual register"); - VirtRegQ.push(std::make_pair(getPriority(SplitVirtReg), - SplitVirtReg->reg)); + enqueue(SplitVirtReg); ++NumNewQueued; } } diff --git a/lib/CodeGen/RegAllocGreedy.cpp b/lib/CodeGen/RegAllocGreedy.cpp index c1372cd038cfe..406485aaf496d 100644 --- a/lib/CodeGen/RegAllocGreedy.cpp +++ b/lib/CodeGen/RegAllocGreedy.cpp @@ -43,6 +43,8 @@ #include "llvm/Support/raw_ostream.h" #include "llvm/Support/Timer.h" +#include + using namespace llvm; STATISTIC(NumGlobalSplits, "Number of split global live ranges"); @@ -71,6 +73,8 @@ class RAGreedy : public MachineFunctionPass, public RegAllocBase { // state std::auto_ptr SpillerInstance; std::auto_ptr SA; + std::priority_queue > Queue; + IndexedMap Generation; // splitting state. @@ -91,13 +95,10 @@ public: /// RAGreedy analysis usage. virtual void getAnalysisUsage(AnalysisUsage &AU) const; - virtual void releaseMemory(); - virtual Spiller &spiller() { return *SpillerInstance; } - - virtual float getPriority(LiveInterval *LI); - + virtual void enqueue(LiveInterval *LI); + virtual LiveInterval *dequeue(); virtual unsigned selectOrSplit(LiveInterval&, SmallVectorImpl&); @@ -119,9 +120,12 @@ private: SlotIndex getPrevMappedIndex(const MachineInstr*); void calcPrevSlots(); unsigned nextSplitPoint(unsigned); + bool canEvictInterference(LiveInterval&, unsigned, unsigned, float&); - unsigned tryReassignOrEvict(LiveInterval&, AllocationOrder&, + unsigned tryReassign(LiveInterval&, AllocationOrder&, SmallVectorImpl&); + unsigned tryEvict(LiveInterval&, AllocationOrder&, + SmallVectorImpl&); unsigned tryRegionSplit(LiveInterval&, AllocationOrder&, SmallVectorImpl&); unsigned tryLocalSplit(LiveInterval&, AllocationOrder&, @@ -183,25 +187,42 @@ void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const { void RAGreedy::releaseMemory() { SpillerInstance.reset(0); + Generation.clear(); RegAllocBase::releaseMemory(); } -float RAGreedy::getPriority(LiveInterval *LI) { - float Priority = LI->weight; - - // Prioritize hinted registers so they are allocated first. - std::pair Hint; - if (Hint.first || Hint.second) { - // The hint can be target specific, a virtual register, or a physreg. - Priority *= 2; - - // Prefer physreg hints above anything else. - if (Hint.first == 0 && TargetRegisterInfo::isPhysicalRegister(Hint.second)) - Priority *= 2; - } - return Priority; +void RAGreedy::enqueue(LiveInterval *LI) { + // Prioritize live ranges by size, assigning larger ranges first. + // The queue holds (size, reg) pairs. + const unsigned Size = LI->getSize(); + const unsigned Reg = LI->reg; + assert(TargetRegisterInfo::isVirtualRegister(Reg) && + "Can only enqueue virtual registers"); + const unsigned Hint = VRM->getRegAllocPref(Reg); + unsigned Prio; + + Generation.grow(Reg); + if (++Generation[Reg] == 1) + // 1st generation ranges are handled first, long -> short. + Prio = (1u << 31) + Size; + else + // Repeat offenders are handled second, short -> long + Prio = (1u << 30) - Size; + + // Boost ranges that have a physical register hint. + if (TargetRegisterInfo::isPhysicalRegister(Hint)) + Prio |= (1u << 30); + + Queue.push(std::make_pair(Prio, Reg)); } +LiveInterval *RAGreedy::dequeue() { + if (Queue.empty()) + return 0; + LiveInterval *LI = &LIS->getInterval(Queue.top().second); + Queue.pop(); + return LI; +} //===----------------------------------------------------------------------===// // Register Reassignment @@ -230,8 +251,7 @@ LiveInterval *RAGreedy::getSingleInterference(LiveInterval &VirtReg, if (Q.checkInterference()) { if (Interference) return 0; - Q.collectInterferingVRegs(1); - if (!Q.seenAllInterferences()) + if (Q.collectInterferingVRegs(2) > 1) return 0; Interference = Q.interferingVRegs().front(); } @@ -276,21 +296,14 @@ bool RAGreedy::reassignVReg(LiveInterval &InterferingVReg, return false; } -/// tryReassignOrEvict - Try to reassign a single interferences to a different -/// physreg, or evict a single interference with a lower spill weight. +/// tryReassign - Try to reassign a single interference to a different physreg. /// @param VirtReg Currently unassigned virtual register. /// @param Order Physregs to try. /// @return Physreg to assign VirtReg, or 0. -unsigned RAGreedy::tryReassignOrEvict(LiveInterval &VirtReg, - AllocationOrder &Order, - SmallVectorImpl &NewVRegs){ +unsigned RAGreedy::tryReassign(LiveInterval &VirtReg, AllocationOrder &Order, + SmallVectorImpl &NewVRegs){ NamedRegionTimer T("Reassign", TimerGroupName, TimePassesIsEnabled); - // Keep track of the lightest single interference seen so far. - float BestWeight = VirtReg.weight; - LiveInterval *BestVirt = 0; - unsigned BestPhys = 0; - Order.rewind(); while (unsigned PhysReg = Order.next()) { LiveInterval *InterferingVReg = getSingleInterference(VirtReg, PhysReg); @@ -300,25 +313,92 @@ unsigned RAGreedy::tryReassignOrEvict(LiveInterval &VirtReg, continue; if (reassignVReg(*InterferingVReg, PhysReg)) return PhysReg; + } + return 0; +} + + +//===----------------------------------------------------------------------===// +// Interference eviction +//===----------------------------------------------------------------------===// + +/// canEvict - Return true if all interferences between VirtReg and PhysReg can +/// be evicted. Set maxWeight to the maximal spill weight of an interference. +bool RAGreedy::canEvictInterference(LiveInterval &VirtReg, unsigned PhysReg, + unsigned Size, float &MaxWeight) { + float Weight = 0; + for (const unsigned *AliasI = TRI->getOverlaps(PhysReg); *AliasI; ++AliasI) { + LiveIntervalUnion::Query &Q = query(VirtReg, *AliasI); + // If there is 10 or more interferences, chances are one is smaller. + if (Q.collectInterferingVRegs(10) >= 10) + return false; - // Cannot reassign, is this an eviction candidate? - if (InterferingVReg->weight < BestWeight) { - BestVirt = InterferingVReg; - BestPhys = PhysReg; - BestWeight = InterferingVReg->weight; + // CHeck if any interfering live range is shorter than VirtReg. + for (unsigned i = 0, e = Q.interferingVRegs().size(); i != e; ++i) { + LiveInterval *Intf = Q.interferingVRegs()[i]; + if (TargetRegisterInfo::isPhysicalRegister(Intf->reg)) + return false; + if (Intf->getSize() <= Size) + return false; + Weight = std::max(Weight, Intf->weight); } } + MaxWeight = Weight; + return true; +} + +/// tryEvict - Try to evict all interferences for a physreg. +/// @param VirtReg Currently unassigned virtual register. +/// @param Order Physregs to try. +/// @return Physreg to assign VirtReg, or 0. +unsigned RAGreedy::tryEvict(LiveInterval &VirtReg, + AllocationOrder &Order, + SmallVectorImpl &NewVRegs){ + NamedRegionTimer T("Evict", TimerGroupName, TimePassesIsEnabled); + + // We can only evict interference if all interfering registers are virtual and + // longer than VirtReg. + const unsigned Size = VirtReg.getSize(); + + // Keep track of the lightest single interference seen so far. + float BestWeight = 0; + unsigned BestPhys = 0; - // Nothing reassigned, can we evict a lighter single interference? - if (BestVirt) { - DEBUG(dbgs() << "evicting lighter " << *BestVirt << '\n'); - unassign(*BestVirt, VRM->getPhys(BestVirt->reg)); - ++NumEvicted; - NewVRegs.push_back(BestVirt); - return BestPhys; + Order.rewind(); + while (unsigned PhysReg = Order.next()) { + float Weight = 0; + if (!canEvictInterference(VirtReg, PhysReg, Size, Weight)) + continue; + + // This is an eviction candidate. + DEBUG(dbgs() << "max " << PrintReg(PhysReg, TRI) << " interference = " + << Weight << '\n'); + if (BestPhys && Weight >= BestWeight) + continue; + + // Best so far. + BestPhys = PhysReg; + BestWeight = Weight; + // Stop if the hint can be used. + if (Order.isHint(PhysReg)) + break; } - return 0; + if (!BestPhys) + return 0; + + DEBUG(dbgs() << "evicting " << PrintReg(BestPhys, TRI) << " interference\n"); + for (const unsigned *AliasI = TRI->getOverlaps(BestPhys); *AliasI; ++AliasI) { + LiveIntervalUnion::Query &Q = query(VirtReg, *AliasI); + assert(Q.seenAllInterferences() && "Didn't check all interfererences."); + for (unsigned i = 0, e = Q.interferingVRegs().size(); i != e; ++i) { + LiveInterval *Intf = Q.interferingVRegs()[i]; + unassign(*Intf, VRM->getPhys(Intf->reg)); + ++NumEvicted; + NewVRegs.push_back(Intf); + } + } + return BestPhys; } @@ -426,8 +506,13 @@ float RAGreedy::calcInterferenceInfo(LiveInterval &VirtReg, unsigned PhysReg) { if (!IntI.valid()) break; // Not live in, but before the first use. - if (IntI.start() < BI.FirstUse) + if (IntI.start() < BI.FirstUse) { BC.Entry = SpillPlacement::PrefSpill; + // If the block contains a kill from an earlier split, never split + // again in the same block. + if (!BI.LiveThrough && !SA->isOriginalEndpoint(BI.Kill)) + BC.Entry = SpillPlacement::MustSpill; + } } // Does interference overlap the uses in the entry segment @@ -458,8 +543,12 @@ float RAGreedy::calcInterferenceInfo(LiveInterval &VirtReg, unsigned PhysReg) { IntI.advanceTo(BI.LastUse); if (!IntI.valid()) break; - if (IntI.start() < Stop) + if (IntI.start() < Stop) { BC.Exit = SpillPlacement::PrefSpill; + // Avoid splitting twice in the same block. + if (!BI.LiveThrough && !SA->isOriginalEndpoint(BI.Def)) + BC.Exit = SpillPlacement::MustSpill; + } } } } @@ -1221,12 +1310,22 @@ unsigned RAGreedy::selectOrSplit(LiveInterval &VirtReg, return PhysReg; } - // Try to reassign interferences. - if (unsigned PhysReg = tryReassignOrEvict(VirtReg, Order, NewVRegs)) + if (unsigned PhysReg = tryReassign(VirtReg, Order, NewVRegs)) + return PhysReg; + + if (unsigned PhysReg = tryEvict(VirtReg, Order, NewVRegs)) return PhysReg; assert(NewVRegs.empty() && "Cannot append to existing NewVRegs"); + // The first time we see a live range, don't try to split or spill. + // Wait until the second time, when all smaller ranges have been allocated. + // This gives a better picture of the interference to split around. + if (Generation[VirtReg.reg] == 1) { + NewVRegs.push_back(&VirtReg); + return 0; + } + // Try splitting VirtReg or interferences. unsigned PhysReg = trySplit(VirtReg, Order, NewVRegs); if (PhysReg || !NewVRegs.empty()) diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 90356021f6022..9cc70a30927d2 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -279,8 +279,8 @@ namespace { /// getShiftAmountTy - Returns a type large enough to hold any valid /// shift amount - before type legalization these can be huge. - EVT getShiftAmountTy() { - return LegalTypes ? TLI.getShiftAmountTy() : TLI.getPointerTy(); + EVT getShiftAmountTy(EVT LHSTy) { + return LegalTypes ? TLI.getShiftAmountTy(LHSTy) : TLI.getPointerTy(); } /// isTypeLegal - This method returns true if we are running before type @@ -670,7 +670,7 @@ SDValue DAGCombiner::PromoteOperand(SDValue Op, EVT PVT, bool &Replace) { if (LoadSDNode *LD = dyn_cast(Op)) { EVT MemVT = LD->getMemoryVT(); ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) - ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD + ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD : ISD::EXTLOAD) : LD->getExtensionType(); Replace = true; @@ -894,7 +894,7 @@ bool DAGCombiner::PromoteLoad(SDValue Op) { LoadSDNode *LD = cast(N); EVT MemVT = LD->getMemoryVT(); ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD) - ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD + ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD : ISD::EXTLOAD) : LD->getExtensionType(); SDValue NewLD = DAG.getExtLoad(ExtType, dl, PVT, @@ -1521,7 +1521,7 @@ SDValue DAGCombiner::visitADDE(SDNode *N) { // Since it may not be valid to emit a fold to zero for vector initializers // check if we can before folding. static SDValue tryFoldToZero(DebugLoc DL, const TargetLowering &TLI, EVT VT, - SelectionDAG &DAG, bool LegalOperations) { + SelectionDAG &DAG, bool LegalOperations) { if (!VT.isVector()) { return DAG.getConstant(0, VT); } else if (!LegalOperations || TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) { @@ -1647,7 +1647,7 @@ SDValue DAGCombiner::visitMUL(SDNode *N) { if (N1C && N1C->getAPIntValue().isPowerOf2()) return DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, N0, DAG.getConstant(N1C->getAPIntValue().logBase2(), - getShiftAmountTy())); + getShiftAmountTy(N0.getValueType()))); // fold (mul x, -(1 << c)) -> -(x << c) or (-x) << c if (N1C && (-N1C->getAPIntValue()).isPowerOf2()) { unsigned Log2Val = (-N1C->getAPIntValue()).logBase2(); @@ -1656,7 +1656,8 @@ SDValue DAGCombiner::visitMUL(SDNode *N) { return DAG.getNode(ISD::SUB, N->getDebugLoc(), VT, DAG.getConstant(0, VT), DAG.getNode(ISD::SHL, N->getDebugLoc(), VT, N0, - DAG.getConstant(Log2Val, getShiftAmountTy()))); + DAG.getConstant(Log2Val, + getShiftAmountTy(N0.getValueType())))); } // (mul (shl X, c1), c2) -> (mul X, c2 << c1) if (N1C && N0.getOpcode() == ISD::SHL && @@ -1753,18 +1754,18 @@ SDValue DAGCombiner::visitSDIV(SDNode *N) { // Splat the sign bit into the register SDValue SGN = DAG.getNode(ISD::SRA, N->getDebugLoc(), VT, N0, DAG.getConstant(VT.getSizeInBits()-1, - getShiftAmountTy())); + getShiftAmountTy(N0.getValueType()))); AddToWorkList(SGN.getNode()); // Add (N0 < 0) ? abs2 - 1 : 0; SDValue SRL = DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, SGN, DAG.getConstant(VT.getSizeInBits() - lg2, - getShiftAmountTy())); + getShiftAmountTy(SGN.getValueType()))); SDValue ADD = DAG.getNode(ISD::ADD, N->getDebugLoc(), VT, N0, SRL); AddToWorkList(SRL.getNode()); AddToWorkList(ADD.getNode()); // Divide by pow2 SDValue SRA = DAG.getNode(ISD::SRA, N->getDebugLoc(), VT, ADD, - DAG.getConstant(lg2, getShiftAmountTy())); + DAG.getConstant(lg2, getShiftAmountTy(ADD.getValueType()))); // If we're dividing by a positive value, we're done. Otherwise, we must // negate the result. @@ -1814,7 +1815,7 @@ SDValue DAGCombiner::visitUDIV(SDNode *N) { if (N1C && N1C->getAPIntValue().isPowerOf2()) return DAG.getNode(ISD::SRL, N->getDebugLoc(), VT, N0, DAG.getConstant(N1C->getAPIntValue().logBase2(), - getShiftAmountTy())); + getShiftAmountTy(N0.getValueType()))); // fold (udiv x, (shl c, y)) -> x >>u (log2(c)+y) iff c is power of 2 if (N1.getOpcode() == ISD::SHL) { if (ConstantSDNode *SHC = dyn_cast(N1.getOperand(0))) { @@ -1955,7 +1956,7 @@ SDValue DAGCombiner::visitMULHS(SDNode *N) { if (N1C && N1C->getAPIntValue() == 1) return DAG.getNode(ISD::SRA, N->getDebugLoc(), N0.getValueType(), N0, DAG.getConstant(N0.getValueType().getSizeInBits() - 1, - getShiftAmountTy())); + getShiftAmountTy(N0.getValueType()))); // fold (mulhs x, undef) -> 0 if (N0.getOpcode() == ISD::UNDEF || N1.getOpcode() == ISD::UNDEF) return DAG.getConstant(0, VT); @@ -1971,11 +1972,11 @@ SDValue DAGCombiner::visitMULHS(SDNode *N) { N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1); N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1); N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1, - DAG.getConstant(SimpleSize, getShiftAmountTy())); + DAG.getConstant(SimpleSize, getShiftAmountTy(N1.getValueType()))); return DAG.getNode(ISD::TRUNCATE, DL, VT, N1); } } - + return SDValue(); } @@ -2007,11 +2008,11 @@ SDValue DAGCombiner::visitMULHU(SDNode *N) { N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, NewVT, N1); N1 = DAG.getNode(ISD::MUL, DL, NewVT, N0, N1); N1 = DAG.getNode(ISD::SRL, DL, NewVT, N1, - DAG.getConstant(SimpleSize, getShiftAmountTy())); + DAG.getConstant(SimpleSize, getShiftAmountTy(N1.getValueType()))); return DAG.getNode(ISD::TRUNCATE, DL, VT, N1); } } - + return SDValue(); } @@ -2090,14 +2091,14 @@ SDValue DAGCombiner::visitSMUL_LOHI(SDNode *N) { Lo = DAG.getNode(ISD::MUL, DL, NewVT, Lo, Hi); // Compute the high part as N1. Hi = DAG.getNode(ISD::SRL, DL, NewVT, Lo, - DAG.getConstant(SimpleSize, getShiftAmountTy())); + DAG.getConstant(SimpleSize, getShiftAmountTy(Lo.getValueType()))); Hi = DAG.getNode(ISD::TRUNCATE, DL, VT, Hi); // Compute the low part as N0. Lo = DAG.getNode(ISD::TRUNCATE, DL, VT, Lo); return CombineTo(N, Lo, Hi); } } - + return SDValue(); } @@ -2107,7 +2108,7 @@ SDValue DAGCombiner::visitUMUL_LOHI(SDNode *N) { EVT VT = N->getValueType(0); DebugLoc DL = N->getDebugLoc(); - + // If the type twice as wide is legal, transform the mulhu to a wider multiply // plus a shift. if (VT.isSimple() && !VT.isVector()) { @@ -2120,14 +2121,14 @@ SDValue DAGCombiner::visitUMUL_LOHI(SDNode *N) { Lo = DAG.getNode(ISD::MUL, DL, NewVT, Lo, Hi); // Compute the high part as N1. Hi = DAG.getNode(ISD::SRL, DL, NewVT, Lo, - DAG.getConstant(SimpleSize, getShiftAmountTy())); + DAG.getConstant(SimpleSize, getShiftAmountTy(Lo.getValueType()))); Hi = DAG.getNode(ISD::TRUNCATE, DL, VT, Hi); // Compute the low part as N0. Lo = DAG.getNode(ISD::TRUNCATE, DL, VT, Lo); return CombineTo(N, Lo, Hi); } } - + return SDValue(); } @@ -3004,7 +3005,7 @@ SDValue DAGCombiner::visitSHL(SDNode *N) { N0.getOpcode() == ISD::SIGN_EXTEND) && N0.getOperand(0).getOpcode() == ISD::SHL && isa(N0.getOperand(0)->getOperand(1))) { - uint64_t c1 = + uint64_t c1 = cast(N0.getOperand(0)->getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); EVT InnerShiftVT = N0.getOperand(0).getValueType(); @@ -3133,7 +3134,8 @@ SDValue DAGCombiner::visitSRA(SDNode *N) { TLI.isOperationLegalOrCustom(ISD::TRUNCATE, VT) && TLI.isTruncateFree(VT, TruncVT)) { - SDValue Amt = DAG.getConstant(ShiftAmt, getShiftAmountTy()); + SDValue Amt = DAG.getConstant(ShiftAmt, + getShiftAmountTy(N0.getOperand(0).getValueType())); SDValue Shift = DAG.getNode(ISD::SRL, N0.getDebugLoc(), VT, N0.getOperand(0), Amt); SDValue Trunc = DAG.getNode(ISD::TRUNCATE, N0.getDebugLoc(), TruncVT, @@ -3180,7 +3182,7 @@ SDValue DAGCombiner::visitSRA(SDNode *N) { LargeShiftAmt->getZExtValue()) { SDValue Amt = DAG.getConstant(LargeShiftAmt->getZExtValue() + N1C->getZExtValue(), - getShiftAmountTy()); + getShiftAmountTy(N0.getOperand(0).getOperand(0).getValueType())); SDValue SRA = DAG.getNode(ISD::SRA, N->getDebugLoc(), LargeVT, N0.getOperand(0).getOperand(0), Amt); return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, SRA); @@ -3245,7 +3247,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { if (N1C && N0.getOpcode() == ISD::TRUNCATE && N0.getOperand(0).getOpcode() == ISD::SRL && isa(N0.getOperand(0)->getOperand(1))) { - uint64_t c1 = + uint64_t c1 = cast(N0.getOperand(0)->getOperand(1))->getZExtValue(); uint64_t c2 = N1C->getZExtValue(); EVT InnerShiftVT = N0.getOperand(0).getValueType(); @@ -3256,7 +3258,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { if (c1 + c2 >= InnerShiftSize) return DAG.getConstant(0, VT); return DAG.getNode(ISD::TRUNCATE, N0->getDebugLoc(), VT, - DAG.getNode(ISD::SRL, N0->getDebugLoc(), InnerShiftVT, + DAG.getNode(ISD::SRL, N0->getDebugLoc(), InnerShiftVT, N0.getOperand(0)->getOperand(0), DAG.getConstant(c1 + c2, ShiftCountVT))); } @@ -3320,7 +3322,7 @@ SDValue DAGCombiner::visitSRL(SDNode *N) { if (ShAmt) { Op = DAG.getNode(ISD::SRL, N0.getDebugLoc(), VT, Op, - DAG.getConstant(ShAmt, getShiftAmountTy())); + DAG.getConstant(ShAmt, getShiftAmountTy(Op.getValueType()))); AddToWorkList(Op.getNode()); } @@ -3685,7 +3687,9 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) { } // fold (sext (load x)) -> (sext (truncate (sextload x))) - if (ISD::isNON_EXTLoad(N0.getNode()) && + // None of the supported targets knows how to perform load and sign extend + // in one instruction. We only perform this transformation on scalars. + if (ISD::isNON_EXTLoad(N0.getNode()) && !VT.isVector() && ((!LegalOperations && !cast(N0)->isVolatile()) || TLI.isLoadExtLegal(ISD::SEXTLOAD, N0.getValueType()))) { bool DoXform = true; @@ -3887,7 +3891,9 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { } // fold (zext (load x)) -> (zext (truncate (zextload x))) - if (ISD::isNON_EXTLoad(N0.getNode()) && + // None of the supported targets knows how to perform load and vector_zext + // in one instruction. We only perform this transformation on scalar zext. + if (ISD::isNON_EXTLoad(N0.getNode()) && !VT.isVector() && ((!LegalOperations && !cast(N0)->isVolatile()) || TLI.isLoadExtLegal(ISD::ZEXTLOAD, N0.getValueType()))) { bool DoXform = true; @@ -4021,11 +4027,11 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) { } DebugLoc DL = N->getDebugLoc(); - - // Ensure that the shift amount is wide enough for the shifted value. + + // Ensure that the shift amount is wide enough for the shifted value. if (VT.getSizeInBits() >= 256) ShAmt = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i32, ShAmt); - + return DAG.getNode(N0.getOpcode(), DL, VT, DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)), ShAmt); @@ -4094,7 +4100,9 @@ SDValue DAGCombiner::visitANY_EXTEND(SDNode *N) { } // fold (aext (load x)) -> (aext (truncate (extload x))) - if (ISD::isNON_EXTLoad(N0.getNode()) && + // None of the supported targets knows how to perform load and any_ext + // in one instruction. We only perform this transformation on scalars. + if (ISD::isNON_EXTLoad(N0.getNode()) && !VT.isVector() && ((!LegalOperations && !cast(N0)->isVolatile()) || TLI.isLoadExtLegal(ISD::EXTLOAD, N0.getValueType()))) { bool DoXform = true; @@ -4272,12 +4280,12 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { return SDValue(); unsigned EVTBits = ExtVT.getSizeInBits(); - + // Do not generate loads of non-round integer types since these can // be expensive (and would be wrong if the type is not byte sized). if (!ExtVT.isRound()) return SDValue(); - + unsigned ShAmt = 0; if (N0.getOpcode() == ISD::SRL && N0.hasOneUse()) { if (ConstantSDNode *N01 = dyn_cast(N0.getOperand(1))) { @@ -4292,7 +4300,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { // At this point, we must have a load or else we can't do the transform. if (!isa(N0)) return SDValue(); - + // If the shift amount is larger than the input type then we're not // accessing any of the loaded bytes. If the load was a zextload/extload // then the result of the shift+trunc is zero/undef (handled elsewhere). @@ -4313,18 +4321,18 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { N0 = N0.getOperand(0); } } - + // If we haven't found a load, we can't narrow it. Don't transform one with // multiple uses, this would require adding a new load. if (!isa(N0) || !N0.hasOneUse() || // Don't change the width of a volatile load. cast(N0)->isVolatile()) return SDValue(); - + // Verify that we are actually reducing a load width here. if (cast(N0)->getMemoryVT().getSizeInBits() < EVTBits) return SDValue(); - + LoadSDNode *LN0 = cast(N0); EVT PtrType = N0.getOperand(1).getValueType(); @@ -4362,7 +4370,7 @@ SDValue DAGCombiner::ReduceLoadWidth(SDNode *N) { // Shift the result left, if we've swallowed a left shift. SDValue Result = Load; if (ShLeftAmt != 0) { - EVT ShImmTy = getShiftAmountTy(); + EVT ShImmTy = getShiftAmountTy(Result.getValueType()); if (!isUIntN(ShImmTy.getSizeInBits(), ShLeftAmt)) ShImmTy = VT; Result = DAG.getNode(ISD::SHL, N0.getDebugLoc(), VT, @@ -4504,14 +4512,17 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) { } // See if we can simplify the input to this truncate through knowledge that - // only the low bits are being used. For example "trunc (or (shl x, 8), y)" - // -> trunc y - SDValue Shorter = - GetDemandedBits(N0, APInt::getLowBitsSet(N0.getValueSizeInBits(), - VT.getSizeInBits())); - if (Shorter.getNode()) - return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, Shorter); - + // only the low bits are being used. + // For example "trunc (or (shl x, 8), y)" // -> trunc y + // Currenly we only perform this optimization on scalars because vectors + // may have different active low bits. + if (!VT.isVector()) { + SDValue Shorter = + GetDemandedBits(N0, APInt::getLowBitsSet(N0.getValueSizeInBits(), + VT.getSizeInBits())); + if (Shorter.getNode()) + return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, Shorter); + } // fold (truncate (load x)) -> (smaller load x) // fold (truncate (srl (load x), c)) -> (smaller load (x+c/evtbits)) if (!LegalTypes || TLI.isTypeDesirableForOp(N0.getOpcode(), VT)) { @@ -5975,7 +5986,8 @@ ShrinkLoadReplaceStoreWithStore(const std::pair &MaskInfo, // shifted by ByteShift and truncated down to NumBytes. if (ByteShift) IVal = DAG.getNode(ISD::SRL, IVal->getDebugLoc(), IVal.getValueType(), IVal, - DAG.getConstant(ByteShift*8, DC->getShiftAmountTy())); + DAG.getConstant(ByteShift*8, + DC->getShiftAmountTy(IVal.getValueType()))); // Figure out the offset for the store and the alignment of the access. unsigned StOffset; @@ -6390,7 +6402,7 @@ SDValue DAGCombiner::visitINSERT_VECTOR_ELT(SDNode *N) { EVT VT = InVec.getValueType(); - // If we can't generate a legal BUILD_VECTOR, exit + // If we can't generate a legal BUILD_VECTOR, exit if (LegalOperations && !TLI.isOperationLegal(ISD::BUILD_VECTOR, VT)) return SDValue(); @@ -7098,7 +7110,8 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, if (N2C && ((N2C->getAPIntValue() & (N2C->getAPIntValue()-1)) == 0)) { unsigned ShCtV = N2C->getAPIntValue().logBase2(); ShCtV = XType.getSizeInBits()-ShCtV-1; - SDValue ShCt = DAG.getConstant(ShCtV, getShiftAmountTy()); + SDValue ShCt = DAG.getConstant(ShCtV, + getShiftAmountTy(N0.getValueType())); SDValue Shift = DAG.getNode(ISD::SRL, N0.getDebugLoc(), XType, N0, ShCt); AddToWorkList(Shift.getNode()); @@ -7114,7 +7127,7 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue Shift = DAG.getNode(ISD::SRA, N0.getDebugLoc(), XType, N0, DAG.getConstant(XType.getSizeInBits()-1, - getShiftAmountTy())); + getShiftAmountTy(N0.getValueType()))); AddToWorkList(Shift.getNode()); if (XType.bitsGT(AType)) { @@ -7142,13 +7155,15 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, // Shift the tested bit over the sign bit. APInt AndMask = ConstAndRHS->getAPIntValue(); SDValue ShlAmt = - DAG.getConstant(AndMask.countLeadingZeros(), getShiftAmountTy()); + DAG.getConstant(AndMask.countLeadingZeros(), + getShiftAmountTy(AndLHS.getValueType())); SDValue Shl = DAG.getNode(ISD::SHL, N0.getDebugLoc(), VT, AndLHS, ShlAmt); // Now arithmetic right shift it all the way over, so the result is either // all-ones, or zero. SDValue ShrAmt = - DAG.getConstant(AndMask.getBitWidth()-1, getShiftAmountTy()); + DAG.getConstant(AndMask.getBitWidth()-1, + getShiftAmountTy(Shl.getValueType())); SDValue Shr = DAG.getNode(ISD::SRA, N0.getDebugLoc(), VT, Shl, ShrAmt); return DAG.getNode(ISD::AND, DL, VT, Shr, N3); @@ -7192,7 +7207,7 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, // shl setcc result by log2 n2c return DAG.getNode(ISD::SHL, DL, N2.getValueType(), Temp, DAG.getConstant(N2C->getAPIntValue().logBase2(), - getShiftAmountTy())); + getShiftAmountTy(Temp.getValueType()))); } // Check to see if this is the equivalent of setcc @@ -7215,7 +7230,7 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue Ctlz = DAG.getNode(ISD::CTLZ, N0.getDebugLoc(), XType, N0); return DAG.getNode(ISD::SRL, DL, XType, Ctlz, DAG.getConstant(Log2_32(XType.getSizeInBits()), - getShiftAmountTy())); + getShiftAmountTy(Ctlz.getValueType()))); } // fold (setgt X, 0) -> (srl (and (-X, ~X), size(X)-1)) if (N1C && N1C->isNullValue() && CC == ISD::SETGT) { @@ -7225,13 +7240,13 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, return DAG.getNode(ISD::SRL, DL, XType, DAG.getNode(ISD::AND, DL, XType, NegN0, NotN0), DAG.getConstant(XType.getSizeInBits()-1, - getShiftAmountTy())); + getShiftAmountTy(XType))); } // fold (setgt X, -1) -> (xor (srl (X, size(X)-1), 1)) if (N1C && N1C->isAllOnesValue() && CC == ISD::SETGT) { SDValue Sign = DAG.getNode(ISD::SRL, N0.getDebugLoc(), XType, N0, DAG.getConstant(XType.getSizeInBits()-1, - getShiftAmountTy())); + getShiftAmountTy(N0.getValueType()))); return DAG.getNode(ISD::XOR, DL, XType, Sign, DAG.getConstant(1, XType)); } } @@ -7258,7 +7273,7 @@ SDValue DAGCombiner::SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue Shift = DAG.getNode(ISD::SRA, N0.getDebugLoc(), XType, N0, DAG.getConstant(XType.getSizeInBits()-1, - getShiftAmountTy())); + getShiftAmountTy(N0.getValueType()))); SDValue Add = DAG.getNode(ISD::ADD, N0.getDebugLoc(), XType, N0, Shift); AddToWorkList(Shift.getNode()); diff --git a/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp b/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp index 98582ba99f145..2ae3286829dd9 100644 --- a/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp +++ b/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp @@ -219,6 +219,7 @@ void FunctionLoweringInfo::clear() { CatchInfoFound.clear(); #endif LiveOutRegInfo.clear(); + VisitedBBs.clear(); ArgDbgValues.clear(); ByValArgFrameIndexMap.clear(); RegFixups.clear(); @@ -254,6 +255,123 @@ unsigned FunctionLoweringInfo::CreateRegs(const Type *Ty) { return FirstReg; } +/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the +/// register is a PHI destination and the PHI's LiveOutInfo is not valid. If +/// the register's LiveOutInfo is for a smaller bit width, it is extended to +/// the larger bit width by zero extension. The bit width must be no smaller +/// than the LiveOutInfo's existing bit width. +const FunctionLoweringInfo::LiveOutInfo * +FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) { + if (!LiveOutRegInfo.inBounds(Reg)) + return NULL; + + LiveOutInfo *LOI = &LiveOutRegInfo[Reg]; + if (!LOI->IsValid) + return NULL; + + if (BitWidth > LOI->KnownZero.getBitWidth()) { + LOI->NumSignBits = 1; + LOI->KnownZero = LOI->KnownZero.zextOrTrunc(BitWidth); + LOI->KnownOne = LOI->KnownOne.zextOrTrunc(BitWidth); + } + + return LOI; +} + +/// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination +/// register based on the LiveOutInfo of its operands. +void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) { + const Type *Ty = PN->getType(); + if (!Ty->isIntegerTy() || Ty->isVectorTy()) + return; + + SmallVector ValueVTs; + ComputeValueVTs(TLI, Ty, ValueVTs); + assert(ValueVTs.size() == 1 && + "PHIs with non-vector integer types should have a single VT."); + EVT IntVT = ValueVTs[0]; + + if (TLI.getNumRegisters(PN->getContext(), IntVT) != 1) + return; + IntVT = TLI.getTypeToTransformTo(PN->getContext(), IntVT); + unsigned BitWidth = IntVT.getSizeInBits(); + + unsigned DestReg = ValueMap[PN]; + if (!TargetRegisterInfo::isVirtualRegister(DestReg)) + return; + LiveOutRegInfo.grow(DestReg); + LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg]; + + Value *V = PN->getIncomingValue(0); + if (isa(V) || isa(V)) { + DestLOI.NumSignBits = 1; + APInt Zero(BitWidth, 0); + DestLOI.KnownZero = Zero; + DestLOI.KnownOne = Zero; + return; + } + + if (ConstantInt *CI = dyn_cast(V)) { + APInt Val = CI->getValue().zextOrTrunc(BitWidth); + DestLOI.NumSignBits = Val.getNumSignBits(); + DestLOI.KnownZero = ~Val; + DestLOI.KnownOne = Val; + } else { + assert(ValueMap.count(V) && "V should have been placed in ValueMap when its" + "CopyToReg node was created."); + unsigned SrcReg = ValueMap[V]; + if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) { + DestLOI.IsValid = false; + return; + } + const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth); + if (!SrcLOI) { + DestLOI.IsValid = false; + return; + } + DestLOI = *SrcLOI; + } + + assert(DestLOI.KnownZero.getBitWidth() == BitWidth && + DestLOI.KnownOne.getBitWidth() == BitWidth && + "Masks should have the same bit width as the type."); + + for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) { + Value *V = PN->getIncomingValue(i); + if (isa(V) || isa(V)) { + DestLOI.NumSignBits = 1; + APInt Zero(BitWidth, 0); + DestLOI.KnownZero = Zero; + DestLOI.KnownOne = Zero; + return; + } + + if (ConstantInt *CI = dyn_cast(V)) { + APInt Val = CI->getValue().zextOrTrunc(BitWidth); + DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits()); + DestLOI.KnownZero &= ~Val; + DestLOI.KnownOne &= Val; + continue; + } + + assert(ValueMap.count(V) && "V should have been placed in ValueMap when " + "its CopyToReg node was created."); + unsigned SrcReg = ValueMap[V]; + if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) { + DestLOI.IsValid = false; + return; + } + const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth); + if (!SrcLOI) { + DestLOI.IsValid = false; + return; + } + DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits); + DestLOI.KnownZero &= SrcLOI->KnownZero; + DestLOI.KnownOne &= SrcLOI->KnownOne; + } +} + /// setByValArgumentFrameIndex - Record frame index for the byval /// argument. This overrides previous frame index entry for this argument, /// if any. diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 49c862ce3e0b3..f08528fe2dc35 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -87,7 +87,7 @@ class SelectionDAGLegalize { // If someone requests legalization of the new node, return itself. if (From != To) LegalizedNodes.insert(std::make_pair(To, To)); - + // Transfer SDDbgValues. DAG.TransferDbgValues(From, To); } @@ -498,7 +498,8 @@ SDValue ExpandUnalignedStore(StoreSDNode *ST, SelectionDAG &DAG, int IncrementSize = NumBits / 8; // Divide the stored value in two parts. - SDValue ShiftAmount = DAG.getConstant(NumBits, TLI.getShiftAmountTy()); + SDValue ShiftAmount = DAG.getConstant(NumBits, + TLI.getShiftAmountTy(Val.getValueType())); SDValue Lo = Val; SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); @@ -645,7 +646,8 @@ SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG, } // aggregate the two parts - SDValue ShiftAmount = DAG.getConstant(NumBits, TLI.getShiftAmountTy()); + SDValue ShiftAmount = DAG.getConstant(NumBits, + TLI.getShiftAmountTy(Hi.getValueType())); SDValue Result = DAG.getNode(ISD::SHL, dl, VT, Hi, ShiftAmount); Result = DAG.getNode(ISD::OR, dl, VT, Result, Lo); @@ -1264,7 +1266,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // Move the top bits to the right place. Hi = DAG.getNode(ISD::SHL, dl, Hi.getValueType(), Hi, - DAG.getConstant(RoundWidth, TLI.getShiftAmountTy())); + DAG.getConstant(RoundWidth, + TLI.getShiftAmountTy(Hi.getValueType()))); // Join the hi and lo parts. Result = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi); @@ -1293,7 +1296,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // Move the top bits to the right place. Hi = DAG.getNode(ISD::SHL, dl, Hi.getValueType(), Hi, - DAG.getConstant(ExtraWidth, TLI.getShiftAmountTy())); + DAG.getConstant(ExtraWidth, + TLI.getShiftAmountTy(Hi.getValueType()))); // Join the hi and lo parts. Result = DAG.getNode(ISD::OR, dl, Node->getValueType(0), Lo, Hi); @@ -1482,7 +1486,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { Tmp2 = DAG.getNode(ISD::ADD, dl, Tmp2.getValueType(), Tmp2, DAG.getIntPtrConstant(IncrementSize)); Hi = DAG.getNode(ISD::SRL, dl, Tmp3.getValueType(), Tmp3, - DAG.getConstant(RoundWidth, TLI.getShiftAmountTy())); + DAG.getConstant(RoundWidth, + TLI.getShiftAmountTy(Tmp3.getValueType()))); Hi = DAG.getTruncStore(Tmp1, dl, Hi, Tmp2, ST->getPointerInfo().getWithOffset(IncrementSize), ExtraVT, isVolatile, isNonTemporal, @@ -1492,7 +1497,8 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { // TRUNCSTORE:i24 X -> TRUNCSTORE:i16 (srl X, 8), TRUNCSTORE@+2:i8 X // Store the top RoundWidth bits. Hi = DAG.getNode(ISD::SRL, dl, Tmp3.getValueType(), Tmp3, - DAG.getConstant(ExtraWidth, TLI.getShiftAmountTy())); + DAG.getConstant(ExtraWidth, + TLI.getShiftAmountTy(Tmp3.getValueType()))); Hi = DAG.getTruncStore(Tmp1, dl, Hi, Tmp2, ST->getPointerInfo(), RoundVT, isVolatile, isNonTemporal, Alignment); @@ -1727,7 +1733,8 @@ SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode* Node) { assert(BitShift < LoadTy.getSizeInBits() && "Pointer advanced wrong?"); if (BitShift) SignBit = DAG.getNode(ISD::SHL, dl, LoadTy, SignBit, - DAG.getConstant(BitShift,TLI.getShiftAmountTy())); + DAG.getConstant(BitShift, + TLI.getShiftAmountTy(SignBit.getValueType()))); } } // Now get the sign bit proper, by seeing whether the value is negative. @@ -2207,7 +2214,8 @@ SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned, if (!isSigned) { SDValue Fast = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::f32, Op0); - SDValue ShiftConst = DAG.getConstant(1, TLI.getShiftAmountTy()); + SDValue ShiftConst = + DAG.getConstant(1, TLI.getShiftAmountTy(Op0.getValueType())); SDValue Shr = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, ShiftConst); SDValue AndConst = DAG.getConstant(1, MVT::i64); SDValue And = DAG.getNode(ISD::AND, dl, MVT::i64, Op0, AndConst); @@ -2226,7 +2234,6 @@ SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned, } // Otherwise, implement the fully general conversion. - EVT SHVT = TLI.getShiftAmountTy(); SDValue And = DAG.getNode(ISD::AND, dl, MVT::i64, Op0, DAG.getConstant(UINT64_C(0xfffffffffffff800), MVT::i64)); @@ -2241,6 +2248,7 @@ SDValue SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned, Op0, DAG.getConstant(UINT64_C(0x0020000000000000), MVT::i64), ISD::SETUGE); SDValue Sel2 = DAG.getNode(ISD::SELECT, dl, MVT::i64, Ge, Sel, Op0); + EVT SHVT = TLI.getShiftAmountTy(Sel2.getValueType()); SDValue Sh = DAG.getNode(ISD::SRL, dl, MVT::i64, Sel2, DAG.getConstant(32, SHVT)); @@ -2387,7 +2395,7 @@ SDValue SelectionDAGLegalize::PromoteLegalFP_TO_INT(SDValue LegalOp, /// SDValue SelectionDAGLegalize::ExpandBSWAP(SDValue Op, DebugLoc dl) { EVT VT = Op.getValueType(); - EVT SHVT = TLI.getShiftAmountTy(); + EVT SHVT = TLI.getShiftAmountTy(VT); SDValue Tmp1, Tmp2, Tmp3, Tmp4, Tmp5, Tmp6, Tmp7, Tmp8; switch (VT.getSimpleVT().SimpleTy) { default: assert(0 && "Unhandled Expand type in BSWAP!"); @@ -2450,7 +2458,7 @@ SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op, default: assert(0 && "Cannot expand this yet!"); case ISD::CTPOP: { EVT VT = Op.getValueType(); - EVT ShVT = TLI.getShiftAmountTy(); + EVT ShVT = TLI.getShiftAmountTy(VT); unsigned Len = VT.getSizeInBits(); assert(VT.isInteger() && Len <= 128 && Len % 8 == 0 && @@ -2487,7 +2495,7 @@ SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op, Op = DAG.getNode(ISD::SRL, dl, VT, DAG.getNode(ISD::MUL, dl, VT, Op, Mask01), DAG.getConstant(Len - 8, ShVT)); - + return Op; } case ISD::CTLZ: { @@ -2501,7 +2509,7 @@ SDValue SelectionDAGLegalize::ExpandBitCount(unsigned Opc, SDValue Op, // // but see also: http://www.hackersdelight.org/HDcode/nlz.cc EVT VT = Op.getValueType(); - EVT ShVT = TLI.getShiftAmountTy(); + EVT ShVT = TLI.getShiftAmountTy(VT); unsigned len = VT.getSizeInBits(); for (unsigned i = 0; (1U << i) <= (len / 2); ++i) { SDValue Tmp3 = DAG.getConstant(1ULL << i, ShVT); @@ -2737,7 +2745,7 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node, // SAR. However, it is doubtful that any exist. EVT ExtraVT = cast(Node->getOperand(1))->getVT(); EVT VT = Node->getValueType(0); - EVT ShiftAmountTy = TLI.getShiftAmountTy(); + EVT ShiftAmountTy = TLI.getShiftAmountTy(VT); if (VT.isVector()) ShiftAmountTy = VT; unsigned BitsDiff = VT.getScalarType().getSizeInBits() - @@ -2901,7 +2909,7 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node, // 1 -> Hi Tmp1 = DAG.getNode(ISD::SRL, dl, OpTy, Node->getOperand(0), DAG.getConstant(OpTy.getSizeInBits()/2, - TLI.getShiftAmountTy())); + TLI.getShiftAmountTy(Node->getOperand(0).getValueType()))); Tmp1 = DAG.getNode(ISD::TRUNCATE, dl, Node->getValueType(0), Tmp1); } else { // 0 -> Lo @@ -3260,7 +3268,7 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node, assert(LC != RTLIB::UNKNOWN_LIBCALL && "Cannot expand this operation!"); LHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, LHS); RHS = DAG.getNode(Ops[isSigned][2], dl, WideVT, RHS); - + SDValue Ret = ExpandLibCall(LC, Node, isSigned); BottomHalf = DAG.getNode(ISD::TRUNCATE, dl, VT, Ret); TopHalf = DAG.getNode(ISD::SRL, dl, Ret.getValueType(), Ret, @@ -3268,7 +3276,8 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node, TopHalf = DAG.getNode(ISD::TRUNCATE, dl, VT, TopHalf); } if (isSigned) { - Tmp1 = DAG.getConstant(VT.getSizeInBits() - 1, TLI.getShiftAmountTy()); + Tmp1 = DAG.getConstant(VT.getSizeInBits() - 1, + TLI.getShiftAmountTy(BottomHalf.getValueType())); Tmp1 = DAG.getNode(ISD::SRA, dl, VT, BottomHalf, Tmp1); TopHalf = DAG.getSetCC(dl, TLI.getSetCCResultType(VT), TopHalf, Tmp1, ISD::SETNE); @@ -3286,7 +3295,7 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node, Tmp2 = DAG.getNode(ISD::ANY_EXTEND, dl, PairTy, Node->getOperand(1)); Tmp2 = DAG.getNode(ISD::SHL, dl, PairTy, Tmp2, DAG.getConstant(PairTy.getSizeInBits()/2, - TLI.getShiftAmountTy())); + TLI.getShiftAmountTy(PairTy))); Results.push_back(DAG.getNode(ISD::OR, dl, PairTy, Tmp1, Tmp2)); break; } @@ -3464,7 +3473,7 @@ void SelectionDAGLegalize::PromoteNode(SDNode *Node, Tmp1 = DAG.getNode(ISD::ZERO_EXTEND, dl, NVT, Node->getOperand(0)); Tmp1 = DAG.getNode(ISD::BSWAP, dl, NVT, Tmp1); Tmp1 = DAG.getNode(ISD::SRL, dl, NVT, Tmp1, - DAG.getConstant(DiffBits, TLI.getShiftAmountTy())); + DAG.getConstant(DiffBits, TLI.getShiftAmountTy(NVT))); Results.push_back(Tmp1); break; } diff --git a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp index 27752123aac41..27a466b3a9281 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp @@ -177,25 +177,27 @@ SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) { // First get the sign bit of second operand. SDValue SignBit = DAG.getNode(ISD::SHL, dl, RVT, DAG.getConstant(1, RVT), DAG.getConstant(RSize - 1, - TLI.getShiftAmountTy())); + TLI.getShiftAmountTy(RVT))); SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit); // Shift right or sign-extend it if the two operands have different types. int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits(); if (SizeDiff > 0) { SignBit = DAG.getNode(ISD::SRL, dl, RVT, SignBit, - DAG.getConstant(SizeDiff, TLI.getShiftAmountTy())); + DAG.getConstant(SizeDiff, + TLI.getShiftAmountTy(SignBit.getValueType()))); SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit); } else if (SizeDiff < 0) { SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit); SignBit = DAG.getNode(ISD::SHL, dl, LVT, SignBit, - DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy())); + DAG.getConstant(-SizeDiff, + TLI.getShiftAmountTy(SignBit.getValueType()))); } // Clear the sign bit of the first operand. SDValue Mask = DAG.getNode(ISD::SHL, dl, LVT, DAG.getConstant(1, LVT), DAG.getConstant(LSize - 1, - TLI.getShiftAmountTy())); + TLI.getShiftAmountTy(LVT))); Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, LVT)); LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 2fb2f2d8aa1ed..9120288921e2b 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1420,7 +1420,7 @@ SDValue SelectionDAG::getMDNode(const MDNode *MD) { /// the target's desired shift amount type. SDValue SelectionDAG::getShiftAmountOperand(SDValue Op) { EVT OpTy = Op.getValueType(); - MVT ShTy = TLI.getShiftAmountTy(); + MVT ShTy = TLI.getShiftAmountTy(OpTy); if (OpTy == ShTy || OpTy.isVector()) return Op; ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; @@ -2048,7 +2048,7 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, return; } break; - + default: // Allow the target to implement this method for its nodes. if (Op.getOpcode() >= ISD::BUILTIN_OP_END) { @@ -2088,12 +2088,7 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{ case ISD::Constant: { const APInt &Val = cast(Op)->getAPIntValue(); - // If negative, return # leading ones. - if (Val.isNegative()) - return Val.countLeadingOnes(); - - // Return # leading zeros. - return Val.countLeadingZeros(); + return Val.getNumSignBits(); } case ISD::SIGN_EXTEND: @@ -2297,12 +2292,12 @@ bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const { if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) || !isa(Op.getOperand(1))) return false; - - if (Op.getOpcode() == ISD::OR && + + if (Op.getOpcode() == ISD::OR && !MaskedValueIsZero(Op.getOperand(0), cast(Op.getOperand(1))->getAPIntValue())) return false; - + return true; } @@ -2753,7 +2748,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, DebugLoc DL, EVT VT, // i8, which is easy to fall into in generic code that uses // TLI.getShiftAmount(). assert(N2.getValueType().getSizeInBits() >= - Log2_32_Ceil(N1.getValueType().getSizeInBits()) && + Log2_32_Ceil(N1.getValueType().getSizeInBits()) && "Invalid use of small shift amount with oversized value!"); // Always fold shifts of i1 values so the code generator doesn't need to diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 452f5614b7bf6..48d9bbb5132eb 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -641,16 +641,17 @@ SDValue RegsForValue::getCopyFromRegs(SelectionDAG &DAG, // If the source register was virtual and if we know something about it, // add an assert node. if (!TargetRegisterInfo::isVirtualRegister(Regs[Part+i]) || - !RegisterVT.isInteger() || RegisterVT.isVector() || - !FuncInfo.LiveOutRegInfo.inBounds(Regs[Part+i])) + !RegisterVT.isInteger() || RegisterVT.isVector()) + continue; + + const FunctionLoweringInfo::LiveOutInfo *LOI = + FuncInfo.GetLiveOutRegInfo(Regs[Part+i]); + if (!LOI) continue; - - const FunctionLoweringInfo::LiveOutInfo &LOI = - FuncInfo.LiveOutRegInfo[Regs[Part+i]]; unsigned RegSize = RegisterVT.getSizeInBits(); - unsigned NumSignBits = LOI.NumSignBits; - unsigned NumZeroBits = LOI.KnownZero.countLeadingOnes(); + unsigned NumSignBits = LOI->NumSignBits; + unsigned NumZeroBits = LOI->KnownZero.countLeadingOnes(); // FIXME: We capture more information than the dag can represent. For // now, just use the tightest assertzext/assertsext possible. @@ -908,7 +909,7 @@ void SelectionDAGBuilder::resolveDanglingDebugInfo(const Value *V, Val.getResNo(), Offset, dl, DbgSDNodeOrder); DAG.AddDbgValue(SDV, Val.getNode(), false); } - } else + } else DEBUG(dbgs() << "Dropping debug info for " << DI); DanglingDebugInfoMap[V] = DanglingDebugInfo(); } @@ -1417,7 +1418,7 @@ void SelectionDAGBuilder::visitBr(const BranchInst &I) { // jle foo // if (const BinaryOperator *BOp = dyn_cast(CondVal)) { - if (!TLI.isJumpExpensive() && + if (!TLI.isJumpExpensive() && BOp->hasOneUse() && (BOp->getOpcode() == Instruction::And || BOp->getOpcode() == Instruction::Or)) { @@ -1915,7 +1916,7 @@ bool SelectionDAGBuilder::handleJTSwitchCase(CaseRec& CR, DEBUG(dbgs() << "Lowering jump table\n" << "First entry: " << First << ". Last entry: " << Last << '\n' << "Range: " << Range - << "Size: " << TSize << ". Density: " << Density << "\n\n"); + << ". Size: " << TSize << ". Density: " << Density << "\n\n"); // Get the MachineFunction which holds the current MBB. This is used when // inserting any additional MBBs necessary to represent the switch. @@ -2408,19 +2409,19 @@ void SelectionDAGBuilder::visitBinary(const User &I, unsigned OpCode) { void SelectionDAGBuilder::visitShift(const User &I, unsigned Opcode) { SDValue Op1 = getValue(I.getOperand(0)); SDValue Op2 = getValue(I.getOperand(1)); - - MVT ShiftTy = TLI.getShiftAmountTy(); - + + MVT ShiftTy = TLI.getShiftAmountTy(Op2.getValueType()); + // Coerce the shift amount to the right type if we can. if (!I.getType()->isVectorTy() && Op2.getValueType() != ShiftTy) { unsigned ShiftSize = ShiftTy.getSizeInBits(); unsigned Op2Size = Op2.getValueType().getSizeInBits(); DebugLoc DL = getCurDebugLoc(); - + // If the operand is smaller than the shift count type, promote it. if (ShiftSize > Op2Size) Op2 = DAG.getNode(ISD::ZERO_EXTEND, DL, ShiftTy, Op2); - + // If the operand is larger than the shift count type but the shift // count type has enough bits to represent any shift value, truncate // it now. This is a common case and it exposes the truncate to diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h index a1a70c394a51f..8f466d913bbbb 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h @@ -348,7 +348,7 @@ public: SDValue getControlRoot(); DebugLoc getCurDebugLoc() const { return CurDebugLoc; } - void setCurDebugLoc(DebugLoc dl){ CurDebugLoc = dl; } + unsigned getSDNodeOrder() const { return SDNodeOrder; } void CopyValueToVirtualRegister(const Value *V, unsigned Reg); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 62ebc81ef86e2..68ba966d268a5 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -49,6 +49,7 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Timer.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/ADT/PostOrderIterator.h" #include "llvm/ADT/Statistic.h" #include using namespace llvm; @@ -479,16 +480,7 @@ void SelectionDAGISel::ComputeLiveOutVRegInfo() { unsigned NumSignBits = CurDAG->ComputeNumSignBits(Src); Mask = APInt::getAllOnesValue(SrcVT.getSizeInBits()); CurDAG->ComputeMaskedBits(Src, Mask, KnownZero, KnownOne); - - // Only install this information if it tells us something. - if (NumSignBits != 1 || KnownZero != 0 || KnownOne != 0) { - FuncInfo->LiveOutRegInfo.grow(DestReg); - FunctionLoweringInfo::LiveOutInfo &LOI = - FuncInfo->LiveOutRegInfo[DestReg]; - LOI.NumSignBits = NumSignBits; - LOI.KnownOne = KnownOne; - LOI.KnownZero = KnownZero; - } + FuncInfo->AddLiveOutRegInfo(DestReg, NumSignBits, KnownZero, KnownOne); } while (!Worklist.empty()); } @@ -832,11 +824,39 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) { FastIS = TLI.createFastISel(*FuncInfo); // Iterate over all basic blocks in the function. - for (Function::const_iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) { - const BasicBlock *LLVMBB = &*I; + ReversePostOrderTraversal RPOT(&Fn); + for (ReversePostOrderTraversal::rpo_iterator + I = RPOT.begin(), E = RPOT.end(); I != E; ++I) { + const BasicBlock *LLVMBB = *I; #ifndef NDEBUG CheckLineNumbers(LLVMBB); #endif + + if (OptLevel != CodeGenOpt::None) { + bool AllPredsVisited = true; + for (const_pred_iterator PI = pred_begin(LLVMBB), PE = pred_end(LLVMBB); + PI != PE; ++PI) { + if (!FuncInfo->VisitedBBs.count(*PI)) { + AllPredsVisited = false; + break; + } + } + + if (AllPredsVisited) { + for (BasicBlock::const_iterator I = LLVMBB->begin(), E = LLVMBB->end(); + I != E && isa(I); ++I) { + FuncInfo->ComputePHILiveOutRegInfo(cast(I)); + } + } else { + for (BasicBlock::const_iterator I = LLVMBB->begin(), E = LLVMBB->end(); + I != E && isa(I); ++I) { + FuncInfo->InvalidatePHILiveOutRegInfo(cast(I)); + } + } + + FuncInfo->VisitedBBs.insert(LLVMBB); + } + FuncInfo->MBB = FuncInfo->MBBMap[LLVMBB]; FuncInfo->InsertPt = FuncInfo->MBB->getFirstNonPHI(); @@ -851,17 +871,8 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) { PrepareEHLandingPad(); // Lower any arguments needed in this block if this is the entry block. - if (LLVMBB == &Fn.getEntryBlock()) { - for (BasicBlock::const_iterator DBI = LLVMBB->begin(), DBE = LLVMBB->end(); - DBI != DBE; ++DBI) { - if (const DbgInfoIntrinsic *DI = dyn_cast(DBI)) { - const DebugLoc DL = DI->getDebugLoc(); - SDB->setCurDebugLoc(DL); - break; - } - } + if (LLVMBB == &Fn.getEntryBlock()) LowerArguments(LLVMBB); - } // Before doing SelectionDAG ISel, see if FastISel has been requested. if (FastIS) { diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 691390e2a0e42..35b847ccabfbd 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -563,7 +563,7 @@ TargetLowering::TargetLowering(const TargetMachine &tm, setOperationAction(ISD::TRAP, MVT::Other, Expand); IsLittleEndian = TD->isLittleEndian(); - ShiftAmountTy = PointerTy = MVT::getIntegerVT(8*TD->getPointerSize()); + PointerTy = MVT::getIntegerVT(8*TD->getPointerSize()); memset(RegClassForVT, 0,MVT::LAST_VALUETYPE*sizeof(TargetRegisterClass*)); memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray)); maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8; @@ -596,6 +596,10 @@ TargetLowering::~TargetLowering() { delete &TLOF; } +MVT TargetLowering::getShiftAmountTy(EVT LHSTy) const { + return MVT::getIntegerVT(8*TD->getPointerSize()); +} + /// canOpTrap - Returns true if the operation can trap for the value type. /// VT must be a legal type. bool TargetLowering::canOpTrap(unsigned Op, EVT VT) const { @@ -1401,7 +1405,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op, BitWidth - InnerVT.getSizeInBits()) & DemandedMask) == 0 && isTypeDesirableForOp(ISD::SHL, InnerVT)) { - EVT ShTy = getShiftAmountTy(); + EVT ShTy = getShiftAmountTy(InnerVT); if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) ShTy = InnerVT; SDValue NarrowShl = @@ -2188,7 +2192,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, if (ConstantSDNode *AndRHS = dyn_cast(N0.getOperand(1))) { EVT ShiftTy = DCI.isBeforeLegalize() ? - getPointerTy() : getShiftAmountTy(); + getPointerTy() : getShiftAmountTy(N0.getValueType()); if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3 // Perform the xform if the AND RHS is a single bit. if (AndRHS->getAPIntValue().isPowerOf2()) { @@ -2359,7 +2363,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, // (Z-X) == X --> Z == X<<1 SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N1, - DAG.getConstant(1, getShiftAmountTy())); + DAG.getConstant(1, getShiftAmountTy(N1.getValueType()))); if (!DCI.isCalledByLegalizer()) DCI.AddToWorklist(SH.getNode()); return DAG.getSetCC(dl, VT, N0.getOperand(0), SH, Cond); @@ -2381,7 +2385,7 @@ TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); // X == (Z-X) --> X<<1 == Z SDValue SH = DAG.getNode(ISD::SHL, dl, N1.getValueType(), N0, - DAG.getConstant(1, getShiftAmountTy())); + DAG.getConstant(1, getShiftAmountTy(N0.getValueType()))); if (!DCI.isCalledByLegalizer()) DCI.AddToWorklist(SH.getNode()); return DAG.getSetCC(dl, VT, SH, N1.getOperand(0), Cond); @@ -2493,7 +2497,7 @@ bool TargetLowering::isGAPlusOffset(SDNode *N, const GlobalValue *&GA, } } } - + return false; } @@ -3141,14 +3145,14 @@ SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG, // Shift right algebraic if shift value is nonzero if (magics.s > 0) { Q = DAG.getNode(ISD::SRA, dl, VT, Q, - DAG.getConstant(magics.s, getShiftAmountTy())); + DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType()))); if (Created) Created->push_back(Q.getNode()); } // Extract the sign bit and add it to the quotient SDValue T = DAG.getNode(ISD::SRL, dl, VT, Q, DAG.getConstant(VT.getSizeInBits()-1, - getShiftAmountTy())); + getShiftAmountTy(Q.getValueType()))); if (Created) Created->push_back(T.getNode()); return DAG.getNode(ISD::ADD, dl, VT, Q, T); @@ -3192,19 +3196,19 @@ SDValue TargetLowering::BuildUDIV(SDNode *N, SelectionDAG &DAG, assert(magics.s < N1C->getAPIntValue().getBitWidth() && "We shouldn't generate an undefined shift!"); return DAG.getNode(ISD::SRL, dl, VT, Q, - DAG.getConstant(magics.s, getShiftAmountTy())); + DAG.getConstant(magics.s, getShiftAmountTy(Q.getValueType()))); } else { SDValue NPQ = DAG.getNode(ISD::SUB, dl, VT, N->getOperand(0), Q); if (Created) Created->push_back(NPQ.getNode()); NPQ = DAG.getNode(ISD::SRL, dl, VT, NPQ, - DAG.getConstant(1, getShiftAmountTy())); + DAG.getConstant(1, getShiftAmountTy(NPQ.getValueType()))); if (Created) Created->push_back(NPQ.getNode()); NPQ = DAG.getNode(ISD::ADD, dl, VT, NPQ, Q); if (Created) Created->push_back(NPQ.getNode()); return DAG.getNode(ISD::SRL, dl, VT, NPQ, - DAG.getConstant(magics.s-1, getShiftAmountTy())); + DAG.getConstant(magics.s-1, getShiftAmountTy(NPQ.getValueType()))); } } diff --git a/lib/CodeGen/SplitKit.cpp b/lib/CodeGen/SplitKit.cpp index 5663936bf3aae..fd5d50b7ecb8d 100644 --- a/lib/CodeGen/SplitKit.cpp +++ b/lib/CodeGen/SplitKit.cpp @@ -167,6 +167,20 @@ void SplitAnalysis::calcLiveBlockInfo() { } } +bool SplitAnalysis::isOriginalEndpoint(SlotIndex Idx) const { + unsigned OrigReg = VRM.getOriginal(CurLI->reg); + const LiveInterval &Orig = LIS.getInterval(OrigReg); + assert(!Orig.empty() && "Splitting empty interval?"); + LiveInterval::const_iterator I = Orig.find(Idx); + + // Range containing Idx should begin at Idx. + if (I != Orig.end() && I->start <= Idx) + return I->start == Idx; + + // Range does not contain Idx, previous must end at Idx. + return I != Orig.begin() && (--I)->end == Idx; +} + void SplitAnalysis::print(const BlockPtrSet &B, raw_ostream &OS) const { for (BlockPtrSet::const_iterator I = B.begin(), E = B.end(); I != E; ++I) { unsigned count = UsingBlocks.lookup(*I); @@ -947,10 +961,10 @@ void SplitEditor::splitSingleBlocks(const SplitAnalysis::BlockPtrSet &Blocks) { openIntv(); SlotIndex SegStart = enterIntvBefore(BI.FirstUse); - if (BI.LastUse < BI.LastSplitPoint) { + if (!BI.LiveOut || BI.LastUse < BI.LastSplitPoint) { useIntv(SegStart, leaveIntvAfter(BI.LastUse)); } else { - // THe last use os after tha last valid split point. + // The last use is after the last valid split point. SlotIndex SegStop = leaveIntvBefore(BI.LastSplitPoint); useIntv(SegStart, SegStop); overlapIntv(SegStop, BI.LastUse); diff --git a/lib/CodeGen/SplitKit.h b/lib/CodeGen/SplitKit.h index 5c34afd1c8195..e02e6297035da 100644 --- a/lib/CodeGen/SplitKit.h +++ b/lib/CodeGen/SplitKit.h @@ -125,6 +125,13 @@ public: return UsingBlocks.lookup(MBB); } + /// isOriginalEndpoint - Return true if the original live range was killed or + /// (re-)defined at Idx. Idx should be the 'def' slot for a normal kill/def, + /// and 'use' for an early-clobber def. + /// This can be used to recognize code inserted by earlier live range + /// splitting. + bool isOriginalEndpoint(SlotIndex Idx) const; + typedef SmallPtrSet BlockPtrSet; // Print a set of blocks with use counts. diff --git a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp index 0b7bd98cc6923..fa311dc5d66c5 100644 --- a/lib/CodeGen/TargetLoweringObjectFileImpl.cpp +++ b/lib/CodeGen/TargetLoweringObjectFileImpl.cpp @@ -178,6 +178,10 @@ const MCSection *TargetLoweringObjectFileELF::getEHFrameSection() const { static SectionKind getELFKindForNamedSection(StringRef Name, SectionKind K) { + // FIXME: Why is this here? Codegen is should not be in the business + // of figuring section flags. If the user wrote section(".eh_frame"), + // we should just pass that to MC which will defer to the assembly + // or use its default if producing an object file. if (Name.empty() || Name[0] != '.') return K; // Some lame default implementation based on some magic section names. @@ -203,6 +207,9 @@ getELFKindForNamedSection(StringRef Name, SectionKind K) { Name.startswith(".llvm.linkonce.tb.")) return SectionKind::getThreadBSS(); + if (Name == ".eh_frame") + return SectionKind::getDataRel(); + return K; } @@ -441,11 +448,15 @@ void TargetLoweringObjectFileMachO::Initialize(MCContext &Ctx, Triple T(((LLVMTargetMachine&)TM).getTargetTriple()); if (T.getOS() == Triple::Darwin) { - unsigned MajNum = T.getDarwinMajorNumber(); - if (MajNum == 7 || MajNum == 8) // 10.3 Panther, 10.4 Tiger + switch (T.getDarwinMajorNumber()) { + case 7: // 10.3 Panther. + case 8: // 10.4 Tiger. CommDirectiveSupportsAlignment = false; - if (MajNum > 9) // 10.6 SnowLeopard - IsFunctionEHSymbolGlobal = false; + break; + case 9: // 10.5 Leopard. + case 10: // 10.6 SnowLeopard. + break; + } } TargetLoweringObjectFile::Initialize(Ctx, TM); @@ -630,7 +641,7 @@ getExplicitSectionGlobal(const GlobalValue *GV, SectionKind Kind, Mangler *Mang, const TargetMachine &TM) const { // Parse the section specifier and create it if valid. StringRef Segment, Section; - unsigned TAA, StubSize; + unsigned TAA = (unsigned)MCSectionMachO::SECTION_ATTRIBUTES, StubSize = 0; std::string ErrorCode = MCSectionMachO::ParseSectionSpecifier(GV->getSection(), Segment, Section, TAA, StubSize); @@ -643,10 +654,19 @@ getExplicitSectionGlobal(const GlobalValue *GV, SectionKind Kind, return DataSection; } + bool TAAWasSet = (TAA != MCSectionMachO::SECTION_ATTRIBUTES); + if (!TAAWasSet) + TAA = 0; // Sensible default if this is a new section. + // Get the section. const MCSectionMachO *S = getContext().getMachOSection(Segment, Section, TAA, StubSize, Kind); + // If TAA wasn't set by ParseSectionSpecifier() above, + // use the value returned by getMachOSection() as a default. + if (!TAAWasSet) + TAA = S->getTypeAndAttributes(); + // Okay, now that we got the section, verify that the TAA & StubSize agree. // If the user declared multiple globals with different section flags, we need // to reject it here. diff --git a/lib/CodeGen/VirtRegRewriter.cpp b/lib/CodeGen/VirtRegRewriter.cpp index 458a2134bf4ad..ec149dddc1d91 100644 --- a/lib/CodeGen/VirtRegRewriter.cpp +++ b/lib/CodeGen/VirtRegRewriter.cpp @@ -478,7 +478,8 @@ static void ResurrectConfirmedKill(unsigned Reg, const TargetRegisterInfo* TRI, if (!RegKills[KReg]) return; - assert(KillOps[KReg] == KillOp && "invalid superreg kill flags"); + assert(KillOps[KReg]->getParent() == KillOp->getParent() && + "invalid superreg kill flags"); KillOps[KReg] = NULL; RegKills.reset(KReg); @@ -487,7 +488,8 @@ static void ResurrectConfirmedKill(unsigned Reg, const TargetRegisterInfo* TRI, for (const unsigned *SR = TRI->getSubRegisters(KReg); *SR; ++SR) { DEBUG(dbgs() << " Resurrect subreg " << TRI->getName(*SR) << "\n"); - assert(KillOps[*SR] == KillOp && "invalid subreg kill flags"); + assert(KillOps[*SR]->getParent() == KillOp->getParent() && + "invalid subreg kill flags"); KillOps[*SR] = NULL; RegKills.reset(*SR); } diff --git a/lib/MC/ELFObjectWriter.cpp b/lib/MC/ELFObjectWriter.cpp index 8a00a16cfb4a9..ea1629d305657 100644 --- a/lib/MC/ELFObjectWriter.cpp +++ b/lib/MC/ELFObjectWriter.cpp @@ -833,7 +833,11 @@ static bool isInSymtab(const MCAssembler &Asm, const MCSymbolData &Data, return true; const MCSymbol &A = Symbol.AliasedSymbol(); - if (!A.isVariable() && A.isUndefined() && !Data.isCommon()) + if (Symbol.isVariable() && !A.isVariable() && A.isUndefined()) + return false; + + bool IsGlobal = GetBinding(Data) == ELF::STB_GLOBAL; + if (!Symbol.isVariable() && Symbol.isUndefined() && !IsGlobal) return false; if (!Asm.isSymbolLinkerVisible(Symbol) && !Symbol.isUndefined()) @@ -1732,6 +1736,10 @@ unsigned X86ELFObjectWriter::GetRelocType(const MCValue &Target, assert(Modifier == MCSymbolRefExpr::VK_None); Type = ELF::R_X86_64_PC16; break; + case FK_PCRel_1: + assert(Modifier == MCSymbolRefExpr::VK_None); + Type = ELF::R_X86_64_PC8; + break; } } else { switch ((unsigned)Fixup.getKind()) { diff --git a/lib/MC/MCAsmInfo.cpp b/lib/MC/MCAsmInfo.cpp index cc1afbd089266..8199fb2e158ad 100644 --- a/lib/MC/MCAsmInfo.cpp +++ b/lib/MC/MCAsmInfo.cpp @@ -65,6 +65,7 @@ MCAsmInfo::MCAsmInfo() { WeakDefDirective = 0; LinkOnceDirective = 0; HiddenVisibilityAttr = MCSA_Hidden; + HiddenDeclarationVisibilityAttr = MCSA_Hidden; ProtectedVisibilityAttr = MCSA_Protected; HasLEB128 = false; SupportsDebugInformation = false; diff --git a/lib/MC/MCAsmInfoDarwin.cpp b/lib/MC/MCAsmInfoDarwin.cpp index 13776f04437d4..526ad0da42aa3 100644 --- a/lib/MC/MCAsmInfoDarwin.cpp +++ b/lib/MC/MCAsmInfoDarwin.cpp @@ -45,6 +45,7 @@ MCAsmInfoDarwin::MCAsmInfoDarwin() { HasAggressiveSymbolFolding = false; HiddenVisibilityAttr = MCSA_PrivateExtern; + HiddenDeclarationVisibilityAttr = MCSA_Invalid; // Doesn't support protected visibility. ProtectedVisibilityAttr = MCSA_Global; diff --git a/lib/MC/MCDisassembler/EDOperand.cpp b/lib/MC/MCDisassembler/EDOperand.cpp index cfeb56fa3dfdc..2b0c73e805939 100644 --- a/lib/MC/MCDisassembler/EDOperand.cpp +++ b/lib/MC/MCDisassembler/EDOperand.cpp @@ -152,10 +152,23 @@ int EDOperand::evaluate(uint64_t &result, uint64_t scaleAmount = Inst.Inst->getOperand(MCOpIndex+1).getImm(); unsigned indexReg = Inst.Inst->getOperand(MCOpIndex+2).getReg(); int64_t displacement = Inst.Inst->getOperand(MCOpIndex+3).getImm(); - //unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg(); - + uint64_t addr = 0; + unsigned segmentReg = Inst.Inst->getOperand(MCOpIndex+4).getReg(); + + if (segmentReg != 0 && Disassembler.Key.Arch == Triple::x86_64) { + unsigned fsID = Disassembler.registerIDWithName("FS"); + unsigned gsID = Disassembler.registerIDWithName("GS"); + + if (segmentReg == fsID || + segmentReg == gsID) { + uint64_t segmentBase; + if (!callback(&segmentBase, segmentReg, arg)) + addr += segmentBase; + } + } + if (baseReg) { uint64_t baseVal; if (callback(&baseVal, baseReg, arg)) @@ -175,7 +188,7 @@ int EDOperand::evaluate(uint64_t &result, result = addr; return 0; } - } + } // switch (operandType) break; case Triple::arm: case Triple::thumb: @@ -203,6 +216,7 @@ int EDOperand::evaluate(uint64_t &result, return 0; } } + break; } return -1; diff --git a/lib/MC/MCDisassembler/EDToken.cpp b/lib/MC/MCDisassembler/EDToken.cpp index 400e1649e9709..de770b41ef35f 100644 --- a/lib/MC/MCDisassembler/EDToken.cpp +++ b/lib/MC/MCDisassembler/EDToken.cpp @@ -194,6 +194,10 @@ int EDToken::tokenize(std::vector &tokens, tokens.push_back(token); } + // Free any parsed operands. + for (unsigned i = 0, e = parsedOperands.size(); i != e; ++i) + delete parsedOperands[i]; + return 0; } diff --git a/lib/MC/MCObjectStreamer.cpp b/lib/MC/MCObjectStreamer.cpp index 035826690cdfa..e67d9b03a95a3 100644 --- a/lib/MC/MCObjectStreamer.cpp +++ b/lib/MC/MCObjectStreamer.cpp @@ -242,7 +242,23 @@ void MCObjectStreamer::EmitDwarfAdvanceFrameAddr(const MCSymbol *LastLabel, void MCObjectStreamer::EmitValueToOffset(const MCExpr *Offset, unsigned char Value) { - new MCOrgFragment(*Offset, Value, getCurrentSectionData()); + int64_t Res; + if (Offset->EvaluateAsAbsolute(Res, getAssembler())) { + new MCOrgFragment(*Offset, Value, getCurrentSectionData()); + return; + } + + MCSymbol *CurrentPos = getContext().CreateTempSymbol(); + EmitLabel(CurrentPos); + MCSymbolRefExpr::VariantKind Variant = MCSymbolRefExpr::VK_None; + const MCExpr *Ref = + MCSymbolRefExpr::Create(CurrentPos, Variant, getContext()); + const MCExpr *Delta = + MCBinaryExpr::Create(MCBinaryExpr::Sub, Offset, Ref, getContext()); + + if (!Delta->EvaluateAsAbsolute(Res, getAssembler())) + report_fatal_error("expected assembly-time absolute expression"); + EmitFill(Res, Value, 0); } void MCObjectStreamer::Finish() { diff --git a/lib/MC/MCParser/AsmParser.cpp b/lib/MC/MCParser/AsmParser.cpp index c6d0da609b3b7..a84917ffb86a6 100644 --- a/lib/MC/MCParser/AsmParser.cpp +++ b/lib/MC/MCParser/AsmParser.cpp @@ -603,6 +603,8 @@ bool AsmParser::ParsePrimaryExpr(const MCExpr *&Res, SMLoc &EndLoc) { Lex(); // Eat the '('. return ParseParenExpr(Res, EndLoc); case AsmToken::LBrac: + if (!PlatformParser->HasBracketExpressions()) + return TokError("brackets expression not supported on this target"); Lex(); // Eat the '['. return ParseBracketExpr(Res, EndLoc); case AsmToken::Minus: diff --git a/lib/MC/MCParser/ELFAsmParser.cpp b/lib/MC/MCParser/ELFAsmParser.cpp index bfaf36a451b3d..dcf689a6f0e7f 100644 --- a/lib/MC/MCParser/ELFAsmParser.cpp +++ b/lib/MC/MCParser/ELFAsmParser.cpp @@ -30,9 +30,12 @@ class ELFAsmParser : public MCAsmParserExtension { bool ParseSectionSwitch(StringRef Section, unsigned Type, unsigned Flags, SectionKind Kind); + bool SeenIdent; public: - ELFAsmParser() {} + ELFAsmParser() : SeenIdent(false) { + BracketExpressionsSupported = true; + } virtual void Initialize(MCAsmParser &Parser) { // Call the base implementation. @@ -456,13 +459,12 @@ bool ELFAsmParser::ParseDirectiveIdent(StringRef, SMLoc) { SectionKind::getReadOnly(), 1, ""); - static bool First = true; - getStreamer().PushSection(); getStreamer().SwitchSection(Comment); - if (First) + if (!SeenIdent) { getStreamer().EmitIntValue(0, 1); - First = false; + SeenIdent = true; + } getStreamer().EmitBytes(Data, 0); getStreamer().EmitIntValue(0, 1); getStreamer().PopSection(); diff --git a/lib/MC/MCParser/MCAsmParserExtension.cpp b/lib/MC/MCParser/MCAsmParserExtension.cpp index c30d3067da590..3f25a14926b6a 100644 --- a/lib/MC/MCParser/MCAsmParserExtension.cpp +++ b/lib/MC/MCParser/MCAsmParserExtension.cpp @@ -10,7 +10,8 @@ #include "llvm/MC/MCParser/MCAsmParserExtension.h" using namespace llvm; -MCAsmParserExtension::MCAsmParserExtension() { +MCAsmParserExtension::MCAsmParserExtension() : + BracketExpressionsSupported(false) { } MCAsmParserExtension::~MCAsmParserExtension() { diff --git a/lib/MC/MCSectionMachO.cpp b/lib/MC/MCSectionMachO.cpp index b897c0bd6855e..577e93aed6bc6 100644 --- a/lib/MC/MCSectionMachO.cpp +++ b/lib/MC/MCSectionMachO.cpp @@ -101,16 +101,18 @@ void MCSectionMachO::PrintSwitchToSection(const MCAsmInfo &MAI, return; } - OS << ','; - unsigned SectionType = TAA & MCSectionMachO::SECTION_TYPE; assert(SectionType <= MCSectionMachO::LAST_KNOWN_SECTION_TYPE && "Invalid SectionType specified!"); - if (SectionTypeDescriptors[SectionType].AssemblerName) + if (SectionTypeDescriptors[SectionType].AssemblerName) { + OS << ','; OS << SectionTypeDescriptors[SectionType].AssemblerName; - else - OS << "<<" << SectionTypeDescriptors[SectionType].EnumName << ">>"; + } else { + // If we have no name for the attribute, stop here. + OS << '\n'; + return; + } // If we don't have any attributes, we're done. unsigned SectionAttrs = TAA & MCSectionMachO::SECTION_ATTRIBUTES; @@ -125,7 +127,9 @@ void MCSectionMachO::PrintSwitchToSection(const MCAsmInfo &MAI, // Check each attribute to see if we have it. char Separator = ','; - for (unsigned i = 0; SectionAttrDescriptors[i].AttrFlag; ++i) { + for (unsigned i = 0; + SectionAttrs != 0 && SectionAttrDescriptors[i].AttrFlag; + ++i) { // Check to see if we have this attribute. if ((SectionAttrDescriptors[i].AttrFlag & SectionAttrs) == 0) continue; @@ -207,7 +211,6 @@ std::string MCSectionMachO::ParseSectionSpecifier(StringRef Spec, // In. "between 1 and 16 characters"; // If there is no comma after the section, we're done. - TAA = 0; StubSize = 0; if (Comma.second.empty()) return ""; diff --git a/lib/MC/MCStreamer.cpp b/lib/MC/MCStreamer.cpp index 3dcdba13135f6..4b302c8602c98 100644 --- a/lib/MC/MCStreamer.cpp +++ b/lib/MC/MCStreamer.cpp @@ -20,8 +20,8 @@ using namespace llvm; MCStreamer::MCStreamer(MCContext &Ctx) : Context(Ctx) { - PrevSectionStack.push_back(NULL); - CurSectionStack.push_back(NULL); + const MCSection *section = NULL; + SectionStack.push_back(std::make_pair(section, section)); } MCStreamer::~MCStreamer() { diff --git a/lib/Support/APInt.cpp b/lib/Support/APInt.cpp index 77033428b577d..08f36d2af3a1e 100644 --- a/lib/Support/APInt.cpp +++ b/lib/Support/APInt.cpp @@ -1505,7 +1505,7 @@ APInt::ms APInt::magic() const { r2 = r2 - ad; } delta = ad - r2; - } while (q1.ule(delta) || (q1 == delta && r1 == 0)); + } while (q1.ult(delta) || (q1 == delta && r1 == 0)); mag.m = q2 + 1; if (d.isNegative()) mag.m = -mag.m; // resulting magic number diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h index 1fb88726d0dec..7e2183d7cd5e0 100644 --- a/lib/Target/ARM/ARMBaseInstrInfo.h +++ b/lib/Target/ARM/ARMBaseInstrInfo.h @@ -155,10 +155,11 @@ namespace ARMII { //===------------------------------------------------------------------===// // Code domain. DomainShift = 18, - DomainMask = 3 << DomainShift, + DomainMask = 7 << DomainShift, DomainGeneral = 0 << DomainShift, DomainVFP = 1 << DomainShift, DomainNEON = 2 << DomainShift, + DomainNEONA8 = 4 << DomainShift, //===------------------------------------------------------------------===// // Field shifts - such shifts are used to set field while generating diff --git a/lib/Target/ARM/ARMFastISel.cpp b/lib/Target/ARM/ARMFastISel.cpp index 9f295302db0e4..26f48b3083168 100644 --- a/lib/Target/ARM/ARMFastISel.cpp +++ b/lib/Target/ARM/ARMFastISel.cpp @@ -172,6 +172,7 @@ class ARMFastISel : public FastISel { unsigned ARMMaterializeGV(const GlobalValue *GV, EVT VT); unsigned ARMMoveToFPReg(EVT VT, unsigned SrcReg); unsigned ARMMoveToIntReg(EVT VT, unsigned SrcReg); + unsigned ARMSelectCallOp(const GlobalValue *GV); // Call handling routines. private: @@ -1633,6 +1634,25 @@ bool ARMFastISel::SelectRet(const Instruction *I) { return true; } +unsigned ARMFastISel::ARMSelectCallOp(const GlobalValue *GV) { + + // Depend our opcode for thumb on whether or not we're targeting an + // externally callable function. For libcalls we'll just pass a NULL GV + // in here. + bool isExternal = false; + if (!GV || GV->hasExternalLinkage()) isExternal = true; + + // Darwin needs the r9 versions of the opcodes. + bool isDarwin = Subtarget->isTargetDarwin(); + if (isThumb && isExternal) { + return isDarwin ? ARM::tBLXi_r9 : ARM::tBLXi; + } else if (isThumb) { + return isDarwin ? ARM::tBLr9 : ARM::tBL; + } else { + return isDarwin ? ARM::BLr9 : ARM::BL; + } +} + // A quick function that will emit a call for a named libcall in F with the // vector of passed arguments for the Instruction in I. We can assume that we // can emit a call for any libcall we can produce. This is an abridged version @@ -1694,20 +1714,17 @@ bool ARMFastISel::ARMEmitLibcall(const Instruction *I, RTLIB::Libcall Call) { // Issue the call, BLXr9 for darwin, BLX otherwise. This uses V5 ops. // TODO: Turn this into the table of arm call ops. MachineInstrBuilder MIB; - unsigned CallOpc; - if(isThumb) { - CallOpc = Subtarget->isTargetDarwin() ? ARM::tBLXi_r9 : ARM::tBLXi; + unsigned CallOpc = ARMSelectCallOp(NULL); + if(isThumb) // Explicitly adding the predicate here. MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CallOpc))) .addExternalSymbol(TLI.getLibcallName(Call)); - } else { - CallOpc = Subtarget->isTargetDarwin() ? ARM::BLr9 : ARM::BL; + else // Explicitly adding the predicate here. MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CallOpc)) .addExternalSymbol(TLI.getLibcallName(Call))); - } // Add implicit physical register uses to the call. for (unsigned i = 0, e = RegArgs.size(); i != e; ++i) @@ -1813,21 +1830,18 @@ bool ARMFastISel::SelectCall(const Instruction *I) { // Issue the call, BLXr9 for darwin, BLX otherwise. This uses V5 ops. // TODO: Turn this into the table of arm call ops. MachineInstrBuilder MIB; - unsigned CallOpc; + unsigned CallOpc = ARMSelectCallOp(GV); // Explicitly adding the predicate here. - if(isThumb) { - CallOpc = Subtarget->isTargetDarwin() ? ARM::tBLXi_r9 : ARM::tBLXi; + if(isThumb) // Explicitly adding the predicate here. MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CallOpc))) .addGlobalAddress(GV, 0, 0); - } else { - CallOpc = Subtarget->isTargetDarwin() ? ARM::BLr9 : ARM::BL; + else // Explicitly adding the predicate here. MIB = AddDefaultPred(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(CallOpc)) .addGlobalAddress(GV, 0, 0)); - } // Add implicit physical register uses to the call. for (unsigned i = 0, e = RegArgs.size(); i != e; ++i) diff --git a/lib/Target/ARM/ARMFrameLowering.cpp b/lib/Target/ARM/ARMFrameLowering.cpp index f42c6db84fd3e..68c33f098ec9e 100644 --- a/lib/Target/ARM/ARMFrameLowering.cpp +++ b/lib/Target/ARM/ARMFrameLowering.cpp @@ -215,7 +215,13 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF) const { AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset); // Move past area 3. - if (DPRCSSize > 0) MBBI++; + if (DPRCSSize > 0) { + MBBI++; + // Since vpush register list cannot have gaps, there may be multiple vpush + // instructions in the prologue. + while (MBBI->getOpcode() == ARM::VSTMDDB_UPD) + MBBI++; + } NumBytes = DPRCSOffset; if (NumBytes) { @@ -370,7 +376,13 @@ void ARMFrameLowering::emitEpilogue(MachineFunction &MF, emitSPUpdate(isARM, MBB, MBBI, dl, TII, NumBytes); // Increment past our save areas. - if (AFI->getDPRCalleeSavedAreaSize()) MBBI++; + if (AFI->getDPRCalleeSavedAreaSize()) { + MBBI++; + // Since vpop register list cannot have gaps, there may be multiple vpop + // instructions in the epilogue. + while (MBBI->getOpcode() == ARM::VLDMDIA_UPD) + MBBI++; + } if (AFI->getGPRCalleeSavedArea2Size()) MBBI++; if (AFI->getGPRCalleeSavedArea1Size()) MBBI++; } diff --git a/lib/Target/ARM/ARMHazardRecognizer.cpp b/lib/Target/ARM/ARMHazardRecognizer.cpp index 676b01e91c53a..e97ce50bc4294 100644 --- a/lib/Target/ARM/ARMHazardRecognizer.cpp +++ b/lib/Target/ARM/ARMHazardRecognizer.cpp @@ -21,17 +21,14 @@ static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, // FIXME: Detect integer instructions properly. const TargetInstrDesc &TID = MI->getDesc(); unsigned Domain = TID.TSFlags & ARMII::DomainMask; - if (Domain == ARMII::DomainVFP) { - unsigned Opcode = MI->getOpcode(); - if (Opcode == ARM::VSTRS || Opcode == ARM::VSTRD || - Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD) - return false; - } else if (Domain == ARMII::DomainNEON) { - if (MI->getDesc().mayStore() || MI->getDesc().mayLoad()) - return false; - } else + if (TID.mayStore()) return false; - return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI); + unsigned Opcode = TID.getOpcode(); + if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD) + return false; + if ((Domain & ARMII::DomainVFP) || (Domain & ARMII::DomainNEON)) + return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI); + return false; } ScheduleHazardRecognizer::HazardType diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index a506cffdba348..f0d5a7d7c2e7b 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -126,6 +126,7 @@ public: bool SelectAddrMode5(SDValue N, SDValue &Base, SDValue &Offset); bool SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr,SDValue &Align); + bool SelectAddrMode6Offset(SDNode *Op, SDValue N, SDValue &Offset); bool SelectAddrModePC(SDValue N, SDValue &Offset, SDValue &Label); @@ -886,6 +887,20 @@ bool ARMDAGToDAGISel::SelectAddrMode6(SDNode *Parent, SDValue N, SDValue &Addr, return true; } +bool ARMDAGToDAGISel::SelectAddrMode6Offset(SDNode *Op, SDValue N, + SDValue &Offset) { + LSBaseSDNode *LdSt = cast(Op); + ISD::MemIndexedMode AM = LdSt->getAddressingMode(); + if (AM != ISD::POST_INC) + return false; + Offset = N; + if (ConstantSDNode *NC = dyn_cast(N)) { + if (NC->getZExtValue() * 8 == LdSt->getMemoryVT().getSizeInBits()) + Offset = CurDAG->getRegister(0, MVT::i32); + } + return true; +} + bool ARMDAGToDAGISel::SelectAddrModePC(SDValue N, SDValue &Offset, SDValue &Label) { if (N.getOpcode() == ARMISD::PIC_ADD && N.hasOneUse()) { diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 1835ec0f00542..ab9f9e1571e34 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -2236,7 +2236,7 @@ ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, RC = ARM::GPRRegisterClass; // Transform the arguments stored in physical registers into virtual ones. - unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC, dl); + unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); SDValue ArgValue = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); SDValue ArgValue2; @@ -2250,7 +2250,7 @@ ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA, MachinePointerInfo::getFixedStack(FI), false, false, 0); } else { - Reg = MF.addLiveIn(NextVA.getLocReg(), RC, dl); + Reg = MF.addLiveIn(NextVA.getLocReg(), RC); ArgValue2 = DAG.getCopyFromReg(Root, dl, Reg, MVT::i32); } @@ -2331,7 +2331,7 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, llvm_unreachable("RegVT not supported by FORMAL_ARGUMENTS Lowering"); // Transform the arguments in physical registers into virtual ones. - unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC, dl); + unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); } @@ -2408,7 +2408,7 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain, else RC = ARM::GPRRegisterClass; - unsigned VReg = MF.addLiveIn(GPRArgRegs[NumGPRs], RC, dl); + unsigned VReg = MF.addLiveIn(GPRArgRegs[NumGPRs], RC); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, @@ -2838,8 +2838,51 @@ SDValue ARMTargetLowering::LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const { DebugLoc dl = Op.getDebugLoc(); EVT VT = Op.getValueType(); EVT SrcVT = Tmp1.getValueType(); - bool F2IisFast = Subtarget->isCortexA9() || - Tmp0.getOpcode() == ISD::BITCAST || Tmp0.getOpcode() == ARMISD::VMOVDRR; + bool InGPR = Tmp0.getOpcode() == ISD::BITCAST || + Tmp0.getOpcode() == ARMISD::VMOVDRR; + bool UseNEON = !InGPR && Subtarget->hasNEON(); + + if (UseNEON) { + // Use VBSL to copy the sign bit. + unsigned EncodedVal = ARM_AM::createNEONModImm(0x6, 0x80); + SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, + DAG.getTargetConstant(EncodedVal, MVT::i32)); + EVT OpVT = (VT == MVT::f32) ? MVT::v2i32 : MVT::v1i64; + if (VT == MVT::f64) + Mask = DAG.getNode(ARMISD::VSHL, dl, OpVT, + DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), + DAG.getConstant(32, MVT::i32)); + else /*if (VT == MVT::f32)*/ + Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); + if (SrcVT == MVT::f32) { + Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); + if (VT == MVT::f64) + Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, + DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), + DAG.getConstant(32, MVT::i32)); + } + Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); + Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); + + SDValue AllOnes = DAG.getTargetConstant(ARM_AM::createNEONModImm(0xe, 0xff), + MVT::i32); + AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); + SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, + DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); + + SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, + DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), + DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); + if (SrcVT == MVT::f32) { + Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); + Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, + DAG.getConstant(0, MVT::i32)); + } else { + Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); + } + + return Res; + } // Bitcast operand 1 to i32. if (SrcVT == MVT::f64) @@ -2847,37 +2890,24 @@ SDValue ARMTargetLowering::LowerFCOPYSIGN(SDValue Op, SelectionDAG &DAG) const { &Tmp1, 1).getValue(1); Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); - // If float to int conversion isn't going to be super expensive, then simply - // or in the signbit. - if (F2IisFast) { - SDValue Mask1 = DAG.getConstant(0x80000000, MVT::i32); - SDValue Mask2 = DAG.getConstant(0x7fffffff, MVT::i32); - Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); - if (VT == MVT::f32) { - Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, - DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); - return DAG.getNode(ISD::BITCAST, dl, MVT::f32, - DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); - } - - // f64: Or the high part with signbit and then combine two parts. - Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), - &Tmp0, 1); - SDValue Lo = Tmp0.getValue(0); - SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); - Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); - return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); + // Or in the signbit with integer operations. + SDValue Mask1 = DAG.getConstant(0x80000000, MVT::i32); + SDValue Mask2 = DAG.getConstant(0x7fffffff, MVT::i32); + Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); + if (VT == MVT::f32) { + Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, + DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); + return DAG.getNode(ISD::BITCAST, dl, MVT::f32, + DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); } - // Remove the signbit of operand 0. - Tmp0 = DAG.getNode(ISD::FABS, dl, VT, Tmp0); - - // If operand 1 signbit is one, then negate operand 0. - SDValue ARMcc; - SDValue Cmp = getARMCmp(Tmp1, DAG.getConstant(0, MVT::i32), - ISD::SETLT, ARMcc, DAG, dl); - SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); - return DAG.getNode(ARMISD::CNEG, dl, VT, Tmp0, Tmp0, ARMcc, CCR, Cmp); + // f64: Or the high part with signbit and then combine two parts. + Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), + &Tmp0, 1); + SDValue Lo = Tmp0.getValue(0); + SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); + Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); + return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); } SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{ @@ -2897,7 +2927,7 @@ SDValue ARMTargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const{ } // Return LR, which contains the return address. Mark it an implicit live-in. - unsigned Reg = MF.addLiveIn(ARM::LR, getRegClassFor(MVT::i32), dl); + unsigned Reg = MF.addLiveIn(ARM::LR, getRegClassFor(MVT::i32)); return DAG.getCopyFromReg(DAG.getEntryNode(), dl, Reg, VT); } diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index 765cba42d0bd9..359ac45cee1dc 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -127,13 +127,14 @@ def IndexModePost : IndexMode<2>; def IndexModeUpd : IndexMode<3>; // Instruction execution domain. -class Domain val> { - bits<2> Value = val; +class Domain val> { + bits<3> Value = val; } def GenericDomain : Domain<0>; def VFPDomain : Domain<1>; // Instructions in VFP domain only def NeonDomain : Domain<2>; // Instructions in Neon domain only def VFPNeonDomain : Domain<3>; // Instructions in both VFP & Neon domains +def VFPNeonA8Domain : Domain<5>; // Instructions in VFP & Neon under A8 //===----------------------------------------------------------------------===// // ARM special operands. @@ -249,7 +250,7 @@ class InstTemplate, let EncoderMethod = "getAddrMode6AddressOpValue"; } -def am6offset : Operand { +def am6offset : Operand, + ComplexPattern { let PrintMethod = "printAddrMode6OffsetOperand"; let MIOperandInfo = (ops GPR); let EncoderMethod = "getAddrMode6OffsetOpValue"; diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index 1e2e5504e6629..dc3d63e26ef5e 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -1402,31 +1402,42 @@ def : Pat<(store (extractelt (v2f32 DPR:$src), imm:$lane), addrmode6:$addr), def : Pat<(store (extractelt (v4f32 QPR:$src), imm:$lane), addrmode6:$addr), (VST1LNq32Pseudo addrmode6:$addr, QPR:$src, imm:$lane)>; -let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1 in { - // ...with address register writeback: -class VST1LNWB op11_8, bits<4> op7_4, string Dt> +class VST1LNWB op11_8, bits<4> op7_4, string Dt, ValueType Ty, + PatFrag StoreOp, SDNode ExtractOp> : NLdStLn<1, 0b00, op11_8, op7_4, (outs GPR:$wb), (ins addrmode6:$Rn, am6offset:$Rm, DPR:$Vd, nohash_imm:$lane), IIC_VST1lnu, "vst1", Dt, "\\{$Vd[$lane]\\}, $Rn$Rm", - "$Rn.addr = $wb", []>; + "$Rn.addr = $wb", + [(set GPR:$wb, (StoreOp (ExtractOp (Ty DPR:$Vd), imm:$lane), + addrmode6:$Rn, am6offset:$Rm))]>; +class VST1QLNWBPseudo + : VSTQLNWBPseudo { + let Pattern = [(set GPR:$wb, (StoreOp (ExtractOp (Ty QPR:$src), imm:$lane), + addrmode6:$addr, am6offset:$offset))]; +} -def VST1LNd8_UPD : VST1LNWB<0b0000, {?,?,?,0}, "8"> { +def VST1LNd8_UPD : VST1LNWB<0b0000, {?,?,?,0}, "8", v8i8, post_truncsti8, + NEONvgetlaneu> { let Inst{7-5} = lane{2-0}; } -def VST1LNd16_UPD : VST1LNWB<0b0100, {?,?,0,?}, "16"> { +def VST1LNd16_UPD : VST1LNWB<0b0100, {?,?,0,?}, "16", v4i16, post_truncsti16, + NEONvgetlaneu> { let Inst{7-6} = lane{1-0}; let Inst{4} = Rn{5}; } -def VST1LNd32_UPD : VST1LNWB<0b1000, {?,0,?,?}, "32"> { +def VST1LNd32_UPD : VST1LNWB<0b1000, {?,0,?,?}, "32", v2i32, post_store, + extractelt> { let Inst{7} = lane{0}; let Inst{5-4} = Rn{5-4}; } -def VST1LNq8Pseudo_UPD : VSTQLNWBPseudo; -def VST1LNq16Pseudo_UPD : VSTQLNWBPseudo; -def VST1LNq32Pseudo_UPD : VSTQLNWBPseudo; +def VST1LNq8Pseudo_UPD : VST1QLNWBPseudo; +def VST1LNq16Pseudo_UPD : VST1QLNWBPseudo; +def VST1LNq32Pseudo_UPD : VST1QLNWBPseudo; + +let mayStore = 1, neverHasSideEffects = 1, hasExtraSrcRegAllocReq = 1 in { // VST2LN : Vector Store (single 2-element structure from one lane) class VST2LN op11_8, bits<4> op7_4, string Dt> diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td index 920c5c98002af..29902833f2bb2 100644 --- a/lib/Target/ARM/ARMInstrVFP.td +++ b/lib/Target/ARM/ARMInstrVFP.td @@ -197,9 +197,9 @@ def VADDS : ASbIn<0b11100, 0b11, 0, 0, (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm", [(set SPR:$Sd, (fadd SPR:$Sn, SPR:$Sm))]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VSUBD : ADbI<0b11100, 0b11, 1, 0, @@ -211,9 +211,9 @@ def VSUBS : ASbIn<0b11100, 0b11, 1, 0, (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), IIC_fpALU32, "vsub", ".f32\t$Sd, $Sn, $Sm", [(set SPR:$Sd, (fsub SPR:$Sn, SPR:$Sm))]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VDIVD : ADbI<0b11101, 0b00, 0, 0, @@ -235,9 +235,9 @@ def VMULS : ASbIn<0b11100, 0b10, 0, 0, (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), IIC_fpMUL32, "vmul", ".f32\t$Sd, $Sn, $Sm", [(set SPR:$Sd, (fmul SPR:$Sn, SPR:$Sm))]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VNMULD : ADbI<0b11100, 0b10, 1, 0, @@ -249,9 +249,9 @@ def VNMULS : ASbI<0b11100, 0b10, 1, 0, (outs SPR:$Sd), (ins SPR:$Sn, SPR:$Sm), IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm", [(set SPR:$Sd, (fneg (fmul SPR:$Sn, SPR:$Sm)))]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } // Match reassociated forms only if not sign dependent rounding. @@ -271,9 +271,9 @@ def VCMPES : ASuI<0b11101, 0b11, 0b0100, 0b11, 0, (outs), (ins SPR:$Sd, SPR:$Sm), IIC_fpCMP32, "vcmpe", ".f32\t$Sd, $Sm", [(arm_cmpfp SPR:$Sd, SPR:$Sm)]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } // FIXME: Verify encoding after integrated assembler is working. @@ -286,9 +286,9 @@ def VCMPS : ASuI<0b11101, 0b11, 0b0100, 0b01, 0, (outs), (ins SPR:$Sd, SPR:$Sm), IIC_fpCMP32, "vcmp", ".f32\t$Sd, $Sm", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } } // Defs = [FPSCR] @@ -305,9 +305,9 @@ def VABSS : ASuIn<0b11101, 0b11, 0b0000, 0b11, 0, (outs SPR:$Sd), (ins SPR:$Sm), IIC_fpUNA32, "vabs", ".f32\t$Sd, $Sm", [(set SPR:$Sd, (fabs SPR:$Sm))]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } let Defs = [FPSCR] in { @@ -326,9 +326,9 @@ def VCMPEZS : ASuI<0b11101, 0b11, 0b0101, 0b11, 0, let Inst{3-0} = 0b0000; let Inst{5} = 0; - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } // FIXME: Verify encoding after integrated assembler is working. @@ -347,9 +347,9 @@ def VCMPZS : ASuI<0b11101, 0b11, 0b0101, 0b01, 0, let Inst{3-0} = 0b0000; let Inst{5} = 0; - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } } // Defs = [FPSCR] @@ -423,9 +423,9 @@ def VNEGS : ASuIn<0b11101, 0b11, 0b0001, 0b01, 0, (outs SPR:$Sd), (ins SPR:$Sm), IIC_fpUNA32, "vneg", ".f32\t$Sd, $Sm", [(set SPR:$Sd, (fneg SPR:$Sm))]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VSQRTD : ADuI<0b11101, 0b11, 0b0001, 0b11, 0, @@ -598,9 +598,9 @@ def VSITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010, [(set SPR:$Sd, (arm_sitof SPR:$Sm))]> { let Inst{7} = 1; // s32 - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VUITOD : AVConv1IDs_Encode<0b11101, 0b11, 0b1000, 0b1011, @@ -616,9 +616,9 @@ def VUITOS : AVConv1InSs_Encode<0b11101, 0b11, 0b1000, 0b1010, [(set SPR:$Sd, (arm_uitof SPR:$Sm))]> { let Inst{7} = 0; // u32 - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } // FP -> Int: @@ -671,9 +671,9 @@ def VTOSIZS : AVConv1InsS_Encode<0b11101, 0b11, 0b1101, 0b1010, [(set SPR:$Sd, (arm_ftosi SPR:$Sm))]> { let Inst{7} = 1; // Z bit - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VTOUIZD : AVConv1IsD_Encode<0b11101, 0b11, 0b1100, 0b1011, @@ -689,9 +689,9 @@ def VTOUIZS : AVConv1InsS_Encode<0b11101, 0b11, 0b1100, 0b1010, [(set SPR:$Sd, (arm_ftoui SPR:$Sm))]> { let Inst{7} = 1; // Z bit - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } // And the Z bit '0' variants, i.e. use the rounding mode specified by FPSCR. @@ -743,36 +743,36 @@ def VTOSHS : AVConv1XI<0b11101, 0b11, 0b1110, 0b1010, 0, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTSI, "vcvt", ".s16.f32\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VTOUHS : AVConv1XI<0b11101, 0b11, 0b1111, 0b1010, 0, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTSI, "vcvt", ".u16.f32\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VTOSLS : AVConv1XI<0b11101, 0b11, 0b1110, 0b1010, 1, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTSI, "vcvt", ".s32.f32\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VTOULS : AVConv1XI<0b11101, 0b11, 0b1111, 0b1010, 1, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTSI, "vcvt", ".u32.f32\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VTOSHD : AVConv1XI<0b11101, 0b11, 0b1110, 0b1011, 0, @@ -801,36 +801,36 @@ def VSHTOS : AVConv1XI<0b11101, 0b11, 0b1010, 0b1010, 0, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTIS, "vcvt", ".f32.s16\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VUHTOS : AVConv1XI<0b11101, 0b11, 0b1011, 0b1010, 0, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTIS, "vcvt", ".f32.u16\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VSLTOS : AVConv1XI<0b11101, 0b11, 0b1010, 0b1010, 1, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTIS, "vcvt", ".f32.s32\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VULTOS : AVConv1XI<0b11101, 0b11, 0b1011, 0b1010, 1, (outs SPR:$dst), (ins SPR:$a, i32imm:$fbits), IIC_fpCVTIS, "vcvt", ".f32.u32\t$dst, $a, $fbits", [/* For disassembly only; pattern left blank */]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def VSHTOD : AVConv1XI<0b11101, 0b11, 0b1010, 0b1011, 0, @@ -874,9 +874,9 @@ def VMLAS : ASbIn<0b11100, 0b00, 0, 0, SPR:$Sdin))]>, RegConstraint<"$Sdin = $Sd">, Requires<[HasVFP2,DontUseNEONForFP,UseFPVMLx]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def : Pat<(fadd_mlx DPR:$dstin, (fmul_su DPR:$a, (f64 DPR:$b))), @@ -901,9 +901,9 @@ def VMLSS : ASbIn<0b11100, 0b00, 1, 0, SPR:$Sdin))]>, RegConstraint<"$Sdin = $Sd">, Requires<[HasVFP2,DontUseNEONForFP,UseFPVMLx]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def : Pat<(fsub_mlx DPR:$dstin, (fmul_su DPR:$a, (f64 DPR:$b))), @@ -928,9 +928,9 @@ def VNMLAS : ASbI<0b11100, 0b01, 1, 0, SPR:$Sdin))]>, RegConstraint<"$Sdin = $Sd">, Requires<[HasVFP2,DontUseNEONForFP,UseFPVMLx]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def : Pat<(fsub_mlx (fneg (fmul_su DPR:$a, (f64 DPR:$b))), DPR:$dstin), @@ -954,9 +954,9 @@ def VNMLSS : ASbI<0b11100, 0b01, 0, 0, [(set SPR:$Sd, (fsub_mlx (fmul_su SPR:$Sn, SPR:$Sm), SPR:$Sdin))]>, RegConstraint<"$Sdin = $Sd">, Requires<[HasVFP2,DontUseNEONForFP,UseFPVMLx]> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } def : Pat<(fsub_mlx (fmul_su DPR:$a, (f64 DPR:$b)), DPR:$dstin), @@ -995,9 +995,9 @@ def VNEGScc : ASuI<0b11101, 0b11, 0b0001, 0b01, 0, IIC_fpUNA32, "vneg", ".f32\t$Sd, $Sm", [/*(set SPR:$Sd, (ARMcneg SPR:$Sn, SPR:$Sm, imm:$cc))*/]>, RegConstraint<"$Sn = $Sd"> { - // Some single precision VFP instructions may be executed on both NEON and VFP - // pipelines. - let D = VFPNeonDomain; + // Some single precision VFP instructions may be executed on both NEON and + // VFP pipelines on A8. + let D = VFPNeonA8Domain; } } // neverHasSideEffects diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 0bd740cfb28c0..1465984899c6f 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -171,7 +171,9 @@ ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV, // Materializable GVs (in JIT lazy compilation mode) do not require an extra // load from stub. - bool isDecl = GV->isDeclaration() && !GV->isMaterializable(); + bool isDecl = GV->hasAvailableExternallyLinkage(); + if (GV->isDeclaration() && !GV->isMaterializable()) + isDecl = true; if (!isTargetDarwin()) { // Extra load is needed for all externally visible. diff --git a/lib/Target/ARM/MLxExpansionPass.cpp b/lib/Target/ARM/MLxExpansionPass.cpp index f9e86eb36e04e..9a27e2f470648 100644 --- a/lib/Target/ARM/MLxExpansionPass.cpp +++ b/lib/Target/ARM/MLxExpansionPass.cpp @@ -132,22 +132,16 @@ unsigned MLxExpansion::getDefReg(MachineInstr *MI) const { } bool MLxExpansion::hasRAWHazard(unsigned Reg, MachineInstr *MI) const { - const TargetInstrDesc &TID = MI->getDesc(); // FIXME: Detect integer instructions properly. + const TargetInstrDesc &TID = MI->getDesc(); unsigned Domain = TID.TSFlags & ARMII::DomainMask; - if (Domain == ARMII::DomainVFP) { - unsigned Opcode = TID.getOpcode(); - if (Opcode == ARM::VSTRS || Opcode == ARM::VSTRD || - Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD) - return false; - } else if (Domain == ARMII::DomainNEON) { - if (TID.mayStore() || TID.mayLoad()) - return false; - } else { + if (TID.mayStore()) return false; - } - - return MI->readsRegister(Reg, TRI); + unsigned Opcode = TID.getOpcode(); + if (Opcode == ARM::VMOVRS || Opcode == ARM::VMOVRRD) + return false; + if ((Domain & ARMII::DomainVFP) || (Domain & ARMII::DomainNEON)) + return MI->readsRegister(Reg, TRI); return false; } diff --git a/lib/Target/ARM/NEONMoveFix.cpp b/lib/Target/ARM/NEONMoveFix.cpp index 97e54bfaed9e7..965665c2821ac 100644 --- a/lib/Target/ARM/NEONMoveFix.cpp +++ b/lib/Target/ARM/NEONMoveFix.cpp @@ -35,6 +35,7 @@ namespace { private: const TargetRegisterInfo *TRI; const ARMBaseInstrInfo *TII; + bool isA8; typedef DenseMap RegMap; @@ -43,6 +44,11 @@ namespace { char NEONMoveFixPass::ID = 0; } +static bool inNEONDomain(unsigned Domain, bool isA8) { + return (Domain & ARMII::DomainNEON) || + (isA8 && (Domain & ARMII::DomainNEONA8)); +} + bool NEONMoveFixPass::InsertMoves(MachineBasicBlock &MBB) { RegMap Defs; bool Modified = false; @@ -70,7 +76,7 @@ bool NEONMoveFixPass::InsertMoves(MachineBasicBlock &MBB) { Domain = ARMII::DomainNEON; } - if (Domain & ARMII::DomainNEON) { + if (inNEONDomain(Domain, isA8)) { // Convert VMOVD to VMOVDneon unsigned DestReg = MI->getOperand(0).getReg(); @@ -123,6 +129,7 @@ bool NEONMoveFixPass::runOnMachineFunction(MachineFunction &Fn) { TRI = TM.getRegisterInfo(); TII = static_cast(TM.getInstrInfo()); + isA8 = TM.getSubtarget().isCortexA8(); bool Modified = false; for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E; diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp index 2f67257f8fa11..9b1073be3c8e4 100644 --- a/lib/Target/ARM/Thumb2InstrInfo.cpp +++ b/lib/Target/ARM/Thumb2InstrInfo.cpp @@ -95,6 +95,12 @@ Thumb2InstrInfo::ReplaceTailWithBranchTo(MachineBasicBlock::iterator Tail, bool Thumb2InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const { + while (MBBI->isDebugValue()) { + ++MBBI; + if (MBBI == MBB.end()) + return false; + } + unsigned PredReg = 0; return llvm::getITInstrPredicate(MBBI, PredReg) == ARMCC::AL; } diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp index 9137d654edba4..c4f43ab9e4e77 100644 --- a/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/lib/Target/Alpha/AlphaISelLowering.cpp @@ -48,7 +48,6 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM, new TargetLoweringObjectFileELF()) { // Set up the TargetLowering object. //I am having problems with shr n i8 1 - setShiftAmountType(MVT::i64); setBooleanContents(ZeroOrOneBooleanContent); addRegisterClass(MVT::i64, Alpha::GPRCRegisterClass); diff --git a/lib/Target/Alpha/AlphaISelLowering.h b/lib/Target/Alpha/AlphaISelLowering.h index b429e9fc13902..cb98f921dd688 100644 --- a/lib/Target/Alpha/AlphaISelLowering.h +++ b/lib/Target/Alpha/AlphaISelLowering.h @@ -31,25 +31,25 @@ namespace llvm { /// GPRelHi/GPRelLo - These represent the high and low 16-bit /// parts of a global address respectively. - GPRelHi, GPRelLo, + GPRelHi, GPRelLo, /// RetLit - Literal Relocation of a Global RelLit, /// GlobalRetAddr - used to restore the return address GlobalRetAddr, - + /// CALL - Normal call. CALL, /// DIVCALL - used for special library calls for div and rem DivCall, - + /// return flag operand RET_FLAG, /// CHAIN = COND_BRANCH CHAIN, OPC, (G|F)PRC, DESTBB [, INFLAG] - This - /// corresponds to the COND_BRANCH pseudo instruction. + /// corresponds to the COND_BRANCH pseudo instruction. /// *PRC is the input register to compare to zero, /// OPC is the branch opcode to use (e.g. Alpha::BEQ), /// DESTBB is the destination block to branch to, and INFLAG is @@ -62,7 +62,9 @@ namespace llvm { class AlphaTargetLowering : public TargetLowering { public: explicit AlphaTargetLowering(TargetMachine &TM); - + + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i64; } + /// getSetCCResultType - Get the SETCC result ValueType virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const; @@ -92,7 +94,7 @@ namespace llvm { ConstraintWeight getSingleConstraintMatchWeight( AsmOperandInfo &info, const char *constraint) const; - std::vector + std::vector getRegClassForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; diff --git a/lib/Target/Blackfin/BlackfinISelLowering.cpp b/lib/Target/Blackfin/BlackfinISelLowering.cpp index dd27d0a0ff366..7c80eec3ba630 100644 --- a/lib/Target/Blackfin/BlackfinISelLowering.cpp +++ b/lib/Target/Blackfin/BlackfinISelLowering.cpp @@ -41,7 +41,6 @@ using namespace llvm; BlackfinTargetLowering::BlackfinTargetLowering(TargetMachine &TM) : TargetLowering(TM, new TargetLoweringObjectFileELF()) { - setShiftAmountType(MVT::i16); setBooleanContents(ZeroOrOneBooleanContent); setStackPointerRegisterToSaveRestore(BF::SP); setIntDivIsCheap(false); diff --git a/lib/Target/Blackfin/BlackfinISelLowering.h b/lib/Target/Blackfin/BlackfinISelLowering.h index 15a745fa87240..102c830688e26 100644 --- a/lib/Target/Blackfin/BlackfinISelLowering.h +++ b/lib/Target/Blackfin/BlackfinISelLowering.h @@ -32,6 +32,7 @@ namespace llvm { class BlackfinTargetLowering : public TargetLowering { public: BlackfinTargetLowering(TargetMachine &TM); + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i16; } virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const; virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; virtual void ReplaceNodeResults(SDNode *N, diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index e6511d008c2b7..743a4d7a0f78c 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -435,7 +435,6 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM) setOperationAction(ISD::FDIV, MVT::v4f32, Legal); - setShiftAmountType(MVT::i32); setBooleanContents(ZeroOrNegativeOneBooleanContent); setStackPointerRegisterToSaveRestore(SPU::R1); @@ -1219,7 +1218,7 @@ SPUTargetLowering::LowerFormalArguments(SDValue Chain, FuncInfo->setVarArgsFrameIndex( MFI->CreateFixedObject(StackSlotSize, ArgOffset, true)); SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT); - unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::R32CRegClass, dl); + unsigned VReg = MF.addLiveIn(ArgRegs[ArgRegIdx], &SPU::R32CRegClass); SDValue ArgVal = DAG.getRegister(VReg, MVT::v16i8); SDValue Store = DAG.getStore(Chain, dl, ArgVal, FIN, MachinePointerInfo(), false, false, 0); @@ -2190,7 +2189,7 @@ static SDValue LowerI8Math(SDValue Op, SelectionDAG &DAG, unsigned Opc, { SDValue N0 = Op.getOperand(0); // Everything has at least one operand DebugLoc dl = Op.getDebugLoc(); - EVT ShiftVT = TLI.getShiftAmountTy(); + EVT ShiftVT = TLI.getShiftAmountTy(N0.getValueType()); assert(Op.getValueType() == MVT::i8); switch (Opc) { @@ -3112,7 +3111,7 @@ SPUTargetLowering::getSingleConstraintMatchWeight( switch (*constraint) { default: weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint); - break; + break; //FIXME: Seems like the supported constraint letters were just copied // from PPC, as the following doesn't correspond to the GCC docs. // I'm leaving it so until someone adds the corresponding lowering support. diff --git a/lib/Target/CellSPU/SPUISelLowering.h b/lib/Target/CellSPU/SPUISelLowering.h index 95d44afe37c8f..dd48d7bafaef9 100644 --- a/lib/Target/CellSPU/SPUISelLowering.h +++ b/lib/Target/CellSPU/SPUISelLowering.h @@ -109,6 +109,8 @@ namespace llvm { /// getSetCCResultType - Return the ValueType for ISD::SETCC virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const; + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i32; } + //! Custom lowering hooks virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; @@ -179,9 +181,9 @@ namespace llvm { virtual bool isLegalICmpImmediate(int64_t Imm) const; - virtual bool isLegalAddressingMode(const AddrMode &AM, + virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const; - + /// After allocating this many registers, the allocator should feel /// register pressure. The value is a somewhat random guess, based on the /// number of non callee saved registers in the C calling convention. diff --git a/lib/Target/MBlaze/MBlazeISelLowering.cpp b/lib/Target/MBlaze/MBlazeISelLowering.cpp index 2f40bfc896016..f39826b1cf17e 100644 --- a/lib/Target/MBlaze/MBlazeISelLowering.cpp +++ b/lib/Target/MBlaze/MBlazeISelLowering.cpp @@ -907,7 +907,7 @@ LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, // Transform the arguments stored on // physical registers into virtual ones - unsigned Reg = MF.addLiveIn(ArgRegEnd, RC, dl); + unsigned Reg = MF.addLiveIn(ArgRegEnd, RC); SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); // If this is an 8 or 16-bit value, it has been passed promoted @@ -973,7 +973,7 @@ LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, for (; Start <= End; ++Start, ++StackLoc) { unsigned Reg = MBlazeRegisterInfo::getRegisterFromNumbering(Start); - unsigned LiveReg = MF.addLiveIn(Reg, RC, dl); + unsigned LiveReg = MF.addLiveIn(Reg, RC); SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, LiveReg, MVT::i32); int FI = MFI->CreateFixedObject(4, 0, true); diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp index 30ef4f5da08eb..a95d59c0576c8 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.cpp +++ b/lib/Target/MSP430/MSP430ISelLowering.cpp @@ -77,10 +77,6 @@ MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) : // Division is expensive setIntDivIsCheap(false); - // Even if we have only 1 bit shift here, we can perform - // shifts of the whole bitwidth 1 bit per step. - setShiftAmountType(MVT::i8); - setStackPointerRegisterToSaveRestore(MSP430::SPW); setBooleanContents(ZeroOrOneBooleanContent); setSchedulingPreference(Sched::Latency); @@ -330,7 +326,7 @@ MSP430TargetLowering::LowerCCCArguments(SDValue Chain, // Arguments passed in registers EVT RegVT = VA.getLocVT(); switch (RegVT.getSimpleVT().SimpleTy) { - default: + default: { #ifndef NDEBUG errs() << "LowerFormalArguments Unhandled argument type: " diff --git a/lib/Target/MSP430/MSP430ISelLowering.h b/lib/Target/MSP430/MSP430ISelLowering.h index 673c5433b96e6..19c9eac589f00 100644 --- a/lib/Target/MSP430/MSP430ISelLowering.h +++ b/lib/Target/MSP430/MSP430ISelLowering.h @@ -73,6 +73,8 @@ namespace llvm { public: explicit MSP430TargetLowering(MSP430TargetMachine &TM); + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i8; } + /// LowerOperation - Provide custom lowering hooks for some operations. virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index 8f623b859b554..70d00e4b5cc50 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -362,7 +362,6 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM) setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom); } - setShiftAmountType(MVT::i32); setBooleanContents(ZeroOrOneBooleanContent); if (TM.getSubtarget().isPPC64()) { @@ -1597,7 +1596,7 @@ PPCTargetLowering::LowerFormalArguments_SVR4( } // Transform the arguments stored in physical registers into virtual ones. - unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC, dl); + unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, ValVT); InVals.push_back(ArgValue); @@ -1689,7 +1688,7 @@ PPCTargetLowering::LowerFormalArguments_SVR4( // Get an existing live-in vreg, or add a new one. unsigned VReg = MF.getRegInfo().getLiveInVirtReg(GPArgRegs[GPRIndex]); if (!VReg) - VReg = MF.addLiveIn(GPArgRegs[GPRIndex], &PPC::GPRCRegClass, dl); + VReg = MF.addLiveIn(GPArgRegs[GPRIndex], &PPC::GPRCRegClass); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, @@ -1708,7 +1707,7 @@ PPCTargetLowering::LowerFormalArguments_SVR4( // Get an existing live-in vreg, or add a new one. unsigned VReg = MF.getRegInfo().getLiveInVirtReg(FPArgRegs[FPRIndex]); if (!VReg) - VReg = MF.addLiveIn(FPArgRegs[FPRIndex], &PPC::F8RCRegClass, dl); + VReg = MF.addLiveIn(FPArgRegs[FPRIndex], &PPC::F8RCRegClass); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::f64); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, @@ -1872,7 +1871,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin( InVals.push_back(FIN); if (ObjSize==1 || ObjSize==2) { if (GPR_idx != Num_GPR_Regs) { - unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass, dl); + unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getTruncStore(Val.getValue(1), dl, Val, FIN, MachinePointerInfo(), @@ -1891,7 +1890,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin( // to memory. ArgVal will be address of the beginning of // the object. if (GPR_idx != Num_GPR_Regs) { - unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass, dl); + unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); int FI = MFI->CreateFixedObject(PtrByteSize, ArgOffset, true); SDValue FIN = DAG.getFrameIndex(FI, PtrVT); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); @@ -1914,7 +1913,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin( case MVT::i32: if (!isPPC64) { if (GPR_idx != Num_GPR_Regs) { - unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass, dl); + unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); ++GPR_idx; } else { @@ -1928,7 +1927,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin( // FALLTHROUGH case MVT::i64: // PPC64 if (GPR_idx != Num_GPR_Regs) { - unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass, dl); + unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64); if (ObjectVT == MVT::i32) { @@ -1966,9 +1965,9 @@ PPCTargetLowering::LowerFormalArguments_Darwin( unsigned VReg; if (ObjectVT == MVT::f32) - VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F4RCRegClass, dl); + VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F4RCRegClass); else - VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F8RCRegClass, dl); + VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F8RCRegClass); ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); ++FPR_idx; @@ -1986,7 +1985,7 @@ PPCTargetLowering::LowerFormalArguments_Darwin( // Note that vector arguments in registers don't reserve stack space, // except in varargs functions. if (VR_idx != Num_VR_Regs) { - unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass, dl); + unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); ArgVal = DAG.getCopyFromReg(Chain, dl, VReg, ObjectVT); if (isVarArg) { while ((ArgOffset % 16) != 0) { @@ -2064,9 +2063,9 @@ PPCTargetLowering::LowerFormalArguments_Darwin( unsigned VReg; if (isPPC64) - VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass, dl); + VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); else - VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass, dl); + VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, diff --git a/lib/Target/PowerPC/PPCISelLowering.h b/lib/Target/PowerPC/PPCISelLowering.h index 80cab75b960ac..33daae9b5445c 100644 --- a/lib/Target/PowerPC/PPCISelLowering.h +++ b/lib/Target/PowerPC/PPCISelLowering.h @@ -29,36 +29,36 @@ namespace llvm { /// FSEL - Traditional three-operand fsel node. /// FSEL, - + /// FCFID - The FCFID instruction, taking an f64 operand and producing /// and f64 value containing the FP representation of the integer that /// was temporarily in the f64 operand. FCFID, - - /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 + + /// FCTI[D,W]Z - The FCTIDZ and FCTIWZ instructions, taking an f32 or f64 /// operand, producing an f64 value containing the integer representation /// of that FP value. FCTIDZ, FCTIWZ, - + /// STFIWX - The STFIWX instruction. The first operand is an input token /// chain, then an f64 value to store, then an address to store it to. STFIWX, - + // VMADDFP, VNMSUBFP - The VMADDFP and VNMSUBFP instructions, taking // three v4f32 operands and producing a v4f32 result. VMADDFP, VNMSUBFP, - + /// VPERM - The PPC VPERM Instruction. /// VPERM, - + /// Hi/Lo - These represent the high and low 16-bit parts of a global /// address respectively. These nodes have two operands, the first of /// which must be a TargetGlobalAddress, and the second of which must be a /// Constant. Selected naively, these turn into 'lis G+C' and 'li G+C', /// though these are usually folded into other nodes. Hi, Lo, - + TOC_ENTRY, /// The following three target-specific nodes are used for calls through @@ -80,37 +80,37 @@ namespace llvm { /// This instruction is lowered in PPCRegisterInfo::eliminateFrameIndex to /// compute an allocation on the stack. DYNALLOC, - + /// GlobalBaseReg - On Darwin, this node represents the result of the mflr /// at function entry, used for PIC code. GlobalBaseReg, - + /// These nodes represent the 32-bit PPC shifts that operate on 6-bit /// shift amounts. These nodes are generated by the multi-precision shift /// code. SRL, SRA, SHL, - + /// EXTSW_32 - This is the EXTSW instruction for use with "32-bit" /// registers. EXTSW_32, /// CALL - A direct function call. CALL_Darwin, CALL_SVR4, - + /// NOP - Special NOP which follows 64-bit SVR4 calls. NOP, /// CHAIN,FLAG = MTCTR(VAL, CHAIN[, INFLAG]) - Directly corresponds to a /// MTCTR instruction. MTCTR, - + /// CHAIN,FLAG = BCTRL(CHAIN, INFLAG) - Directly corresponds to a /// BCTRL instruction. BCTRL_Darwin, BCTRL_SVR4, - + /// Return with a flag operand, matched by 'blr' RET_FLAG, - + /// R32 = MFCR(CRREG, INFLAG) - Represents the MFCRpseud/MFOCRF /// instructions. This copies the bits corresponding to the specified /// CRREG into the resultant GPR. Bits corresponding to other CR regs @@ -122,20 +122,20 @@ namespace llvm { /// encoding for the OPC field to identify the compare. For example, 838 /// is VCMPGTSH. VCMP, - + /// RESVEC, OUTFLAG = VCMPo(LHS, RHS, OPC) - Represents one of the - /// altivec VCMP*o instructions. For lack of better number, we use the + /// altivec VCMP*o instructions. For lack of better number, we use the /// opcode number encoding for the OPC field to identify the compare. For /// example, 838 is VCMPGTSH. VCMPo, - + /// CHAIN = COND_BRANCH CHAIN, CRRC, OPC, DESTBB [, INFLAG] - This /// corresponds to the COND_BRANCH pseudo instruction. CRRC is the /// condition register to branch on, OPC is the branch opcode to use (e.g. /// PPC::BLE), DESTBB is the destination block to branch to, and INFLAG is /// an optional input flag argument. COND_BRANCH, - + // The following 5 instructions are used only as part of the // long double-to-int conversion sequence. @@ -150,7 +150,7 @@ namespace llvm { MTFSB1, /// F8RC, OUTFLAG = FADDRTZ F8RC, F8RC, INFLAG - This is an FADD done with - /// rounding towards zero. It has flags added so it won't move past the + /// rounding towards zero. It has flags added so it won't move past the /// FPSCR-setting instructions. FADDRTZ, @@ -174,14 +174,14 @@ namespace llvm { /// STD_32 - This is the STD instruction for use with "32-bit" registers. STD_32 = ISD::FIRST_TARGET_MEMORY_OPCODE, - - /// CHAIN = STBRX CHAIN, GPRC, Ptr, Type - This is a + + /// CHAIN = STBRX CHAIN, GPRC, Ptr, Type - This is a /// byte-swapping store instruction. It byte-swaps the low "Type" bits of /// the GPRC input, then stores it through Ptr. Type can be either i16 or /// i32. - STBRX, - - /// GPRC, CHAIN = LBRX CHAIN, Ptr, Type - This is a + STBRX, + + /// GPRC, CHAIN = LBRX CHAIN, Ptr, Type - This is a /// byte-swapping load instruction. It loads "Type" bits, byte swaps it, /// then puts it in the bottom bits of the GPRC. TYPE can be either i16 /// or i32. @@ -194,7 +194,7 @@ namespace llvm { /// isVPKUHUMShuffleMask - Return true if this is the shuffle mask for a /// VPKUHUM instruction. bool isVPKUHUMShuffleMask(ShuffleVectorSDNode *N, bool isUnary); - + /// isVPKUWUMShuffleMask - Return true if this is the shuffle mask for a /// VPKUWUM instruction. bool isVPKUWUMShuffleMask(ShuffleVectorSDNode *N, bool isUnary); @@ -208,16 +208,16 @@ namespace llvm { /// a VRGH* instruction with the specified unit size (1,2 or 4 bytes). bool isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize, bool isUnary); - + /// isVSLDOIShuffleMask - If this is a vsldoi shuffle mask, return the shift /// amount, otherwise return -1. int isVSLDOIShuffleMask(SDNode *N, bool isUnary); - + /// isSplatShuffleMask - Return true if the specified VECTOR_SHUFFLE operand /// specifies a splat of a single element that is suitable for input to /// VSPLTB/VSPLTH/VSPLTW. bool isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize); - + /// isAllNegativeZeroVector - Returns true if all elements of build_vector /// are -0.0. bool isAllNegativeZeroVector(SDNode *N); @@ -225,24 +225,26 @@ namespace llvm { /// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the /// specified isSplatShuffleMask VECTOR_SHUFFLE mask. unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize); - + /// get_VSPLTI_elt - If this is a build_vector of constants which can be /// formed by using a vspltis[bhw] instruction of the specified element /// size, return the constant being splatted. The ByteSize field indicates /// the number of bytes of each element [124] -> [bhw]. SDValue get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG); } - + class PPCTargetLowering : public TargetLowering { const PPCSubtarget &PPCSubTarget; public: explicit PPCTargetLowering(PPCTargetMachine &TM); - + /// getTargetNodeName() - This method returns the name of a target specific /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i32; } + /// getSetCCResultType - Return the ISD::SETCC ValueType virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const; @@ -253,19 +255,19 @@ namespace llvm { SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const; - + /// SelectAddressRegReg - Given the specified addressed, check to see if it /// can be represented as an indexed [r+r] operation. Returns false if it /// can be more efficiently represented with [r+imm]. bool SelectAddressRegReg(SDValue N, SDValue &Base, SDValue &Index, SelectionDAG &DAG) const; - + /// SelectAddressRegImm - Returns true if the address N can be represented /// by a base register plus a signed 16-bit displacement [r+imm], and if it /// is not better represented as reg+reg. bool SelectAddressRegImm(SDValue N, SDValue &Disp, SDValue &Base, SelectionDAG &DAG) const; - + /// SelectAddressRegRegOnly - Given the specified addressed, force it to be /// represented as an indexed [r+r] operation. bool SelectAddressRegRegOnly(SDValue N, SDValue &Base, SDValue &Index, @@ -277,7 +279,7 @@ namespace llvm { bool SelectAddressRegImmShift(SDValue N, SDValue &Disp, SDValue &Base, SelectionDAG &DAG) const; - + /// LowerOperation - Provide custom lowering hooks for some operations. /// virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; @@ -289,10 +291,10 @@ namespace llvm { SelectionDAG &DAG) const; virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; - + virtual void computeMaskedBitsForTargetNode(const SDValue Op, const APInt &Mask, - APInt &KnownZero, + APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth = 0) const; @@ -300,13 +302,13 @@ namespace llvm { virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; - MachineBasicBlock *EmitAtomicBinary(MachineInstr *MI, + MachineBasicBlock *EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *MBB, bool is64Bit, unsigned BinOpcode) const; - MachineBasicBlock *EmitPartwordAtomicBinary(MachineInstr *MI, - MachineBasicBlock *MBB, + MachineBasicBlock *EmitPartwordAtomicBinary(MachineInstr *MI, + MachineBasicBlock *MBB, bool is8bit, unsigned Opcode) const; - + ConstraintType getConstraintType(const std::string &Constraint) const; /// Examine constraint string and operand type and determine a weight value. @@ -314,7 +316,7 @@ namespace llvm { ConstraintWeight getSingleConstraintMatchWeight( AsmOperandInfo &info, const char *constraint) const; - std::pair + std::pair getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; @@ -329,11 +331,11 @@ namespace llvm { char ConstraintLetter, std::vector &Ops, SelectionDAG &DAG) const; - + /// isLegalAddressingMode - Return true if the addressing mode represented /// by AM is legal for this target, for a load/store of the specified type. virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty)const; - + /// isLegalAddressImmediate - Return true if the integer value can be used /// as the offset of the target addressing mode for load / store of the /// given type. @@ -344,7 +346,7 @@ namespace llvm { virtual bool isLegalAddressImmediate(GlobalValue *GV) const; virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; - + /// getOptimalMemOpType - Returns the target specific optimal type for load /// and store operations as a result of memset, memcpy, and memmove /// lowering. If DstAlign is zero that means it's safe to destination diff --git a/lib/Target/README.txt b/lib/Target/README.txt index 4e14fbbb09ba9..f85914b61d9d8 100644 --- a/lib/Target/README.txt +++ b/lib/Target/README.txt @@ -254,6 +254,20 @@ unsigned long reverse(unsigned v) { //===---------------------------------------------------------------------===// +[LOOP DELETION] + +We don't delete this output free loop, because trip count analysis doesn't +realize that it is finite (if it were infinite, it would be undefined). Not +having this blocks Loop Idiom from matching strlen and friends. + +void foo(char *C) { + int x = 0; + while (*C) + ++x,++C; +} + +//===---------------------------------------------------------------------===// + [LOOP RECOGNITION] These idioms should be recognized as popcount (see PR1488): @@ -287,6 +301,16 @@ unsigned int popcount(unsigned int input) { return count; } +This should be recognized as CLZ: rdar://8459039 + +unsigned clz_a(unsigned a) { + int i; + for (i=0;i<32;i++) + if (a & (1<<(31-i))) + return i; + return 32; +} + This sort of thing should be added to the loop idiom pass. //===---------------------------------------------------------------------===// diff --git a/lib/Target/Sparc/DelaySlotFiller.cpp b/lib/Target/Sparc/DelaySlotFiller.cpp index ee292758d1861..4b12852ef8730 100644 --- a/lib/Target/Sparc/DelaySlotFiller.cpp +++ b/lib/Target/Sparc/DelaySlotFiller.cpp @@ -79,6 +79,7 @@ namespace { MachineBasicBlock::iterator findDelayInstr(MachineBasicBlock &MBB, MachineBasicBlock::iterator slot); + bool needsUnimp(MachineBasicBlock::iterator I, unsigned &StructSize); }; char Filler::ID = 0; @@ -91,6 +92,7 @@ FunctionPass *llvm::createSparcDelaySlotFillerPass(TargetMachine &tm) { return new Filler(tm); } + /// runOnMachineBasicBlock - Fill in delay slots for the given basic block. /// We assume there is only one delay slot per delayed instruction. /// @@ -112,6 +114,13 @@ bool Filler::runOnMachineBasicBlock(MachineBasicBlock &MBB) { BuildMI(MBB, ++J, I->getDebugLoc(), TII->get(SP::NOP)); else MBB.splice(++J, &MBB, D); + unsigned structSize = 0; + if (needsUnimp(I, structSize)) { + MachineBasicBlock::iterator J = I; + ++J; //skip the delay filler. + BuildMI(MBB, ++J, I->getDebugLoc(), + TII->get(SP::UNIMP)).addImm(structSize); + } } return Changed; } @@ -287,6 +296,28 @@ bool Filler::isDelayFiller(MachineBasicBlock &MBB, { if (candidate == MBB.begin()) return false; + if (candidate->getOpcode() == SP::UNIMP) + return true; const TargetInstrDesc &prevdesc = (--candidate)->getDesc(); return prevdesc.hasDelaySlot(); } + +bool Filler::needsUnimp(MachineBasicBlock::iterator I, unsigned &StructSize) +{ + if (!I->getDesc().isCall()) + return false; + + unsigned structSizeOpNum = 0; + switch (I->getOpcode()) { + default: llvm_unreachable("Unknown call opcode."); + case SP::CALL: structSizeOpNum = 1; break; + case SP::JMPLrr: + case SP::JMPLri: structSizeOpNum = 2; break; + } + + const MachineOperand &MO = I->getOperand(structSizeOpNum); + if (!MO.isImm()) + return false; + StructSize = MO.getImm(); + return true; +} diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp index 196b87dd58d0e..70574c370f359 100644 --- a/lib/Target/Sparc/SparcISelLowering.cpp +++ b/lib/Target/Sparc/SparcISelLowering.cpp @@ -16,7 +16,9 @@ #include "SparcISelLowering.h" #include "SparcTargetMachine.h" #include "SparcMachineFunctionInfo.h" +#include "llvm/DerivedTypes.h" #include "llvm/Function.h" +#include "llvm/Module.h" #include "llvm/CodeGen/CallingConvLower.h" #include "llvm/CodeGen/MachineFrameInfo.h" #include "llvm/CodeGen/MachineFunction.h" @@ -116,6 +118,8 @@ SparcTargetLowering::LowerReturn(SDValue Chain, // Guarantee that all emitted copies are stuck together with flags. Flag = Chain.getValue(1); } + + unsigned RetAddrOffset = 8; //Call Inst + Delay Slot // If the function returns a struct, copy the SRetReturnReg to I0 if (MF.getFunction()->hasStructRetAttr()) { SparcMachineFunctionInfo *SFI = MF.getInfo(); @@ -127,11 +131,16 @@ SparcTargetLowering::LowerReturn(SDValue Chain, Flag = Chain.getValue(1); if (MF.getRegInfo().liveout_empty()) MF.getRegInfo().addLiveOut(SP::I0); + RetAddrOffset = 12; // CallInst + Delay Slot + Unimp } + SDValue RetAddrOffsetNode = DAG.getConstant(RetAddrOffset, MVT::i32); + if (Flag.getNode()) - return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain, Flag); - return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain); + return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain, + RetAddrOffsetNode, Flag); + return DAG.getNode(SPISD::RET_FLAG, dl, MVT::Other, Chain, + RetAddrOffsetNode); } /// LowerFormalArguments - V8 uses a very simple ABI, where all values are @@ -194,7 +203,7 @@ SparcTargetLowering::LowerFormalArguments(SDValue Chain, false, false, 0); } else { unsigned loReg = MF.addLiveIn(NextVA.getLocReg(), - &SP::IntRegsRegClass, dl); + &SP::IntRegsRegClass); LoVal = DAG.getCopyFromReg(Chain, dl, loReg, MVT::i32); } SDValue WholeValue = @@ -393,6 +402,7 @@ SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee, SmallVector MemOpChains; const unsigned StackOffset = 92; + bool hasStructRetAttr = false; // Walk the register/memloc assignments, inserting copies/loads. for (unsigned i = 0, realArgIdx = 0, byvalArgIdx = 0, e = ArgLocs.size(); i != e; @@ -433,6 +443,7 @@ SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee, MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, MachinePointerInfo(), false, false, 0)); + hasStructRetAttr = true; continue; } @@ -546,6 +557,8 @@ SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee, InFlag = Chain.getValue(1); } + unsigned SRetArgSize = (hasStructRetAttr)? getSRetArgSize(DAG, Callee):0; + // If the callee is a GlobalAddress node (quite common, every direct call is) // turn it into a TargetGlobalAddress node so that legalize doesn't hack it. // Likewise ExternalSymbol -> TargetExternalSymbol. @@ -559,6 +572,8 @@ SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee, SmallVector Ops; Ops.push_back(Chain); Ops.push_back(Callee); + if (hasStructRetAttr) + Ops.push_back(DAG.getTargetConstant(SRetArgSize, MVT::i32)); for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { unsigned Reg = RegsToPass[i].first; if (Reg >= SP::I0 && Reg <= SP::I7) @@ -600,7 +615,29 @@ SparcTargetLowering::LowerCall(SDValue Chain, SDValue Callee, return Chain; } +unsigned +SparcTargetLowering::getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const +{ + const Function *CalleeFn = 0; + if (GlobalAddressSDNode *G = dyn_cast(Callee)) { + CalleeFn = dyn_cast(G->getGlobal()); + } else if (ExternalSymbolSDNode *E = + dyn_cast(Callee)) { + const Function *Fn = DAG.getMachineFunction().getFunction(); + const Module *M = Fn->getParent(); + CalleeFn = M->getFunction(E->getSymbol()); + } + + if (!CalleeFn) + return 0; + assert(CalleeFn->hasStructRetAttr() && + "Callee does not have the StructRet attribute."); + + const PointerType *Ty = cast(CalleeFn->arg_begin()->getType()); + const Type *ElementTy = Ty->getElementType(); + return getTargetData()->getTypeAllocSize(ElementTy); +} //===----------------------------------------------------------------------===// // TargetLowering Implementation diff --git a/lib/Target/Sparc/SparcISelLowering.h b/lib/Target/Sparc/SparcISelLowering.h index 849e4010af6bc..7d02df8adcca1 100644 --- a/lib/Target/Sparc/SparcISelLowering.h +++ b/lib/Target/Sparc/SparcISelLowering.h @@ -101,6 +101,8 @@ namespace llvm { SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const; + + unsigned getSRetArgSize(SelectionDAG &DAG, SDValue Callee) const; }; } // end namespace llvm diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td index 107232357b3b7..cf5c48fd18d9d 100644 --- a/lib/Target/Sparc/SparcInstrInfo.td +++ b/lib/Target/Sparc/SparcInstrInfo.td @@ -124,7 +124,8 @@ def call : SDNode<"SPISD::CALL", SDT_SPCall, [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue, SDNPVariadic]>; -def retflag : SDNode<"SPISD::RET_FLAG", SDTNone, +def SDT_SPRet : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>; +def retflag : SDNode<"SPISD::RET_FLAG", SDT_SPRet, [SDNPHasChain, SDNPOptInGlue]>; def flushw : SDNode<"SPISD::FLUSHW", SDTNone, @@ -132,7 +133,7 @@ def flushw : SDNode<"SPISD::FLUSHW", SDTNone, def getPCX : Operand { let PrintMethod = "printGetPCX"; -} +} //===----------------------------------------------------------------------===// // SPARC Flag Conditions @@ -232,6 +233,9 @@ let hasSideEffects = 1, mayStore = 1 in { [(flushw)]>; } +def UNIMP : F2_1<0b000, (outs), (ins i32imm:$val), + "unimp $val", []>; + // FpMOVD/FpNEGD/FpABSD - These are lowered to single-precision ops by the // fpmover pass. let Predicates = [HasNoV9] in { // Only emit these in V8 mode. @@ -292,11 +296,13 @@ let usesCustomInserter = 1, Uses = [FCC] in { // Section A.3 - Synthetic Instructions, p. 85 // special cases of JMPL: let isReturn = 1, isTerminator = 1, hasDelaySlot = 1, isBarrier = 1 in { - let rd = O7.Num, rs1 = G0.Num, simm13 = 8 in - def RETL: F3_2<2, 0b111000, (outs), (ins), "retl", [(retflag)]>; + let rd = O7.Num, rs1 = G0.Num in + def RETL: F3_2<2, 0b111000, (outs), (ins i32imm:$val), + "jmp %o7+$val", [(retflag simm13:$val)]>; - let rd = I7.Num, rs1 = G0.Num, simm13 = 8 in - def RET: F3_2<2, 0b111000, (outs), (ins), "ret", []>; + let rd = I7.Num, rs1 = G0.Num in + def RET: F3_2<2, 0b111000, (outs), (ins i32imm:$val), + "jmp %i7+$val", []>; } // Section B.1 - Load Integer Instructions, p. 90 diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index d694f2e67edc9..90939c312065b 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -59,9 +59,6 @@ SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) : // Compute derived properties from the register classes computeRegisterProperties(); - // Set shifts properties - setShiftAmountType(MVT::i64); - // Provide all sorts of operation actions setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote); setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote); diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h index 51d2df3a30088..30192420dcb60 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.h +++ b/lib/Target/SystemZ/SystemZISelLowering.h @@ -57,6 +57,8 @@ namespace llvm { public: explicit SystemZTargetLowering(SystemZTargetMachine &TM); + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i64; } + /// LowerOperation - Provide custom lowering hooks for some operations. virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp index 1cac07a0e10a6..8fe549ba3126b 100644 --- a/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -775,6 +775,19 @@ ParseInstruction(StringRef Name, SMLoc NameLoc, delete &Op; } } + // Same hack for "in[bwl]? (%dx), %al" -> "inb %dx, %al". + if ((Name == "inb" || Name == "inw" || Name == "inl" || Name == "in") && + Operands.size() == 3) { + X86Operand &Op = *(X86Operand*)Operands.begin()[1]; + if (Op.isMem() && Op.Mem.SegReg == 0 && + isa(Op.Mem.Disp) && + cast(Op.Mem.Disp)->getValue() == 0 && + Op.Mem.BaseReg == MatchRegisterName("dx") && Op.Mem.IndexReg == 0) { + SMLoc Loc = Op.getEndLoc(); + Operands.begin()[1] = X86Operand::CreateReg(Op.Mem.BaseReg, Loc, Loc); + delete &Op; + } + } // FIXME: Hack to handle recognize s{hr,ar,hl} $1, . Canonicalize to // "shift ". diff --git a/lib/Target/X86/Disassembler/X86Disassembler.cpp b/lib/Target/X86/Disassembler/X86Disassembler.cpp index 691e2d7204ab9..f7777561b6a74 100644 --- a/lib/Target/X86/Disassembler/X86Disassembler.cpp +++ b/lib/Target/X86/Disassembler/X86Disassembler.cpp @@ -168,16 +168,16 @@ static void translateImmediate(MCInst &mcInst, uint64_t immediate, switch (insn.displacementSize) { default: break; - case 8: + case 1: type = TYPE_MOFFS8; break; - case 16: + case 2: type = TYPE_MOFFS16; break; - case 32: + case 4: type = TYPE_MOFFS32; break; - case 64: + case 8: type = TYPE_MOFFS64; break; } diff --git a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h index 4f4fbcdd394cf..d0dc8b56aea50 100644 --- a/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h +++ b/lib/Target/X86/Disassembler/X86DisassemblerDecoder.h @@ -399,7 +399,7 @@ struct InternalInstruction { /* The segment override type */ SegmentOverride segmentOverride; - /* Sizes of various critical pieces of data */ + /* Sizes of various critical pieces of data, in bytes */ uint8_t registerSize; uint8_t addressSize; uint8_t displacementSize; diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt index c10e1709f6677..abd1515cf5d70 100644 --- a/lib/Target/X86/README.txt +++ b/lib/Target/X86/README.txt @@ -1879,39 +1879,71 @@ _add32carry: //===---------------------------------------------------------------------===// -This: -char t(char c) { - return c/3; +The hot loop of 256.bzip2 contains code that looks a bit like this: + +int foo(char *P, char *Q, int x, int y) { + if (P[0] != Q[0]) + return P[0] < Q[0]; + if (P[1] != Q[1]) + return P[1] < Q[1]; + if (P[2] != Q[2]) + return P[2] < Q[2]; + return P[3] < Q[3]; } -Compiles to: $clang t.c -S -o - -O3 -mkernel -fomit-frame-pointer +In the real code, we get a lot more wrong than this. However, even in this +code we generate: -_t: ## @t - movslq %edi, %rax - imulq $-1431655765, %rax, %rcx ## imm = 0xFFFFFFFFAAAAAAAB - shrq $32, %rcx - addl %ecx, %eax - movl %eax, %ecx - shrl $31, %ecx - shrl %eax - addl %ecx, %eax - movsbl %al, %eax +_foo: ## @foo +## BB#0: ## %entry + movb (%rsi), %al + movb (%rdi), %cl + cmpb %al, %cl + je LBB0_2 +LBB0_1: ## %if.then + cmpb %al, %cl + jmp LBB0_5 +LBB0_2: ## %if.end + movb 1(%rsi), %al + movb 1(%rdi), %cl + cmpb %al, %cl + jne LBB0_1 +## BB#3: ## %if.end38 + movb 2(%rsi), %al + movb 2(%rdi), %cl + cmpb %al, %cl + jne LBB0_1 +## BB#4: ## %if.end60 + movb 3(%rdi), %al + cmpb 3(%rsi), %al +LBB0_5: ## %if.end60 + setl %al + movzbl %al, %eax ret -GCC gets: +Note that we generate jumps to LBB0_1 which does a redundant compare. The +redundant compare also forces the register values to be live, which prevents +folding one of the loads into the compare. In contrast, GCC 4.2 produces: -_t: - movl $86, %eax - imulb %dil - shrw $8, %ax - sarb $7, %dil - subb %dil, %al - movsbl %al,%eax +_foo: + movzbl (%rsi), %eax + cmpb %al, (%rdi) + jne L10 +L12: + movzbl 1(%rsi), %eax + cmpb %al, 1(%rdi) + jne L10 + movzbl 2(%rsi), %eax + cmpb %al, 2(%rdi) + jne L10 + movzbl 3(%rdi), %eax + cmpb 3(%rsi), %al +L10: + setl %al + movzbl %al, %eax ret -which is nicer. This also happens for int, not just char. +which is "perfect". //===---------------------------------------------------------------------===// - - diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp index 9d42ac2e470c2..6fa928462b28a 100644 --- a/lib/Target/X86/X86FastISel.cpp +++ b/lib/Target/X86/X86FastISel.cpp @@ -597,9 +597,13 @@ bool X86FastISel::X86SelectCallAddress(const Value *V, X86AddressMode &AM) { (AM.Base.Reg != 0 || AM.IndexReg != 0)) return false; - // Can't handle TLS or DLLImport. + // Can't handle DLLImport. + if (GV->hasDLLImportLinkage()) + return false; + + // Can't handle TLS. if (const GlobalVariable *GVar = dyn_cast(GV)) - if (GVar->isThreadLocal() || GVar->hasDLLImportLinkage()) + if (GVar->isThreadLocal()) return false; // Okay, we've committed to selecting this global. Set up the basic address. diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 27024b4e9e5a9..2f49dbcebf3c6 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -45,7 +45,6 @@ #include "llvm/ADT/Statistic.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/VectorExtras.h" -#include "llvm/Support/CommandLine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/Dwarf.h" #include "llvm/Support/ErrorHandling.h" @@ -56,10 +55,6 @@ using namespace dwarf; STATISTIC(NumTailCalls, "Number of tail calls"); -static cl::opt -Disable256Bit("disable-256bit", cl::Hidden, - cl::desc("Disable use of 256-bit vectors")); - // Forward declarations. static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1, SDValue V2); @@ -225,7 +220,6 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM) static MVT IntVTs[] = { MVT::i8, MVT::i16, MVT::i32, MVT::i64 }; // X86 is weird, it always uses i8 for shift amounts and setcc results. - setShiftAmountType(MVT::i8); setBooleanContents(ZeroOrOneBooleanContent); setSchedulingPreference(Sched::RegPressure); setStackPointerRegisterToSaveRestore(X86StackPtr); @@ -1713,7 +1707,7 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain, else llvm_unreachable("Unknown argument type!"); - unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC, dl); + unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC); ArgValue = DAG.getCopyFromReg(Chain, dl, Reg, RegVT); // If this is an 8 or 16-bit value, it is really passed promoted to 32 @@ -1845,7 +1839,7 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain, SDValue FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(), RSFIN, DAG.getIntPtrConstant(Offset)); unsigned VReg = MF.addLiveIn(GPR64ArgRegs[NumIntRegs], - X86::GR64RegisterClass, dl); + X86::GR64RegisterClass); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64); SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN, @@ -1861,7 +1855,7 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain, SmallVector SaveXMMOps; SaveXMMOps.push_back(Chain); - unsigned AL = MF.addLiveIn(X86::AL, X86::GR8RegisterClass, dl); + unsigned AL = MF.addLiveIn(X86::AL, X86::GR8RegisterClass); SDValue ALVal = DAG.getCopyFromReg(DAG.getEntryNode(), dl, AL, MVT::i8); SaveXMMOps.push_back(ALVal); @@ -1872,7 +1866,7 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain, for (; NumXMMRegs != TotalNumXMMRegs; ++NumXMMRegs) { unsigned VReg = MF.addLiveIn(XMMArgRegs64Bit[NumXMMRegs], - X86::VR128RegisterClass, dl); + X86::VR128RegisterClass); SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::v4f32); SaveXMMOps.push_back(Val); } @@ -2693,6 +2687,10 @@ static bool isTargetShuffle(unsigned Opcode) { case X86ISD::MOVSD: case X86ISD::UNPCKLPS: case X86ISD::UNPCKLPD: + case X86ISD::VUNPCKLPS: + case X86ISD::VUNPCKLPD: + case X86ISD::VUNPCKLPSY: + case X86ISD::VUNPCKLPDY: case X86ISD::PUNPCKLWD: case X86ISD::PUNPCKLBW: case X86ISD::PUNPCKLDQ: @@ -2760,6 +2758,10 @@ static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, case X86ISD::MOVSD: case X86ISD::UNPCKLPS: case X86ISD::UNPCKLPD: + case X86ISD::VUNPCKLPS: + case X86ISD::VUNPCKLPD: + case X86ISD::VUNPCKLPSY: + case X86ISD::VUNPCKLPDY: case X86ISD::PUNPCKLWD: case X86ISD::PUNPCKLBW: case X86ISD::PUNPCKLDQ: @@ -4178,7 +4180,8 @@ static SDValue getVShift(bool isLeft, EVT VT, SDValue SrcOp, SrcOp = DAG.getNode(ISD::BITCAST, dl, ShVT, SrcOp); return DAG.getNode(ISD::BITCAST, dl, VT, DAG.getNode(Opc, dl, ShVT, SrcOp, - DAG.getConstant(NumBits, TLI.getShiftAmountTy()))); + DAG.getConstant(NumBits, + TLI.getShiftAmountTy(SrcOp.getValueType())))); } SDValue @@ -4327,16 +4330,15 @@ X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const { // For AVX-length vectors, build the individual 128-bit pieces and // use shuffles to put them in place. - if (VT.getSizeInBits() > 256 && - Subtarget->hasAVX() && - !Disable256Bit && + if (VT.getSizeInBits() > 256 && + Subtarget->hasAVX() && !ISD::isBuildVectorAllZeros(Op.getNode())) { SmallVector V; V.resize(NumElems); for (unsigned i = 0; i < NumElems; ++i) { V[i] = Op.getOperand(i); } - + EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElems/2); // Build the lower subvector. @@ -5044,7 +5046,8 @@ SDValue LowerVECTOR_SHUFFLEv16i8(ShuffleVectorSDNode *SVOp, DAG.getIntPtrConstant(Elt1 / 2)); if ((Elt1 & 1) == 0) InsElt = DAG.getNode(ISD::SHL, dl, MVT::i16, InsElt, - DAG.getConstant(8, TLI.getShiftAmountTy())); + DAG.getConstant(8, + TLI.getShiftAmountTy(InsElt.getValueType()))); else if (Elt0 >= 0) InsElt = DAG.getNode(ISD::AND, dl, MVT::i16, InsElt, DAG.getConstant(0xFF00, MVT::i16)); @@ -5058,7 +5061,8 @@ SDValue LowerVECTOR_SHUFFLEv16i8(ShuffleVectorSDNode *SVOp, Elt0Src, DAG.getIntPtrConstant(Elt0 / 2)); if ((Elt0 & 1) != 0) InsElt0 = DAG.getNode(ISD::SRL, dl, MVT::i16, InsElt0, - DAG.getConstant(8, TLI.getShiftAmountTy())); + DAG.getConstant(8, + TLI.getShiftAmountTy(InsElt0.getValueType()))); else if (Elt1 >= 0) InsElt0 = DAG.getNode(ISD::AND, dl, MVT::i16, InsElt0, DAG.getConstant(0x00FF, MVT::i16)); @@ -5475,7 +5479,7 @@ SDValue getMOVLP(SDValue &Op, DebugLoc &dl, SelectionDAG &DAG, bool HasSSE2) { // Both of them can't be memory operations though. if (MayFoldVectorLoad(V1) && MayFoldVectorLoad(V2)) CanFoldLoad = false; - + if (CanFoldLoad) { if (HasSSE2 && NumElems == 2) return getTargetShuffleNode(X86ISD::MOVLPD, dl, VT, V1, V2, DAG); @@ -6088,7 +6092,7 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const { SDValue ScaledN2 = N2; if (Upper) ScaledN2 = DAG.getNode(ISD::SUB, dl, N2.getValueType(), N2, - DAG.getConstant(NumElems / + DAG.getConstant(NumElems / (VT.getSizeInBits() / 128), N2.getValueType())); Op = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubN0.getValueType(), SubN0, @@ -9327,6 +9331,10 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { case X86ISD::MOVSS: return "X86ISD::MOVSS"; case X86ISD::UNPCKLPS: return "X86ISD::UNPCKLPS"; case X86ISD::UNPCKLPD: return "X86ISD::UNPCKLPD"; + case X86ISD::VUNPCKLPS: return "X86ISD::VUNPCKLPS"; + case X86ISD::VUNPCKLPD: return "X86ISD::VUNPCKLPD"; + case X86ISD::VUNPCKLPSY: return "X86ISD::VUNPCKLPSY"; + case X86ISD::VUNPCKLPDY: return "X86ISD::VUNPCKLPDY"; case X86ISD::UNPCKHPS: return "X86ISD::UNPCKHPS"; case X86ISD::UNPCKHPD: return "X86ISD::UNPCKHPD"; case X86ISD::PUNPCKLBW: return "X86ISD::PUNPCKLBW"; @@ -11984,6 +11992,10 @@ SDValue X86TargetLowering::PerformDAGCombine(SDNode *N, case X86ISD::PUNPCKLQDQ: case X86ISD::UNPCKLPS: case X86ISD::UNPCKLPD: + case X86ISD::VUNPCKLPS: + case X86ISD::VUNPCKLPD: + case X86ISD::VUNPCKLPSY: + case X86ISD::VUNPCKLPDY: case X86ISD::MOVHLPS: case X86ISD::MOVLHPS: case X86ISD::PSHUFD: diff --git a/lib/Target/X86/X86ISelLowering.h b/lib/Target/X86/X86ISelLowering.h index 419da3742cf81..6ec4a7de75580 100644 --- a/lib/Target/X86/X86ISelLowering.h +++ b/lib/Target/X86/X86ISelLowering.h @@ -159,16 +159,16 @@ namespace llvm { /// PSHUFB - Shuffle 16 8-bit values within a vector. PSHUFB, - + /// PANDN - and with not'd value. PANDN, - + /// PSIGNB/W/D - Copy integer sign. - PSIGNB, PSIGNW, PSIGND, - + PSIGNB, PSIGNW, PSIGND, + /// PBLENDVB - Variable blend PBLENDVB, - + /// FMAX, FMIN - Floating point max and min. /// FMAX, FMIN, @@ -212,7 +212,7 @@ namespace llvm { // ADD, SUB, SMUL, etc. - Arithmetic operations with FLAGS results. ADD, SUB, ADC, SBB, SMUL, INC, DEC, OR, XOR, AND, - + UMUL, // LOW, HI, FLAGS = umul LHS, RHS // MUL_IMM - X86 specific multiply by immediate. @@ -248,6 +248,10 @@ namespace llvm { MOVSS, UNPCKLPS, UNPCKLPD, + VUNPCKLPS, + VUNPCKLPD, + VUNPCKLPSY, + VUNPCKLPDY, UNPCKHPS, UNPCKHPD, PUNPCKLBW, @@ -463,6 +467,8 @@ namespace llvm { virtual unsigned getJumpTableEncoding() const; + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i8; } + virtual const MCExpr * LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI, const MachineBasicBlock *MBB, unsigned uid, diff --git a/lib/Target/X86/X86InstrFormats.td b/lib/Target/X86/X86InstrFormats.td index 344c14c112a0e..0660072589e4c 100644 --- a/lib/Target/X86/X86InstrFormats.td +++ b/lib/Target/X86/X86InstrFormats.td @@ -41,6 +41,8 @@ def MRM_F8 : Format<41>; def MRM_F9 : Format<42>; def RawFrmImm8 : Format<43>; def RawFrmImm16 : Format<44>; +def MRM_D0 : Format<45>; +def MRM_D1 : Format<46>; // ImmType - This specifies the immediate type used by an instruction. This is // part of the ad-hoc solution used to emit machine instruction encodings by our diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp index ceb1b65398263..76a9b12b8aad8 100644 --- a/lib/Target/X86/X86InstrInfo.cpp +++ b/lib/Target/X86/X86InstrInfo.cpp @@ -369,8 +369,6 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::IMUL32rri8, X86::IMUL32rmi8, 0 }, { X86::IMUL64rri32, X86::IMUL64rmi32, 0 }, { X86::IMUL64rri8, X86::IMUL64rmi8, 0 }, - { X86::Int_CMPSDrr, X86::Int_CMPSDrm, 0 }, - { X86::Int_CMPSSrr, X86::Int_CMPSSrm, 0 }, { X86::Int_COMISDrr, X86::Int_COMISDrm, 0 }, { X86::Int_COMISSrr, X86::Int_COMISSrm, 0 }, { X86::Int_CVTDQ2PDrr, X86::Int_CVTDQ2PDrm, 16 }, @@ -568,6 +566,8 @@ X86InstrInfo::X86InstrInfo(X86TargetMachine &tm) { X86::IMUL16rr, X86::IMUL16rm, 0 }, { X86::IMUL32rr, X86::IMUL32rm, 0 }, { X86::IMUL64rr, X86::IMUL64rm, 0 }, + { X86::Int_CMPSDrr, X86::Int_CMPSDrm, 0 }, + { X86::Int_CMPSSrr, X86::Int_CMPSSrm, 0 }, { X86::MAXPDrr, X86::MAXPDrm, 16 }, { X86::MAXPDrr_Int, X86::MAXPDrm_Int, 16 }, { X86::MAXPSrr, X86::MAXPSrm, 16 }, diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h index 1d44207872732..fcb5a25104ac4 100644 --- a/lib/Target/X86/X86InstrInfo.h +++ b/lib/Target/X86/X86InstrInfo.h @@ -311,6 +311,8 @@ namespace X86II { MRM_F0 = 40, MRM_F8 = 41, MRM_F9 = 42, + MRM_D0 = 45, + MRM_D1 = 46, /// RawFrmImm8 - This is used for the ENTER instruction, which has two /// immediates, the first of which is a 16-bit immediate (specified by @@ -577,6 +579,8 @@ namespace X86II { case X86II::MRM_F0: case X86II::MRM_F8: case X86II::MRM_F9: + case X86II::MRM_D0: + case X86II::MRM_D1: return -1; } } diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 87dc4bece7420..f832a7c85a8a5 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -1296,6 +1296,9 @@ def : MnemonicAlias<"lret", "lretl">; def : MnemonicAlias<"leavel", "leave">, Requires<[In32BitMode]>; def : MnemonicAlias<"leaveq", "leave">, Requires<[In64BitMode]>; +def : MnemonicAlias<"loopz", "loope">; +def : MnemonicAlias<"loopnz", "loopne">; + def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>; def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>; def : MnemonicAlias<"popf", "popfl">, Requires<[In32BitMode]>; diff --git a/lib/Target/X86/X86InstrSystem.td b/lib/Target/X86/X86InstrSystem.td index 1a58ba0f96ef7..6a24d145c6967 100644 --- a/lib/Target/X86/X86InstrSystem.td +++ b/lib/Target/X86/X86InstrSystem.td @@ -388,3 +388,8 @@ def CPUID : I<0xA2, RawFrm, (outs), (ins), "cpuid", []>, TB; def INVD : I<0x08, RawFrm, (outs), (ins), "invd", []>, TB; def WBINVD : I<0x09, RawFrm, (outs), (ins), "wbinvd", []>, TB; +let Defs = [RDX, RAX], Uses = [RCX] in + def XGETBV : I<0x01, MRM_D0, (outs), (ins), "xgetbv", []>, TB; + +let Uses = [RDX, RAX, RCX] in + def XSETBV : I<0x01, MRM_D1, (outs), (ins), "xsetbv", []>, TB; diff --git a/lib/Target/X86/X86MCCodeEmitter.cpp b/lib/Target/X86/X86MCCodeEmitter.cpp index e6dc74e65d795..0e3b5711f2b5e 100644 --- a/lib/Target/X86/X86MCCodeEmitter.cpp +++ b/lib/Target/X86/X86MCCodeEmitter.cpp @@ -979,6 +979,14 @@ EncodeInstruction(const MCInst &MI, raw_ostream &OS, EmitByte(BaseOpcode, CurByte, OS); EmitByte(0xF9, CurByte, OS); break; + case X86II::MRM_D0: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xD0, CurByte, OS); + break; + case X86II::MRM_D1: + EmitByte(BaseOpcode, CurByte, OS); + EmitByte(0xD1, CurByte, OS); + break; } // If there is a remaining operand, it must be a trailing immediate. Emit it diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index de768561f111c..1ee73123bbc61 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -342,9 +342,10 @@ X86Subtarget::X86Subtarget(const std::string &TT, const std::string &FS, assert((!Is64Bit || HasX86_64) && "64-bit code requested on a subtarget that doesn't support it!"); - // Stack alignment is 16 bytes on Darwin and Linux (both 32 and 64 bit) and - // for all 64-bit targets. - if (isTargetDarwin() || isTargetLinux() || Is64Bit) + // Stack alignment is 16 bytes on Darwin, FreeBSD, Linux and Solaris (both + // 32 and 64 bit) and for all 64-bit targets. + if (isTargetDarwin() || isTargetFreeBSD() || isTargetLinux() || + isTargetSolaris() || Is64Bit) stackAlignment = 16; if (StackAlignment) diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index 8a119b43cd91e..0a62a029554c7 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -166,6 +166,8 @@ public: bool hasVectorUAMem() const { return HasVectorUAMem; } bool isTargetDarwin() const { return TargetTriple.getOS() == Triple::Darwin; } + bool isTargetFreeBSD() const { return TargetTriple.getOS() == Triple::FreeBSD; } + bool isTargetSolaris() const { return TargetTriple.getOS() == Triple::Solaris; } // ELF is a reasonably sane default and the only other X86 targets we // support are Darwin and Windows. Just use "not those". diff --git a/lib/Target/XCore/XCoreISelLowering.cpp b/lib/Target/XCore/XCoreISelLowering.cpp index 828d6f92caf40..4817787d75159 100644 --- a/lib/Target/XCore/XCoreISelLowering.cpp +++ b/lib/Target/XCore/XCoreISelLowering.cpp @@ -42,9 +42,9 @@ using namespace llvm; const char *XCoreTargetLowering:: -getTargetNodeName(unsigned Opcode) const +getTargetNodeName(unsigned Opcode) const { - switch (Opcode) + switch (Opcode) { case XCoreISD::BL : return "XCoreISD::BL"; case XCoreISD::PCRelativeWrapper : return "XCoreISD::PCRelativeWrapper"; @@ -77,7 +77,6 @@ XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM) // Division is expensive setIntDivIsCheap(false); - setShiftAmountType(MVT::i32); setStackPointerRegisterToSaveRestore(XCore::SP); setSchedulingPreference(Sched::RegPressure); @@ -95,7 +94,7 @@ XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM) // Stop the combiner recombining select and set_cc setOperationAction(ISD::SELECT_CC, MVT::Other, Expand); - + // 64bit setOperationAction(ISD::ADD, MVT::i64, Custom); setOperationAction(ISD::SUB, MVT::i64, Custom); @@ -106,14 +105,14 @@ XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM) setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand); setOperationAction(ISD::SRA_PARTS, MVT::i32, Expand); setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand); - + // Bit Manipulation setOperationAction(ISD::CTPOP, MVT::i32, Expand); setOperationAction(ISD::ROTL , MVT::i32, Expand); setOperationAction(ISD::ROTR , MVT::i32, Expand); - + setOperationAction(ISD::TRAP, MVT::Other, Legal); - + // Jump tables. setOperationAction(ISD::BR_JT, MVT::Other, Custom); @@ -122,7 +121,7 @@ XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM) // Thread Local Storage setOperationAction(ISD::GlobalTLSAddress, MVT::i32, Custom); - + // Conversion of i64 -> double produces constantpool nodes setOperationAction(ISD::ConstantPool, MVT::i32, Custom); @@ -143,7 +142,7 @@ XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM) setOperationAction(ISD::VACOPY, MVT::Other, Expand); setOperationAction(ISD::VAARG, MVT::Other, Custom); setOperationAction(ISD::VASTART, MVT::Other, Custom); - + // Dynamic stack setOperationAction(ISD::STACKSAVE, MVT::Other, Expand); setOperationAction(ISD::STACKRESTORE, MVT::Other, Expand); @@ -163,7 +162,7 @@ XCoreTargetLowering::XCoreTargetLowering(XCoreTargetMachine &XTM) SDValue XCoreTargetLowering:: LowerOperation(SDValue Op, SelectionDAG &DAG) const { - switch (Op.getOpcode()) + switch (Op.getOpcode()) { case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG); case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG); @@ -414,7 +413,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const { SDValue Chain = LD->getChain(); SDValue BasePtr = LD->getBasePtr(); DebugLoc DL = Op.getDebugLoc(); - + SDValue Base; int64_t Offset; if (!LD->isVolatile() && @@ -437,10 +436,10 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const { SDValue HighOffset = DAG.getConstant((Offset & ~0x3) + 4, MVT::i32); SDValue LowShift = DAG.getConstant((Offset & 0x3) * 8, MVT::i32); SDValue HighShift = DAG.getConstant(32 - (Offset & 0x3) * 8, MVT::i32); - + SDValue LowAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base, LowOffset); SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, Base, HighOffset); - + SDValue Low = DAG.getLoad(getPointerTy(), DL, Chain, LowAddr, MachinePointerInfo(), false, false, 0); SDValue High = DAG.getLoad(getPointerTy(), DL, Chain, @@ -453,7 +452,7 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const { SDValue Ops[] = { Result, Chain }; return DAG.getMergeValues(Ops, 2, DL); } - + if (LD->getAlignment() == 2) { SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, BasePtr, LD->getPointerInfo(), MVT::i16, @@ -473,16 +472,16 @@ LowerLOAD(SDValue Op, SelectionDAG &DAG) const { SDValue Ops[] = { Result, Chain }; return DAG.getMergeValues(Ops, 2, DL); } - + // Lower to a call to __misaligned_load(BasePtr). const Type *IntPtrTy = getTargetData()->getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; - + Entry.Ty = IntPtrTy; Entry.Node = BasePtr; Args.push_back(Entry); - + std::pair CallResult = LowerCallTo(Chain, IntPtrTy, false, false, false, false, 0, CallingConv::C, false, @@ -515,7 +514,7 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) const SDValue BasePtr = ST->getBasePtr(); SDValue Value = ST->getValue(); DebugLoc dl = Op.getDebugLoc(); - + if (ST->getAlignment() == 2) { SDValue Low = Value; SDValue High = DAG.getNode(ISD::SRL, dl, MVT::i32, Value, @@ -532,19 +531,19 @@ LowerSTORE(SDValue Op, SelectionDAG &DAG) const ST->isNonTemporal(), 2); return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, StoreLow, StoreHigh); } - + // Lower to a call to __misaligned_store(BasePtr, Value). const Type *IntPtrTy = getTargetData()->getIntPtrType(*DAG.getContext()); TargetLowering::ArgListTy Args; TargetLowering::ArgListEntry Entry; - + Entry.Ty = IntPtrTy; Entry.Node = BasePtr; Args.push_back(Entry); - + Entry.Node = Value; Args.push_back(Entry); - + std::pair CallResult = LowerCallTo(Chain, Type::getVoidTy(*DAG.getContext()), false, false, false, false, 0, CallingConv::C, false, @@ -722,7 +721,7 @@ ExpandADDSUB(SDNode *N, SelectionDAG &DAG) const } DebugLoc dl = N->getDebugLoc(); - + // Extract components SDValue LHSL = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), DAG.getConstant(0, MVT::i32)); @@ -732,7 +731,7 @@ ExpandADDSUB(SDNode *N, SelectionDAG &DAG) const N->getOperand(1), DAG.getConstant(0, MVT::i32)); SDValue RHSH = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(1), DAG.getConstant(1, MVT::i32)); - + // Expand unsigned Opcode = (N->getOpcode() == ISD::ADD) ? XCoreISD::LADD : XCoreISD::LSUB; @@ -740,7 +739,7 @@ ExpandADDSUB(SDNode *N, SelectionDAG &DAG) const SDValue Carry = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), LHSL, RHSL, Zero); SDValue Lo(Carry.getNode(), 1); - + SDValue Ignored = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), LHSH, RHSH, Carry); SDValue Hi(Ignored.getNode(), 1); @@ -761,8 +760,8 @@ LowerVAARG(SDValue Op, SelectionDAG &DAG) const Node->getOperand(1), MachinePointerInfo(V), false, false, 0); // Increment the pointer, VAList, to the next vararg - SDValue Tmp3 = DAG.getNode(ISD::ADD, dl, getPointerTy(), VAList, - DAG.getConstant(VT.getSizeInBits(), + SDValue Tmp3 = DAG.getNode(ISD::ADD, dl, getPointerTy(), VAList, + DAG.getConstant(VT.getSizeInBits(), getPointerTy())); // Store the incremented VAList to the legalized pointer Tmp3 = DAG.getStore(VAList.getValue(1), dl, Tmp3, Node->getOperand(1), @@ -781,20 +780,20 @@ LowerVASTART(SDValue Op, SelectionDAG &DAG) const MachineFunction &MF = DAG.getMachineFunction(); XCoreFunctionInfo *XFI = MF.getInfo(); SDValue Addr = DAG.getFrameIndex(XFI->getVarArgsFrameIndex(), MVT::i32); - return DAG.getStore(Op.getOperand(0), dl, Addr, Op.getOperand(1), + return DAG.getStore(Op.getOperand(0), dl, Addr, Op.getOperand(1), MachinePointerInfo(), false, false, 0); } SDValue XCoreTargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const { DebugLoc dl = Op.getDebugLoc(); - // Depths > 0 not supported yet! + // Depths > 0 not supported yet! if (cast(Op.getOperand(0))->getZExtValue() > 0) return SDValue(); - + MachineFunction &MF = DAG.getMachineFunction(); const TargetRegisterInfo *RegInfo = getTargetMachine().getRegisterInfo(); - return DAG.getCopyFromReg(DAG.getEntryNode(), dl, + return DAG.getCopyFromReg(DAG.getEntryNode(), dl, RegInfo->getFrameRegister(MF), MVT::i32); } @@ -919,7 +918,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, // Get a count of how many bytes are to be pushed on the stack. unsigned NumBytes = CCInfo.getNextStackOffset(); - Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, + Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy(), true)); SmallVector, 4> RegsToPass; @@ -944,8 +943,8 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); break; } - - // Arguments that can be passed on register must be kept at + + // Arguments that can be passed on register must be kept at // RegsToPass vector if (VA.isRegLoc()) { RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg)); @@ -954,7 +953,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, int Offset = VA.getLocMemOffset(); - MemOpChains.push_back(DAG.getNode(XCoreISD::STWSP, dl, MVT::Other, + MemOpChains.push_back(DAG.getNode(XCoreISD::STWSP, dl, MVT::Other, Chain, Arg, DAG.getConstant(Offset/4, MVT::i32))); } @@ -963,16 +962,16 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, // Transform all store nodes into one single node because // all store nodes are independent of each other. if (!MemOpChains.empty()) - Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, + Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0], MemOpChains.size()); - // Build a sequence of copy-to-reg nodes chained together with token + // Build a sequence of copy-to-reg nodes chained together with token // chain and flag operands which copy the outgoing args into registers. // The InFlag in necessary since all emited instructions must be // stuck together. SDValue InFlag; for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) { - Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, + Chain = DAG.getCopyToReg(Chain, dl, RegsToPass[i].first, RegsToPass[i].second, InFlag); InFlag = Chain.getValue(1); } @@ -986,7 +985,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, Callee = DAG.getTargetExternalSymbol(E->getSymbol(), MVT::i32); // XCoreBranchLink = #chain, #target_address, #opt_in_flags... - // = Chain, Callee, Reg#1, Reg#2, ... + // = Chain, Callee, Reg#1, Reg#2, ... // // Returns a chain & a flag for retval copy to use. SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); @@ -994,7 +993,7 @@ XCoreTargetLowering::LowerCCCCallTo(SDValue Chain, SDValue Callee, Ops.push_back(Chain); Ops.push_back(Callee); - // Add argument registers to the end of the list so that they are + // Add argument registers to the end of the list so that they are // known live into the call. for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) Ops.push_back(DAG.getRegister(RegsToPass[i].first, @@ -1098,11 +1097,11 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain, unsigned StackSlotSize = XCoreFrameLowering::stackSlotSize(); unsigned LRSaveSize = StackSlotSize; - + for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { CCValAssign &VA = ArgLocs[i]; - + if (VA.isRegLoc()) { // Arguments passed in registers EVT RegVT = VA.getLocVT(); @@ -1139,12 +1138,12 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain, // Create the SelectionDAG nodes corresponding to a load //from this parameter SDValue FIN = DAG.getFrameIndex(FI, MVT::i32); - InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, + InVals.push_back(DAG.getLoad(VA.getLocVT(), dl, Chain, FIN, MachinePointerInfo::getFixedStack(FI), false, false, 0)); } } - + if (isVarArg) { /* Argument registers */ static const unsigned ArgRegs[] = { @@ -1186,7 +1185,7 @@ XCoreTargetLowering::LowerCCCArguments(SDValue Chain, true)); } } - + return Chain; } @@ -1222,7 +1221,7 @@ XCoreTargetLowering::LowerReturn(SDValue Chain, // Analize return values. CCInfo.AnalyzeReturn(Outs, RetCC_XCore); - // If this is the first return lowered for this function, add + // If this is the first return lowered for this function, add // the regs to the liveout set for the function. if (DAG.getMachineFunction().getRegInfo().liveout_empty()) { for (unsigned i = 0; i != RVLocs.size(); ++i) @@ -1237,7 +1236,7 @@ XCoreTargetLowering::LowerReturn(SDValue Chain, CCValAssign &VA = RVLocs[i]; assert(VA.isRegLoc() && "Can only return in registers!"); - Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), + Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag); // guarantee that all emitted copies are @@ -1265,7 +1264,7 @@ XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, DebugLoc dl = MI->getDebugLoc(); assert((MI->getOpcode() == XCore::SELECT_CC) && "Unexpected instr type to insert"); - + // To "insert" a SELECT_CC instruction, we actually have to insert the diamond // control-flow pattern. The incoming instruction knows the destination vreg // to set, the condition code register to branch on, the true/false values to @@ -1273,7 +1272,7 @@ XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, const BasicBlock *LLVM_BB = BB->getBasicBlock(); MachineFunction::iterator It = BB; ++It; - + // thisMBB: // ... // TrueVal = ... @@ -1296,7 +1295,7 @@ XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, // Next, add the true and fallthrough blocks as its successors. BB->addSuccessor(copy0MBB); BB->addSuccessor(sinkMBB); - + BuildMI(BB, dl, TII.get(XCore::BRFT_lru6)) .addReg(MI->getOperand(1).getReg()).addMBB(sinkMBB); @@ -1304,10 +1303,10 @@ XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, // %FalseValue = ... // # fallthrough to sinkMBB BB = copy0MBB; - + // Update machine-CFG edges BB->addSuccessor(sinkMBB); - + // sinkMBB: // %Result = phi [ %FalseValue, copy0MBB ], [ %TrueValue, thisMBB ] // ... @@ -1316,7 +1315,7 @@ XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI, TII.get(XCore::PHI), MI->getOperand(0).getReg()) .addReg(MI->getOperand(3).getReg()).addMBB(copy0MBB) .addReg(MI->getOperand(2).getReg()).addMBB(thisMBB); - + MI->eraseFromParent(); // The pseudo instruction is gone now. return BB; } @@ -1354,7 +1353,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N, // fold (ladd x, 0, y) -> 0, add x, y iff carry is unused and y has only the // low bit set - if (N1C && N1C->isNullValue() && N->hasNUsesOfValue(0, 0)) { + if (N1C && N1C->isNullValue() && N->hasNUsesOfValue(0, 0)) { APInt KnownZero, KnownOne; APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(), VT.getSizeInBits() - 1); @@ -1377,7 +1376,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N, EVT VT = N0.getValueType(); // fold (lsub 0, 0, x) -> x, -x iff x has only the low bit set - if (N0C && N0C->isNullValue() && N1C && N1C->isNullValue()) { + if (N0C && N0C->isNullValue() && N1C && N1C->isNullValue()) { APInt KnownZero, KnownOne; APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(), VT.getSizeInBits() - 1); @@ -1393,7 +1392,7 @@ SDValue XCoreTargetLowering::PerformDAGCombine(SDNode *N, // fold (lsub x, 0, y) -> 0, sub x, y iff borrow is unused and y has only the // low bit set - if (N1C && N1C->isNullValue() && N->hasNUsesOfValue(0, 0)) { + if (N1C && N1C->isNullValue() && N->hasNUsesOfValue(0, 0)) { APInt KnownZero, KnownOne; APInt Mask = APInt::getHighBitsSet(VT.getSizeInBits(), VT.getSizeInBits() - 1); @@ -1557,7 +1556,7 @@ static inline bool isImmUs4(int64_t val) /// isLegalAddressingMode - Return true if the addressing mode represented /// by AM is legal for this target, for a load/store of the specified type. bool -XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, +XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const { if (Ty->getTypeID() == Type::VoidTyID) return AM.Scale == 0 && isImmUs(AM.BaseOffs) && isImmUs4(AM.BaseOffs); @@ -1568,7 +1567,7 @@ XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, return Size >= 4 && !AM.HasBaseReg && AM.Scale == 0 && AM.BaseOffs%4 == 0; } - + switch (Size) { case 1: // reg + imm @@ -1593,7 +1592,7 @@ XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, // reg + reg<<2 return AM.Scale == 4 && AM.BaseOffs == 0; } - + return false; } @@ -1603,7 +1602,7 @@ XCoreTargetLowering::isLegalAddressingMode(const AddrMode &AM, std::vector XCoreTargetLowering:: getRegClassForInlineAsmConstraint(const std::string &Constraint, - EVT VT) const + EVT VT) const { if (Constraint.size() != 1) return std::vector(); @@ -1611,9 +1610,9 @@ getRegClassForInlineAsmConstraint(const std::string &Constraint, switch (Constraint[0]) { default : break; case 'r': - return make_vector(XCore::R0, XCore::R1, XCore::R2, - XCore::R3, XCore::R4, XCore::R5, - XCore::R6, XCore::R7, XCore::R8, + return make_vector(XCore::R0, XCore::R1, XCore::R2, + XCore::R3, XCore::R4, XCore::R5, + XCore::R6, XCore::R7, XCore::R8, XCore::R9, XCore::R10, XCore::R11, 0); break; } diff --git a/lib/Target/XCore/XCoreISelLowering.h b/lib/Target/XCore/XCoreISelLowering.h index 7e5dd2e8e512e..bb3f2cc038e7f 100644 --- a/lib/Target/XCore/XCoreISelLowering.h +++ b/lib/Target/XCore/XCoreISelLowering.h @@ -20,11 +20,11 @@ #include "XCore.h" namespace llvm { - + // Forward delcarations class XCoreSubtarget; class XCoreTargetMachine; - + namespace XCoreISD { enum NodeType { // Start the numbering where the builtin ops and target ops leave off. @@ -38,16 +38,16 @@ namespace llvm { // dp relative address DPRelativeWrapper, - + // cp relative address CPRelativeWrapper, - + // Store word to stack STWSP, // Corresponds to retsp instruction RETSP, - + // Corresponds to LADD instruction LADD, @@ -74,13 +74,14 @@ namespace llvm { //===--------------------------------------------------------------------===// // TargetLowering Implementation //===--------------------------------------------------------------------===// - class XCoreTargetLowering : public TargetLowering + class XCoreTargetLowering : public TargetLowering { public: explicit XCoreTargetLowering(XCoreTargetMachine &TM); virtual unsigned getJumpTableEncoding() const; + virtual MVT getShiftAmountTy(EVT LHSTy) const { return MVT::i32; } /// LowerOperation - Provide custom lowering hooks for some operations. virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; @@ -91,10 +92,10 @@ namespace llvm { virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl&Results, SelectionDAG &DAG) const; - /// getTargetNodeName - This method returns the name of a target specific + /// getTargetNodeName - This method returns the name of a target specific // DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; - + virtual MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; @@ -108,7 +109,7 @@ namespace llvm { private: const XCoreTargetMachine &TM; const XCoreSubtarget &Subtarget; - + // Lower Operand helpers SDValue LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, @@ -148,12 +149,12 @@ namespace llvm { SDValue LowerSMUL_LOHI(SDValue Op, SelectionDAG &DAG) const; SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const; SDValue LowerTRAMPOLINE(SDValue Op, SelectionDAG &DAG) const; - + // Inline asm support std::vector getRegClassForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; - + // Expand specifics SDValue TryExpandADDWithMul(SDNode *Op, SelectionDAG &DAG) const; SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG) const; diff --git a/lib/Target/XCore/XCoreInstrInfo.td b/lib/Target/XCore/XCoreInstrInfo.td index 38cc734ce7c3e..ecdd4cb630006 100644 --- a/lib/Target/XCore/XCoreInstrInfo.td +++ b/lib/Target/XCore/XCoreInstrInfo.td @@ -727,7 +727,7 @@ def NEG : _F2R<(outs GRRegs:$dst), (ins GRRegs:$b), "neg $dst, $b", [(set GRRegs:$dst, (ineg GRRegs:$b))]>; -// TODO setd, eet, eef, getts, setpt, outshr, inshr, testwct, tinitpc, tinitdp, +// TODO setd, eet, eef, testwct, tinitpc, tinitdp, // tinitsp, tinitcp, tsetmr, sext (reg), zext (reg) let Constraints = "$src1 = $dst" in { let neverHasSideEffects = 1 in @@ -758,6 +758,14 @@ def GETR_rus : _FRUS<(outs GRRegs:$dst), (ins i32imm:$type), "getr $dst, $type", [(set GRRegs:$dst, (int_xcore_getr immUs:$type))]>; +def GETTS_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r), + "getts $dst, res[$r]", + [(set GRRegs:$dst, (int_xcore_getts GRRegs:$r))]>; + +def SETPT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val), + "setpt res[$r], $val", + [(int_xcore_setpt GRRegs:$r, GRRegs:$val)]>; + def OUTCT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val), "outct res[$r], $val", [(int_xcore_outct GRRegs:$r, GRRegs:$val)]>; @@ -774,6 +782,11 @@ def OUT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val), "out res[$r], $val", [(int_xcore_out GRRegs:$r, GRRegs:$val)]>; +let Constraints = "$src = $dst" in +def OUTSHR_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r, GRRegs:$src), + "outshr res[$r], $src", + [(set GRRegs:$dst, (int_xcore_outshr GRRegs:$r, GRRegs:$src))]>; + def INCT_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r), "inct $dst, res[$r]", [(set GRRegs:$dst, (int_xcore_inct GRRegs:$r))]>; @@ -786,6 +799,11 @@ def IN_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r), "in $dst, res[$r]", [(set GRRegs:$dst, (int_xcore_in GRRegs:$r))]>; +let Constraints = "$src = $dst" in +def INSHR_2r : _F2R<(outs GRRegs:$dst), (ins GRRegs:$r, GRRegs:$src), + "inshr $dst, res[$r]", + [(set GRRegs:$dst, (int_xcore_inshr GRRegs:$r, GRRegs:$src))]>; + def CHKCT_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val), "chkct res[$r], $val", [(int_xcore_chkct GRRegs:$r, GRRegs:$val)]>; @@ -799,7 +817,7 @@ def SETD_2r : _F2R<(outs), (ins GRRegs:$r, GRRegs:$val), [(int_xcore_setd GRRegs:$r, GRRegs:$val)]>; // Two operand long -// TODO settw, setclk, setrdy, setpsc, endin, peek, +// TODO setclk, setrdy, setpsc, endin, peek, // getd, testlcl, tinitlr, getps, setps def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src), "bitrev $dst, $src", @@ -813,13 +831,17 @@ def CLZ_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src), "clz $dst, $src", [(set GRRegs:$dst, (ctlz GRRegs:$src))]>; -def SETC_l2r : _FRU6<(outs), (ins GRRegs:$r, GRRegs:$val), +def SETC_l2r : _FL2R<(outs), (ins GRRegs:$r, GRRegs:$val), "setc res[$r], $val", [(int_xcore_setc GRRegs:$r, GRRegs:$val)]>; +def SETTW_l2r : _FL2R<(outs), (ins GRRegs:$r, GRRegs:$val), + "settw res[$r], $val", + [(int_xcore_settw GRRegs:$r, GRRegs:$val)]>; + // One operand short -// TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, syncr, clrtp -// setdp, setcp, setv, setev, kcall +// TODO edu, eeu, waitet, waitef, tstart, msync, mjoin, clrtp +// setdp, setcp, setev, kcall // dgetreg let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1 in def BAU_1r : _F1R<(outs), (ins GRRegs:$addr), @@ -859,20 +881,41 @@ def BLA_1r : _F1R<(outs), (ins GRRegs:$addr, variable_ops), [(XCoreBranchLink GRRegs:$addr)]>; } +def SYNCR_1r : _F1R<(outs), (ins GRRegs:$r), + "syncr res[$r]", + [(int_xcore_syncr GRRegs:$r)]>; + def FREER_1r : _F1R<(outs), (ins GRRegs:$r), "freer res[$r]", [(int_xcore_freer GRRegs:$r)]>; +let Uses=[R11] in +def SETV_1r : _F1R<(outs), (ins GRRegs:$r), + "setv res[$r], r11", + [(int_xcore_setv GRRegs:$r, R11)]>; + +def EEU_1r : _F1R<(outs), (ins GRRegs:$r), + "eeu res[$r]", + [(int_xcore_eeu GRRegs:$r)]>; + // Zero operand short -// TODO waiteu, clre, ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed, +// TODO ssync, freet, ldspc, stspc, ldssr, stssr, ldsed, stsed, // stet, geted, getet, getkep, getksp, setkep, getid, kret, dcall, dret, // dentsp, drestsp +def CLRE_0R : _F0R<(outs), (ins), "clre", [(int_xcore_clre)]>; + let Defs = [R11] in def GETID_0R : _F0R<(outs), (ins), "get r11, id", [(set R11, (int_xcore_getid))]>; +let isBranch=1, isIndirectBranch=1, isTerminator=1, isBarrier = 1, + hasSideEffects = 1 in +def WAITEU_0R : _F0R<(outs), (ins), + "waiteu", + [(brind (int_xcore_waitevent))]>; + //===----------------------------------------------------------------------===// // Non-Instruction Patterns //===----------------------------------------------------------------------===// diff --git a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp index b6b6b84d96470..7986d1aca7623 100644 --- a/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp +++ b/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp @@ -1897,6 +1897,39 @@ Instruction *InstCombiner::visitOr(BinaryOperator &I) { return BinaryOperator::CreateNot(And); } + // Canonicalize xor to the RHS. + if (match(Op0, m_Xor(m_Value(), m_Value()))) + std::swap(Op0, Op1); + + // A | ( A ^ B) -> A | B + // A | (~A ^ B) -> A | ~B + if (match(Op1, m_Xor(m_Value(A), m_Value(B)))) { + if (Op0 == A || Op0 == B) + return BinaryOperator::CreateOr(A, B); + + if (Op1->hasOneUse() && match(A, m_Not(m_Specific(Op0)))) { + Value *Not = Builder->CreateNot(B, B->getName()+".not"); + return BinaryOperator::CreateOr(Not, Op0); + } + if (Op1->hasOneUse() && match(B, m_Not(m_Specific(Op0)))) { + Value *Not = Builder->CreateNot(A, A->getName()+".not"); + return BinaryOperator::CreateOr(Not, Op0); + } + } + + // A | ~(A | B) -> A | ~B + // A | ~(A ^ B) -> A | ~B + if (match(Op1, m_Not(m_Value(A)))) + if (BinaryOperator *B = dyn_cast(A)) + if ((Op0 == B->getOperand(0) || Op0 == B->getOperand(1)) && + Op1->hasOneUse() && (B->getOpcode() == Instruction::Or || + B->getOpcode() == Instruction::Xor)) { + Value *NotOp = Op0 == B->getOperand(0) ? B->getOperand(1) : + B->getOperand(0); + Value *Not = Builder->CreateNot(NotOp, NotOp->getName()+".not"); + return BinaryOperator::CreateOr(Not, Op0); + } + if (ICmpInst *RHS = dyn_cast(I.getOperand(1))) if (ICmpInst *LHS = dyn_cast(I.getOperand(0))) if (Value *Res = FoldOrOfICmps(LHS, RHS)) diff --git a/lib/Transforms/InstCombine/InstCombineCalls.cpp b/lib/Transforms/InstCombine/InstCombineCalls.cpp index 8449f7b7982c6..0e464507a7e4b 100644 --- a/lib/Transforms/InstCombine/InstCombineCalls.cpp +++ b/lib/Transforms/InstCombine/InstCombineCalls.cpp @@ -953,10 +953,19 @@ bool InstCombiner::transformConstExprCastCall(CallSite CS) { if (Callee->isDeclaration() && !isConvertible) return false; } - if (FT->getNumParams() < NumActualArgs && !FT->isVarArg() && - Callee->isDeclaration()) - return false; // Do not delete arguments unless we have a function body. - + if (Callee->isDeclaration()) { + // Do not delete arguments unless we have a function body. + if (FT->getNumParams() < NumActualArgs && !FT->isVarArg()) + return false; + + // If the callee is just a declaration, don't change the varargsness of the + // call. We don't want to introduce a varargs call where one doesn't + // already exist. + const PointerType *APTy = cast(CS.getCalledValue()->getType()); + if (FT->isVarArg()!=cast(APTy->getElementType())->isVarArg()) + return false; + } + if (FT->getNumParams() < NumActualArgs && FT->isVarArg() && !CallerPAL.isEmpty()) // In this case we have more arguments than the new function type, but we @@ -970,8 +979,9 @@ bool InstCombiner::transformConstExprCastCall(CallSite CS) { return false; } + // Okay, we decided that this is a safe thing to do: go ahead and start - // inserting cast instructions as necessary... + // inserting cast instructions as necessary. std::vector Args; Args.reserve(NumActualArgs); SmallVector attrVec; diff --git a/lib/Transforms/Scalar/LoopDeletion.cpp b/lib/Transforms/Scalar/LoopDeletion.cpp index 6d1d344a92965..753a558cfe83a 100644 --- a/lib/Transforms/Scalar/LoopDeletion.cpp +++ b/lib/Transforms/Scalar/LoopDeletion.cpp @@ -78,7 +78,6 @@ bool LoopDeletion::IsLoopDead(Loop* L, SmallVector& exitingBlocks, SmallVector& exitBlocks, bool &Changed, BasicBlock *Preheader) { - BasicBlock* exitingBlock = exitingBlocks[0]; BasicBlock* exitBlock = exitBlocks[0]; // Make sure that all PHI entries coming from the loop are loop invariant. @@ -88,11 +87,21 @@ bool LoopDeletion::IsLoopDead(Loop* L, // of the loop. BasicBlock::iterator BI = exitBlock->begin(); while (PHINode* P = dyn_cast(BI)) { - Value* incoming = P->getIncomingValueForBlock(exitingBlock); + Value* incoming = P->getIncomingValueForBlock(exitingBlocks[0]); + + // Make sure all exiting blocks produce the same incoming value for the exit + // block. If there are different incoming values for different exiting + // blocks, then it is impossible to statically determine which value should + // be used. + for (unsigned i = 1; i < exitingBlocks.size(); ++i) { + if (incoming != P->getIncomingValueForBlock(exitingBlocks[i])) + return false; + } + if (Instruction* I = dyn_cast(incoming)) if (!L->makeLoopInvariant(I, Changed, Preheader->getTerminator())) return false; - + ++BI; } @@ -147,10 +156,6 @@ bool LoopDeletion::runOnLoop(Loop* L, LPPassManager& LPM) { if (exitBlocks.size() != 1) return false; - // Loops with multiple exits are too complicated to handle correctly. - if (exitingBlocks.size() != 1) - return false; - // Finally, we have to check that the loop really is dead. bool Changed = false; if (!IsLoopDead(L, exitingBlocks, exitBlocks, Changed, preheader)) @@ -166,7 +171,6 @@ bool LoopDeletion::runOnLoop(Loop* L, LPPassManager& LPM) { // Now that we know the removal is safe, remove the loop by changing the // branch from the preheader to go to the single exit block. BasicBlock* exitBlock = exitBlocks[0]; - BasicBlock* exitingBlock = exitingBlocks[0]; // Because we're deleting a large chunk of code at once, the sequence in which // we remove things is very important to avoid invalidation issues. Don't @@ -183,9 +187,12 @@ bool LoopDeletion::runOnLoop(Loop* L, LPPassManager& LPM) { // Rewrite phis in the exit block to get their inputs from // the preheader instead of the exiting block. + BasicBlock* exitingBlock = exitingBlocks[0]; BasicBlock::iterator BI = exitBlock->begin(); while (PHINode* P = dyn_cast(BI)) { P->replaceUsesOfWith(exitingBlock, preheader); + for (unsigned i = 1; i < exitingBlocks.size(); ++i) + P->removeIncomingValue(exitingBlocks[i]); ++BI; } diff --git a/lib/Transforms/Scalar/LoopIdiomRecognize.cpp b/lib/Transforms/Scalar/LoopIdiomRecognize.cpp index d7fa149492bd4..f8ce214750aca 100644 --- a/lib/Transforms/Scalar/LoopIdiomRecognize.cpp +++ b/lib/Transforms/Scalar/LoopIdiomRecognize.cpp @@ -31,6 +31,11 @@ // void foo(_Complex float *P) // for (i) { __real__(*P) = 0; __imag__(*P) = 0; } // +// We should enhance this to handle negative strides through memory. +// Alternatively (and perhaps better) we could rely on an earlier pass to force +// forward iteration through memory, which is generally better for cache +// behavior. Negative strides *do* happen for memset/memcpy loops. +// // This could recognize common matrix multiplies and dot product idioms and // replace them with calls to BLAS (if linked in??). // @@ -272,10 +277,17 @@ bool LoopIdiomRecognize::processLoopStore(StoreInst *SI, const SCEV *BECount) { unsigned StoreSize = (unsigned)SizeInBits >> 3; const SCEVConstant *Stride = dyn_cast(StoreEv->getOperand(1)); - // TODO: Could also handle negative stride here someday, that will require the - // validity check in mayLoopAccessLocation to be updated though. - if (Stride == 0 || StoreSize != Stride->getValue()->getValue()) + if (Stride == 0 || StoreSize != Stride->getValue()->getValue()) { + // TODO: Could also handle negative stride here someday, that will require + // the validity check in mayLoopAccessLocation to be updated though. + // Enable this to print exact negative strides. + if (0 && Stride && StoreSize == -Stride->getValue()->getValue()) { + dbgs() << "NEGATIVE STRIDE: " << *SI << "\n"; + dbgs() << "BB: " << *SI->getParent(); + } + return false; + } // See if we can optimize just this store in isolation. if (processLoopStridedStore(StorePtr, StoreSize, SI->getAlignment(), diff --git a/lib/Transforms/Scalar/SimplifyLibCalls.cpp b/lib/Transforms/Scalar/SimplifyLibCalls.cpp index ec45b71dd3682..9f136d4e3077a 100644 --- a/lib/Transforms/Scalar/SimplifyLibCalls.cpp +++ b/lib/Transforms/Scalar/SimplifyLibCalls.cpp @@ -25,13 +25,14 @@ #include "llvm/Support/IRBuilder.h" #include "llvm/Analysis/ValueTracking.h" #include "llvm/Target/TargetData.h" +#include "llvm/Target/TargetLibraryInfo.h" #include "llvm/ADT/SmallPtrSet.h" #include "llvm/ADT/StringMap.h" #include "llvm/ADT/Statistic.h" #include "llvm/ADT/STLExtras.h" #include "llvm/Support/Debug.h" #include "llvm/Support/raw_ostream.h" -#include "llvm/Config/config.h" +#include "llvm/Config/config.h" // FIXME: Shouldn't depend on host! using namespace llvm; STATISTIC(NumSimplified, "Number of library calls simplified"); @@ -1369,6 +1370,8 @@ namespace { /// This pass optimizes well known library functions from libc and libm. /// class SimplifyLibCalls : public FunctionPass { + TargetLibraryInfo *TLI; + StringMap Optimizations; // String and Memory LibCall Optimizations StrCatOpt StrCat; StrNCatOpt StrNCat; StrChrOpt StrChr; StrRChrOpt StrRChr; @@ -1385,7 +1388,7 @@ namespace { SPrintFOpt SPrintF; PrintFOpt PrintF; FWriteOpt FWrite; FPutsOpt FPuts; FPrintFOpt FPrintF; PutsOpt Puts; - + bool Modified; // This is only used by doInitialization. public: static char ID; // Pass identification @@ -1402,14 +1405,20 @@ namespace { void setDoesNotAlias(Function &F, unsigned n); bool doInitialization(Module &M); + void inferPrototypeAttributes(Function &F); virtual void getAnalysisUsage(AnalysisUsage &AU) const { + AU.addRequired(); } }; - char SimplifyLibCalls::ID = 0; } // end anonymous namespace. -INITIALIZE_PASS(SimplifyLibCalls, "simplify-libcalls", - "Simplify well-known library calls", false, false) +char SimplifyLibCalls::ID = 0; + +INITIALIZE_PASS_BEGIN(SimplifyLibCalls, "simplify-libcalls", + "Simplify well-known library calls", false, false) +INITIALIZE_PASS_DEPENDENCY(TargetLibraryInfo) +INITIALIZE_PASS_END(SimplifyLibCalls, "simplify-libcalls", + "Simplify well-known library calls", false, false) // Public interface to the Simplify LibCalls pass. FunctionPass *llvm::createSimplifyLibCallsPass() { @@ -1441,9 +1450,9 @@ void SimplifyLibCalls::InitOptimizations() { Optimizations["strcspn"] = &StrCSpn; Optimizations["strstr"] = &StrStr; Optimizations["memcmp"] = &MemCmp; - Optimizations["memcpy"] = &MemCpy; + if (TLI->has(LibFunc::memcpy)) Optimizations["memcpy"] = &MemCpy; Optimizations["memmove"] = &MemMove; - Optimizations["memset"] = &MemSet; + if (TLI->has(LibFunc::memset)) Optimizations["memset"] = &MemSet; // _chk variants of String and Memory LibCall Optimizations. Optimizations["__strcpy_chk"] = &StrCpyChk; @@ -1506,6 +1515,8 @@ void SimplifyLibCalls::InitOptimizations() { /// runOnFunction - Top level algorithm. /// bool SimplifyLibCalls::runOnFunction(Function &F) { + TLI = &getAnalysis(); + if (Optimizations.empty()) InitOptimizations(); @@ -1597,688 +1608,654 @@ void SimplifyLibCalls::setDoesNotAlias(Function &F, unsigned n) { } } + +void SimplifyLibCalls::inferPrototypeAttributes(Function &F) { + const FunctionType *FTy = F.getFunctionType(); + + StringRef Name = F.getName(); + switch (Name[0]) { + case 's': + if (Name == "strlen") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setOnlyReadsMemory(F); + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "strchr" || + Name == "strrchr") { + if (FTy->getNumParams() != 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isIntegerTy()) + return; + setOnlyReadsMemory(F); + setDoesNotThrow(F); + } else if (Name == "strcpy" || + Name == "stpcpy" || + Name == "strcat" || + Name == "strtol" || + Name == "strtod" || + Name == "strtof" || + Name == "strtoul" || + Name == "strtoll" || + Name == "strtold" || + Name == "strncat" || + Name == "strncpy" || + Name == "strtoull") { + if (FTy->getNumParams() < 2 || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "strxfrm") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "strcmp" || + Name == "strspn" || + Name == "strncmp" || + Name == "strcspn" || + Name == "strcoll" || + Name == "strcasecmp" || + Name == "strncasecmp") { + if (FTy->getNumParams() < 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setOnlyReadsMemory(F); + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "strstr" || + Name == "strpbrk") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setOnlyReadsMemory(F); + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "strtok" || + Name == "strtok_r") { + if (FTy->getNumParams() < 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "scanf" || + Name == "setbuf" || + Name == "setvbuf") { + if (FTy->getNumParams() < 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "strdup" || + Name == "strndup") { + if (FTy->getNumParams() < 1 || !FTy->getReturnType()->isPointerTy() || + !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 1); + } else if (Name == "stat" || + Name == "sscanf" || + Name == "sprintf" || + Name == "statvfs") { + if (FTy->getNumParams() < 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "snprintf") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(2)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 3); + } else if (Name == "setitimer") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(1)->isPointerTy() || + !FTy->getParamType(2)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + setDoesNotCapture(F, 3); + } else if (Name == "system") { + if (FTy->getNumParams() != 1 || + !FTy->getParamType(0)->isPointerTy()) + return; + // May throw; "system" is a valid pthread cancellation point. + setDoesNotCapture(F, 1); + } + break; + case 'm': + if (Name == "malloc") { + if (FTy->getNumParams() != 1 || + !FTy->getReturnType()->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + } else if (Name == "memcmp") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setOnlyReadsMemory(F); + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "memchr" || + Name == "memrchr") { + if (FTy->getNumParams() != 3) + return; + setOnlyReadsMemory(F); + setDoesNotThrow(F); + } else if (Name == "modf" || + Name == "modff" || + Name == "modfl" || + Name == "memcpy" || + Name == "memccpy" || + Name == "memmove") { + if (FTy->getNumParams() < 2 || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "memalign") { + if (!FTy->getReturnType()->isPointerTy()) + return; + setDoesNotAlias(F, 0); + } else if (Name == "mkdir" || + Name == "mktime") { + if (FTy->getNumParams() == 0 || + !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'r': + if (Name == "realloc") { + if (FTy->getNumParams() != 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getReturnType()->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 1); + } else if (Name == "read") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(1)->isPointerTy()) + return; + // May throw; "read" is a valid pthread cancellation point. + setDoesNotCapture(F, 2); + } else if (Name == "rmdir" || + Name == "rewind" || + Name == "remove" || + Name == "realpath") { + if (FTy->getNumParams() < 1 || + !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "rename" || + Name == "readlink") { + if (FTy->getNumParams() < 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } + break; + case 'w': + if (Name == "write") { + if (FTy->getNumParams() != 3 || !FTy->getParamType(1)->isPointerTy()) + return; + // May throw; "write" is a valid pthread cancellation point. + setDoesNotCapture(F, 2); + } + break; + case 'b': + if (Name == "bcopy") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "bcmp") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setOnlyReadsMemory(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "bzero") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'c': + if (Name == "calloc") { + if (FTy->getNumParams() != 2 || + !FTy->getReturnType()->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + } else if (Name == "chmod" || + Name == "chown" || + Name == "ctermid" || + Name == "clearerr" || + Name == "closedir") { + if (FTy->getNumParams() == 0 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'a': + if (Name == "atoi" || + Name == "atol" || + Name == "atof" || + Name == "atoll") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setOnlyReadsMemory(F); + setDoesNotCapture(F, 1); + } else if (Name == "access") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'f': + if (Name == "fopen") { + if (FTy->getNumParams() != 2 || + !FTy->getReturnType()->isPointerTy() || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "fdopen") { + if (FTy->getNumParams() != 2 || + !FTy->getReturnType()->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 2); + } else if (Name == "feof" || + Name == "free" || + Name == "fseek" || + Name == "ftell" || + Name == "fgetc" || + Name == "fseeko" || + Name == "ftello" || + Name == "fileno" || + Name == "fflush" || + Name == "fclose" || + Name == "fsetpos" || + Name == "flockfile" || + Name == "funlockfile" || + Name == "ftrylockfile") { + if (FTy->getNumParams() == 0 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "ferror") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setOnlyReadsMemory(F); + } else if (Name == "fputc" || + Name == "fstat" || + Name == "frexp" || + Name == "frexpf" || + Name == "frexpl" || + Name == "fstatvfs") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "fgets") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(2)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 3); + } else if (Name == "fread" || + Name == "fwrite") { + if (FTy->getNumParams() != 4 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(3)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 4); + } else if (Name == "fputs" || + Name == "fscanf" || + Name == "fprintf" || + Name == "fgetpos") { + if (FTy->getNumParams() < 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } + break; + case 'g': + if (Name == "getc" || + Name == "getlogin_r" || + Name == "getc_unlocked") { + if (FTy->getNumParams() == 0 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "getenv") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setOnlyReadsMemory(F); + setDoesNotCapture(F, 1); + } else if (Name == "gets" || + Name == "getchar") { + setDoesNotThrow(F); + } else if (Name == "getitimer") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "getpwnam") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'u': + if (Name == "ungetc") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "uname" || + Name == "unlink" || + Name == "unsetenv") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "utime" || + Name == "utimes") { + if (FTy->getNumParams() != 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } + break; + case 'p': + if (Name == "putc") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "puts" || + Name == "printf" || + Name == "perror") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "pread" || + Name == "pwrite") { + if (FTy->getNumParams() != 4 || !FTy->getParamType(1)->isPointerTy()) + return; + // May throw; these are valid pthread cancellation points. + setDoesNotCapture(F, 2); + } else if (Name == "putchar") { + setDoesNotThrow(F); + } else if (Name == "popen") { + if (FTy->getNumParams() != 2 || + !FTy->getReturnType()->isPointerTy() || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "pclose") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'v': + if (Name == "vscanf") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "vsscanf" || + Name == "vfscanf") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(1)->isPointerTy() || + !FTy->getParamType(2)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "valloc") { + if (!FTy->getReturnType()->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + } else if (Name == "vprintf") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "vfprintf" || + Name == "vsprintf") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "vsnprintf") { + if (FTy->getNumParams() != 4 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(2)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 3); + } + break; + case 'o': + if (Name == "open") { + if (FTy->getNumParams() < 2 || !FTy->getParamType(0)->isPointerTy()) + return; + // May throw; "open" is a valid pthread cancellation point. + setDoesNotCapture(F, 1); + } else if (Name == "opendir") { + if (FTy->getNumParams() != 1 || + !FTy->getReturnType()->isPointerTy() || + !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 1); + } + break; + case 't': + if (Name == "tmpfile") { + if (!FTy->getReturnType()->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + } else if (Name == "times") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'h': + if (Name == "htonl" || + Name == "htons") { + setDoesNotThrow(F); + setDoesNotAccessMemory(F); + } + break; + case 'n': + if (Name == "ntohl" || + Name == "ntohs") { + setDoesNotThrow(F); + setDoesNotAccessMemory(F); + } + break; + case 'l': + if (Name == "lstat") { + if (FTy->getNumParams() != 2 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "lchown") { + if (FTy->getNumParams() != 3 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } + break; + case 'q': + if (Name == "qsort") { + if (FTy->getNumParams() != 4 || !FTy->getParamType(3)->isPointerTy()) + return; + // May throw; places call through function pointer. + setDoesNotCapture(F, 4); + } + break; + case '_': + if (Name == "__strdup" || + Name == "__strndup") { + if (FTy->getNumParams() < 1 || + !FTy->getReturnType()->isPointerTy() || + !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 1); + } else if (Name == "__strtok_r") { + if (FTy->getNumParams() != 3 || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "_IO_getc") { + if (FTy->getNumParams() != 1 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "_IO_putc") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } + break; + case 1: + if (Name == "\1__isoc99_scanf") { + if (FTy->getNumParams() < 1 || + !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "\1stat64" || + Name == "\1lstat64" || + Name == "\1statvfs64" || + Name == "\1__isoc99_sscanf") { + if (FTy->getNumParams() < 1 || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "\1fopen64") { + if (FTy->getNumParams() != 2 || + !FTy->getReturnType()->isPointerTy() || + !FTy->getParamType(0)->isPointerTy() || + !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + setDoesNotCapture(F, 1); + setDoesNotCapture(F, 2); + } else if (Name == "\1fseeko64" || + Name == "\1ftello64") { + if (FTy->getNumParams() == 0 || !FTy->getParamType(0)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 1); + } else if (Name == "\1tmpfile64") { + if (!FTy->getReturnType()->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotAlias(F, 0); + } else if (Name == "\1fstat64" || + Name == "\1fstatvfs64") { + if (FTy->getNumParams() != 2 || !FTy->getParamType(1)->isPointerTy()) + return; + setDoesNotThrow(F); + setDoesNotCapture(F, 2); + } else if (Name == "\1open64") { + if (FTy->getNumParams() < 2 || !FTy->getParamType(0)->isPointerTy()) + return; + // May throw; "open" is a valid pthread cancellation point. + setDoesNotCapture(F, 1); + } + break; + } +} + /// doInitialization - Add attributes to well-known functions. /// bool SimplifyLibCalls::doInitialization(Module &M) { Modified = false; for (Module::iterator I = M.begin(), E = M.end(); I != E; ++I) { Function &F = *I; - if (!F.isDeclaration()) - continue; - - if (!F.hasName()) - continue; - - const FunctionType *FTy = F.getFunctionType(); - - StringRef Name = F.getName(); - switch (Name[0]) { - case 's': - if (Name == "strlen") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setOnlyReadsMemory(F); - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "strchr" || - Name == "strrchr") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isIntegerTy()) - continue; - setOnlyReadsMemory(F); - setDoesNotThrow(F); - } else if (Name == "strcpy" || - Name == "stpcpy" || - Name == "strcat" || - Name == "strtol" || - Name == "strtod" || - Name == "strtof" || - Name == "strtoul" || - Name == "strtoll" || - Name == "strtold" || - Name == "strncat" || - Name == "strncpy" || - Name == "strtoull") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "strxfrm") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "strcmp" || - Name == "strspn" || - Name == "strncmp" || - Name == "strcspn" || - Name == "strcoll" || - Name == "strcasecmp" || - Name == "strncasecmp") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setOnlyReadsMemory(F); - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "strstr" || - Name == "strpbrk") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setOnlyReadsMemory(F); - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "strtok" || - Name == "strtok_r") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "scanf" || - Name == "setbuf" || - Name == "setvbuf") { - if (FTy->getNumParams() < 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "strdup" || - Name == "strndup") { - if (FTy->getNumParams() < 1 || - !FTy->getReturnType()->isPointerTy() || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 1); - } else if (Name == "stat" || - Name == "sscanf" || - Name == "sprintf" || - Name == "statvfs") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "snprintf") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(2)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 3); - } else if (Name == "setitimer") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(1)->isPointerTy() || - !FTy->getParamType(2)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - setDoesNotCapture(F, 3); - } else if (Name == "system") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - // May throw; "system" is a valid pthread cancellation point. - setDoesNotCapture(F, 1); - } - break; - case 'm': - if (Name == "malloc") { - if (FTy->getNumParams() != 1 || - !FTy->getReturnType()->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - } else if (Name == "memcmp") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setOnlyReadsMemory(F); - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "memchr" || - Name == "memrchr") { - if (FTy->getNumParams() != 3) - continue; - setOnlyReadsMemory(F); - setDoesNotThrow(F); - } else if (Name == "modf" || - Name == "modff" || - Name == "modfl" || - Name == "memcpy" || - Name == "memccpy" || - Name == "memmove") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "memalign") { - if (!FTy->getReturnType()->isPointerTy()) - continue; - setDoesNotAlias(F, 0); - } else if (Name == "mkdir" || - Name == "mktime") { - if (FTy->getNumParams() == 0 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'r': - if (Name == "realloc") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getReturnType()->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 1); - } else if (Name == "read") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(1)->isPointerTy()) - continue; - // May throw; "read" is a valid pthread cancellation point. - setDoesNotCapture(F, 2); - } else if (Name == "rmdir" || - Name == "rewind" || - Name == "remove" || - Name == "realpath") { - if (FTy->getNumParams() < 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "rename" || - Name == "readlink") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } - break; - case 'w': - if (Name == "write") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(1)->isPointerTy()) - continue; - // May throw; "write" is a valid pthread cancellation point. - setDoesNotCapture(F, 2); - } - break; - case 'b': - if (Name == "bcopy") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "bcmp") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setOnlyReadsMemory(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "bzero") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'c': - if (Name == "calloc") { - if (FTy->getNumParams() != 2 || - !FTy->getReturnType()->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - } else if (Name == "chmod" || - Name == "chown" || - Name == "ctermid" || - Name == "clearerr" || - Name == "closedir") { - if (FTy->getNumParams() == 0 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'a': - if (Name == "atoi" || - Name == "atol" || - Name == "atof" || - Name == "atoll") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setOnlyReadsMemory(F); - setDoesNotCapture(F, 1); - } else if (Name == "access") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'f': - if (Name == "fopen") { - if (FTy->getNumParams() != 2 || - !FTy->getReturnType()->isPointerTy() || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "fdopen") { - if (FTy->getNumParams() != 2 || - !FTy->getReturnType()->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 2); - } else if (Name == "feof" || - Name == "free" || - Name == "fseek" || - Name == "ftell" || - Name == "fgetc" || - Name == "fseeko" || - Name == "ftello" || - Name == "fileno" || - Name == "fflush" || - Name == "fclose" || - Name == "fsetpos" || - Name == "flockfile" || - Name == "funlockfile" || - Name == "ftrylockfile") { - if (FTy->getNumParams() == 0 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "ferror") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setOnlyReadsMemory(F); - } else if (Name == "fputc" || - Name == "fstat" || - Name == "frexp" || - Name == "frexpf" || - Name == "frexpl" || - Name == "fstatvfs") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "fgets") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(2)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 3); - } else if (Name == "fread" || - Name == "fwrite") { - if (FTy->getNumParams() != 4 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(3)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 4); - } else if (Name == "fputs" || - Name == "fscanf" || - Name == "fprintf" || - Name == "fgetpos") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } - break; - case 'g': - if (Name == "getc" || - Name == "getlogin_r" || - Name == "getc_unlocked") { - if (FTy->getNumParams() == 0 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "getenv") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setOnlyReadsMemory(F); - setDoesNotCapture(F, 1); - } else if (Name == "gets" || - Name == "getchar") { - setDoesNotThrow(F); - } else if (Name == "getitimer") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "getpwnam") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'u': - if (Name == "ungetc") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "uname" || - Name == "unlink" || - Name == "unsetenv") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "utime" || - Name == "utimes") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } - break; - case 'p': - if (Name == "putc") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "puts" || - Name == "printf" || - Name == "perror") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "pread" || - Name == "pwrite") { - if (FTy->getNumParams() != 4 || - !FTy->getParamType(1)->isPointerTy()) - continue; - // May throw; these are valid pthread cancellation points. - setDoesNotCapture(F, 2); - } else if (Name == "putchar") { - setDoesNotThrow(F); - } else if (Name == "popen") { - if (FTy->getNumParams() != 2 || - !FTy->getReturnType()->isPointerTy() || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "pclose") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'v': - if (Name == "vscanf") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "vsscanf" || - Name == "vfscanf") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(1)->isPointerTy() || - !FTy->getParamType(2)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "valloc") { - if (!FTy->getReturnType()->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - } else if (Name == "vprintf") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "vfprintf" || - Name == "vsprintf") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "vsnprintf") { - if (FTy->getNumParams() != 4 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(2)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 3); - } - break; - case 'o': - if (Name == "open") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(0)->isPointerTy()) - continue; - // May throw; "open" is a valid pthread cancellation point. - setDoesNotCapture(F, 1); - } else if (Name == "opendir") { - if (FTy->getNumParams() != 1 || - !FTy->getReturnType()->isPointerTy() || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 1); - } - break; - case 't': - if (Name == "tmpfile") { - if (!FTy->getReturnType()->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - } else if (Name == "times") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'h': - if (Name == "htonl" || - Name == "htons") { - setDoesNotThrow(F); - setDoesNotAccessMemory(F); - } - break; - case 'n': - if (Name == "ntohl" || - Name == "ntohs") { - setDoesNotThrow(F); - setDoesNotAccessMemory(F); - } - break; - case 'l': - if (Name == "lstat") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "lchown") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } - break; - case 'q': - if (Name == "qsort") { - if (FTy->getNumParams() != 4 || - !FTy->getParamType(3)->isPointerTy()) - continue; - // May throw; places call through function pointer. - setDoesNotCapture(F, 4); - } - break; - case '_': - if (Name == "__strdup" || - Name == "__strndup") { - if (FTy->getNumParams() < 1 || - !FTy->getReturnType()->isPointerTy() || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 1); - } else if (Name == "__strtok_r") { - if (FTy->getNumParams() != 3 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "_IO_getc") { - if (FTy->getNumParams() != 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "_IO_putc") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } - break; - case 1: - if (Name == "\1__isoc99_scanf") { - if (FTy->getNumParams() < 1 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "\1stat64" || - Name == "\1lstat64" || - Name == "\1statvfs64" || - Name == "\1__isoc99_sscanf") { - if (FTy->getNumParams() < 1 || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "\1fopen64") { - if (FTy->getNumParams() != 2 || - !FTy->getReturnType()->isPointerTy() || - !FTy->getParamType(0)->isPointerTy() || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - setDoesNotCapture(F, 1); - setDoesNotCapture(F, 2); - } else if (Name == "\1fseeko64" || - Name == "\1ftello64") { - if (FTy->getNumParams() == 0 || - !FTy->getParamType(0)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 1); - } else if (Name == "\1tmpfile64") { - if (!FTy->getReturnType()->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotAlias(F, 0); - } else if (Name == "\1fstat64" || - Name == "\1fstatvfs64") { - if (FTy->getNumParams() != 2 || - !FTy->getParamType(1)->isPointerTy()) - continue; - setDoesNotThrow(F); - setDoesNotCapture(F, 2); - } else if (Name == "\1open64") { - if (FTy->getNumParams() < 2 || - !FTy->getParamType(0)->isPointerTy()) - continue; - // May throw; "open" is a valid pthread cancellation point. - setDoesNotCapture(F, 1); - } - break; - } + if (F.isDeclaration() && F.hasName()) + inferPrototypeAttributes(F); } return Modified; } diff --git a/lib/Transforms/Utils/Local.cpp b/lib/Transforms/Utils/Local.cpp index 063c76e9522cd..3f789fa865897 100644 --- a/lib/Transforms/Utils/Local.cpp +++ b/lib/Transforms/Utils/Local.cpp @@ -262,12 +262,13 @@ bool llvm::RecursivelyDeleteTriviallyDeadInstructions(Value *V) { /// areAllUsesEqual - Check whether the uses of a value are all the same. /// This is similar to Instruction::hasOneUse() except this will also return -/// true when there are multiple uses that all refer to the same value. +/// true when there are no uses or multiple uses that all refer to the same +/// value. static bool areAllUsesEqual(Instruction *I) { Value::use_iterator UI = I->use_begin(); Value::use_iterator UE = I->use_end(); if (UI == UE) - return false; + return true; User *TheUse = *UI; for (++UI; UI != UE; ++UI) { @@ -281,31 +282,24 @@ static bool areAllUsesEqual(Instruction *I) { /// dead PHI node, due to being a def-use chain of single-use nodes that /// either forms a cycle or is terminated by a trivially dead instruction, /// delete it. If that makes any of its operands trivially dead, delete them -/// too, recursively. Return true if the PHI node is actually deleted. +/// too, recursively. Return true if a change was made. bool llvm::RecursivelyDeleteDeadPHINode(PHINode *PN) { - // We can remove a PHI if it is on a cycle in the def-use graph - // where each node in the cycle has degree one, i.e. only one use, - // and is an instruction with no side effects. - if (!areAllUsesEqual(PN)) - return false; + SmallPtrSet Visited; + for (Instruction *I = PN; areAllUsesEqual(I) && !I->mayHaveSideEffects(); + I = cast(*I->use_begin())) { + if (I->use_empty()) + return RecursivelyDeleteTriviallyDeadInstructions(I); - bool Changed = false; - SmallPtrSet PHIs; - PHIs.insert(PN); - for (Instruction *J = cast(*PN->use_begin()); - areAllUsesEqual(J) && !J->mayHaveSideEffects(); - J = cast(*J->use_begin())) - // If we find a PHI more than once, we're on a cycle that + // If we find an instruction more than once, we're on a cycle that // won't prove fruitful. - if (PHINode *JP = dyn_cast(J)) - if (!PHIs.insert(JP)) { - // Break the cycle and delete the PHI and its operands. - JP->replaceAllUsesWith(UndefValue::get(JP->getType())); - (void)RecursivelyDeleteTriviallyDeadInstructions(JP); - Changed = true; - break; - } - return Changed; + if (!Visited.insert(I)) { + // Break the cycle and delete the instruction and its operands. + I->replaceAllUsesWith(UndefValue::get(I->getType())); + (void)RecursivelyDeleteTriviallyDeadInstructions(I); + return true; + } + } + return false; } /// SimplifyInstructionsInBlock - Scan the specified basic block and try to diff --git a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp index e6a4373c495b2..778885723e662 100644 --- a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp +++ b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp @@ -35,6 +35,7 @@ #include "llvm/Metadata.h" #include "llvm/Analysis/AliasSetTracker.h" #include "llvm/Analysis/DebugInfo.h" +#include "llvm/Analysis/DIBuilder.h" #include "llvm/Analysis/Dominators.h" #include "llvm/Analysis/InstructionSimplify.h" #include "llvm/ADT/DenseMap.h" @@ -190,7 +191,7 @@ namespace { /// std::vector Allocas; DominatorTree &DT; - DIFactory *DIF; + DIBuilder *DIB; /// AST - An AliasSetTracker object to update. If null, don't update it. /// @@ -235,9 +236,9 @@ namespace { public: PromoteMem2Reg(const std::vector &A, DominatorTree &dt, AliasSetTracker *ast) - : Allocas(A), DT(dt), DIF(0), AST(ast) {} + : Allocas(A), DT(dt), DIB(0), AST(ast) {} ~PromoteMem2Reg() { - delete DIF; + delete DIB; } void run(); @@ -951,9 +952,9 @@ void PromoteMem2Reg::ConvertDebugDeclareToDebugValue(DbgDeclareInst *DDI, if (!DIVar.Verify()) return; - if (!DIF) - DIF = new DIFactory(*SI->getParent()->getParent()->getParent()); - Instruction *DbgVal = DIF->InsertDbgValueIntrinsic(SI->getOperand(0), 0, + if (!DIB) + DIB = new DIBuilder(*SI->getParent()->getParent()->getParent()); + Instruction *DbgVal = DIB->insertDbgValueIntrinsic(SI->getOperand(0), 0, DIVar, SI); // Propagate any debug metadata from the store onto the dbg.value. diff --git a/lib/Transforms/Utils/SimplifyCFG.cpp b/lib/Transforms/Utils/SimplifyCFG.cpp index fb660dbfac100..c6708857cb560 100644 --- a/lib/Transforms/Utils/SimplifyCFG.cpp +++ b/lib/Transforms/Utils/SimplifyCFG.cpp @@ -247,6 +247,11 @@ static bool DominatesMergePoint(Value *V, BasicBlock *BB, if (PBB->getFirstNonPHIOrDbg() != I) return false; break; + case Instruction::GetElementPtr: + // GEPs are cheap if all indices are constant. + if (!cast(I)->hasAllConstantIndices()) + return false; + break; case Instruction::Add: case Instruction::Sub: case Instruction::And: diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index 302e141a3ed14..b696682c13fa0 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -82,6 +82,7 @@ if(PYTHONINTERP_FOUND) ${LIT_ARGS} ${CMAKE_CURRENT_BINARY_DIR} COMMENT "Running LLVM regression tests") + set_target_properties(check PROPERTIES FOLDER "Tests") add_custom_target(check.deps) add_dependencies(check check.deps) @@ -91,5 +92,6 @@ if(PYTHONINTERP_FOUND) llc lli llvm-ar llvm-as llvm-dis llvm-extract llvm-ld llvm-link llvm-mc llvm-nm macho-dump opt FileCheck count not) + set_target_properties(check.deps PROPERTIES FOLDER "Tests") endif() diff --git a/test/CodeGen/ARM/2009-10-16-Scope.ll b/test/CodeGen/ARM/2009-10-16-Scope.ll new file mode 100644 index 0000000000000..ce440e986de00 --- /dev/null +++ b/test/CodeGen/ARM/2009-10-16-Scope.ll @@ -0,0 +1,32 @@ +; RUN: llc %s -O0 -o /dev/null -mtriple=arm-apple-darwin +; PR 5197 +; There is not any llvm instruction assocated with !5. The code generator +; should be able to handle this. + +define void @bar() nounwind ssp { +entry: + %count_ = alloca i32, align 4 ; [#uses=2] + br label %do.body, !dbg !0 + +do.body: ; preds = %entry + call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4) + %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; [#uses=1] + %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; [#uses=0] + br label %do.end, !dbg !0 + +do.end: ; preds = %do.body + ret void, !dbg !7 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare i32 @foo(i32) ssp + +!0 = metadata !{i32 5, i32 2, metadata !1, null} +!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ] +!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar", metadata !"bar", metadata !"bar", metadata !3, i32 4, null, i1 false, i1 true}; [DW_TAG_subprogram ] +!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"genmodes.i", metadata !"/Users/yash/Downloads", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ] +!4 = metadata !{i32 459008, metadata !5, metadata !"count_", metadata !3, i32 5, metadata !6}; [ DW_TAG_auto_variable ] +!5 = metadata !{i32 458763, metadata !1}; [DW_TAG_lexical_block ] +!6 = metadata !{i32 458788, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ] +!7 = metadata !{i32 6, i32 1, metadata !2, null} diff --git a/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/test/CodeGen/ARM/2010-08-04-StackVariable.ll new file mode 100644 index 0000000000000..f077d04803bdf --- /dev/null +++ b/test/CodeGen/ARM/2010-08-04-StackVariable.ll @@ -0,0 +1,124 @@ +; RUN: llc -O0 -mtriple=arm-apple-darwin < %s | grep DW_OP_fbreg +; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot. + +%struct.SVal = type { i8*, i32 } + +define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp { +entry: + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24 + call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24 + %0 = icmp ne i32 %i, 0, !dbg !27 ; [#uses=1] + br i1 %0, label %bb, label %bb1, !dbg !27 + +bb: ; preds = %entry + %1 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !29 ; [#uses=1] + %2 = load i32* %1, align 8, !dbg !29 ; [#uses=1] + %3 = add i32 %2, %i, !dbg !29 ; [#uses=1] + br label %bb2, !dbg !29 + +bb1: ; preds = %entry + %4 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !30 ; [#uses=1] + %5 = load i32* %4, align 8, !dbg !30 ; [#uses=1] + %6 = sub i32 %5, 1, !dbg !30 ; [#uses=1] + br label %bb2, !dbg !30 + +bb2: ; preds = %bb1, %bb + %.0 = phi i32 [ %3, %bb ], [ %6, %bb1 ] ; [#uses=1] + br label %return, !dbg !29 + +return: ; preds = %bb2 + ret i32 %.0, !dbg !29 +} + +define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { +entry: + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34 + %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; [#uses=1] + store i8* null, i8** %0, align 8, !dbg !34 + %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; [#uses=1] + store i32 0, i32* %1, align 8, !dbg !34 + br label %return, !dbg !34 + +return: ; preds = %entry + ret void, !dbg !35 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +define i32 @main() nounwind ssp { +entry: + %0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3] + %v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41 + call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41 + %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; [#uses=1] + store i32 1, i32* %1, align 8, !dbg !42 + %2 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 0, !dbg !43 ; [#uses=1] + %3 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 0, !dbg !43 ; [#uses=1] + %4 = load i8** %3, align 8, !dbg !43 ; [#uses=1] + store i8* %4, i8** %2, align 8, !dbg !43 + %5 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 1, !dbg !43 ; [#uses=1] + %6 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !43 ; [#uses=1] + %7 = load i32* %6, align 8, !dbg !43 ; [#uses=1] + store i32 %7, i32* %5, align 8, !dbg !43 + %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; [#uses=0] + call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43 + br label %return, !dbg !45 + +return: ; preds = %entry + ret i32 0, !dbg !45 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0, !9, !16, !17, !20} + +!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 524307, metadata !2, metadata !"SVal", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_structure_type ] +!2 = metadata !{i32 524329, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !3} ; [ DW_TAG_file_type ] +!3 = metadata !{i32 524305, i32 0, i32 4, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!4 = metadata !{metadata !5, metadata !7, metadata !0, metadata !9} +!5 = metadata !{i32 524301, metadata !1, metadata !"Data", metadata !2, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] +!6 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] +!7 = metadata !{i32 524301, metadata !1, metadata !"Kind", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !8} ; [ DW_TAG_member ] +!8 = metadata !{i32 524324, metadata !2, metadata !"unsigned int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 524334, i32 0, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] +!11 = metadata !{null, metadata !12, metadata !13} +!12 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ] +!13 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, null} ; [ DW_TAG_subroutine_type ] +!15 = metadata !{null, metadata !12} +!16 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev} ; [ DW_TAG_subprogram ] +!17 = metadata !{i32 524334, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal} ; [ DW_TAG_subprogram ] +!18 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !19, i32 0, null} ; [ DW_TAG_subroutine_type ] +!19 = metadata !{metadata !13, metadata !13, metadata !1} +!20 = metadata !{i32 524334, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!21 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_subroutine_type ] +!22 = metadata !{metadata !13} +!23 = metadata !{i32 524545, metadata !17, metadata !"i", metadata !2, i32 16, metadata !13} ; [ DW_TAG_arg_variable ] +!24 = metadata !{i32 16, i32 0, metadata !17, null} +!25 = metadata !{i32 524545, metadata !17, metadata !"location", metadata !2, i32 16, metadata !26} ; [ DW_TAG_arg_variable ] +!26 = metadata !{i32 524304, metadata !2, metadata !"SVal", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_reference_type ] +!27 = metadata !{i32 17, i32 0, metadata !28, null} +!28 = metadata !{i32 524299, metadata !17, i32 16, i32 0, metadata !2, i32 2} ; [ DW_TAG_lexical_block ] +!29 = metadata !{i32 18, i32 0, metadata !28, null} +!30 = metadata !{i32 20, i32 0, metadata !28, null} +!31 = metadata !{i32 524545, metadata !16, metadata !"this", metadata !2, i32 11, metadata !32} ; [ DW_TAG_arg_variable ] +!32 = metadata !{i32 524326, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !33} ; [ DW_TAG_const_type ] +!33 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_pointer_type ] +!34 = metadata !{i32 11, i32 0, metadata !16, null} +!35 = metadata !{i32 11, i32 0, metadata !36, null} +!36 = metadata !{i32 524299, metadata !37, i32 11, i32 0, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] +!37 = metadata !{i32 524299, metadata !16, i32 11, i32 0, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!38 = metadata !{i32 524544, metadata !39, metadata !"v", metadata !2, i32 24, metadata !1} ; [ DW_TAG_auto_variable ] +!39 = metadata !{i32 524299, metadata !40, i32 23, i32 0, metadata !2, i32 4} ; [ DW_TAG_lexical_block ] +!40 = metadata !{i32 524299, metadata !20, i32 23, i32 0, metadata !2, i32 3} ; [ DW_TAG_lexical_block ] +!41 = metadata !{i32 24, i32 0, metadata !39, null} +!42 = metadata !{i32 25, i32 0, metadata !39, null} +!43 = metadata !{i32 26, i32 0, metadata !39, null} +!44 = metadata !{i32 524544, metadata !39, metadata !"k", metadata !2, i32 26, metadata !13} ; [ DW_TAG_auto_variable ] +!45 = metadata !{i32 27, i32 0, metadata !39, null} diff --git a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll index 99baad2d38d1d..94842124fb086 100644 --- a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll +++ b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll @@ -17,13 +17,12 @@ target triple = "thumbv7-apple-darwin10" ; DW_OP_constu ; offset -;CHECK: .byte 7 @ Abbrev [7] 0x1a5:0x13 DW_TAG_variable -;CHECK-NEXT: .ascii "x2" @ DW_AT_name +;CHECK: .ascii "x2" @ DW_AT_name ;CHECK-NEXT: .byte 0 -;CHECK-NEXT: .long 93 @ DW_AT_type -;CHECK-NEXT: .byte 1 @ DW_AT_decl_file -;CHECK-NEXT: .byte 6 @ DW_AT_decl_line -;CHECK-NEXT: .byte 8 @ DW_AT_location +;CHECK-NEXT: @ DW_AT_type +;CHECK-NEXT: @ DW_AT_decl_file +;CHECK-NEXT: @ DW_AT_decl_line +;CHECK-NEXT: @ DW_AT_location ;CHECK-NEXT: .byte 3 ;CHECK-NEXT: .long __MergedGlobals ;CHECK-NEXT: .byte 16 diff --git a/test/CodeGen/ARM/available_externally.ll b/test/CodeGen/ARM/available_externally.ll new file mode 100644 index 0000000000000..0f646d582e71d --- /dev/null +++ b/test/CodeGen/ARM/available_externally.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic | FileCheck %s +; rdar://9027648 + +@A = available_externally hidden constant i32 1 +@B = external hidden constant i32 + +define i32 @t1() { + %tmp = load i32* @A + store i32 %tmp, i32* @B + ret i32 %tmp +} + +; CHECK: L_A$non_lazy_ptr: +; CHECK-NEXT: .long _A +; CHECK: L_B$non_lazy_ptr: +; CHECK-NEXT: .long _B diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll index 1050cd265998b..d30e3ebf50a58 100644 --- a/test/CodeGen/ARM/fcopysign.ll +++ b/test/CodeGen/ARM/fcopysign.ll @@ -9,9 +9,8 @@ entry: ; SOFT: bfi r0, r1, #31, #1 ; HARD: test1: -; HARD: vabs.f32 d0, d0 -; HARD: cmp r0, #0 -; HARD: vneglt.f32 s0, s0 +; HARD: vmov.i32 [[REG1:(d[0-9]+)]], #0x80000000 +; HARD: vbsl [[REG1]], d2, d0 %0 = tail call float @copysignf(float %x, float %y) nounwind ret float %0 } @@ -23,9 +22,9 @@ entry: ; SOFT: bfi r1, r2, #31, #1 ; HARD: test2: -; HARD: vabs.f64 d0, d0 -; HARD: cmp r1, #0 -; HARD: vneglt.f64 d0, d0 +; HARD: vmov.i32 [[REG2:(d[0-9]+)]], #0x80000000 +; HARD: vshl.i64 [[REG2]], [[REG2]], #32 +; HARD: vbsl [[REG2]], d1, d0 %0 = tail call double @copysign(double %x, double %y) nounwind ret double %0 } @@ -33,9 +32,9 @@ entry: define double @test3(double %x, double %y, double %z) nounwind { entry: ; SOFT: test3: -; SOFT: vabs.f64 -; SOFT: cmp {{.*}}, #0 -; SOFT: vneglt.f64 +; SOFT: vmov.i32 [[REG3:(d[0-9]+)]], #0x80000000 +; SOFT: vshl.i64 [[REG3]], [[REG3]], #32 +; SOFT: vbsl [[REG3]], %0 = fmul double %x, %y %1 = tail call double @copysign(double %0, double %z) nounwind ret double %1 diff --git a/test/CodeGen/ARM/vstlane.ll b/test/CodeGen/ARM/vstlane.ll index 6cc052bbeb1ca..d1bc15ad576da 100644 --- a/test/CodeGen/ARM/vstlane.ll +++ b/test/CodeGen/ARM/vstlane.ll @@ -10,6 +10,19 @@ define void @vst1lanei8(i8* %A, <8 x i8>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst1lanei8_update(i8** %ptr, <8 x i8>* %B) nounwind { +;CHECK: vst1lanei8_update: +;CHECK: vst1.8 {d16[3]}, [r2]! + %A = load i8** %ptr + %tmp1 = load <8 x i8>* %B + %tmp2 = extractelement <8 x i8> %tmp1, i32 3 + store i8 %tmp2, i8* %A, align 8 + %tmp3 = getelementptr i8* %A, i32 1 + store i8* %tmp3, i8** %ptr + ret void +} + define void @vst1lanei16(i16* %A, <4 x i16>* %B) nounwind { ;CHECK: vst1lanei16: ;Check the alignment value. Max for this instruction is 16 bits: @@ -66,6 +79,19 @@ define void @vst1laneQi32(i32* %A, <4 x i32>* %B) nounwind { ret void } +;Check for a post-increment updating store. +define void @vst1laneQi32_update(i32** %ptr, <4 x i32>* %B) nounwind { +;CHECK: vst1laneQi32_update: +;CHECK: vst1.32 {d17[1]}, [r1, :32]! + %A = load i32** %ptr + %tmp1 = load <4 x i32>* %B + %tmp2 = extractelement <4 x i32> %tmp1, i32 3 + store i32 %tmp2, i32* %A, align 8 + %tmp3 = getelementptr i32* %A, i32 1 + store i32* %tmp3, i32** %ptr + ret void +} + define void @vst1laneQf(float* %A, <4 x float>* %B) nounwind { ;CHECK: vst1laneQf: ;CHECK: vst1.32 {d17[1]}, [r0] diff --git a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll index bc27e987a179f..71fdb4e0d60f4 100644 --- a/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll +++ b/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll @@ -7,7 +7,7 @@ entry: ; CHECK: test ; CHECK: call bar ; CHECK-NOT: nop -; CHECK: ret +; CHECK: jmp ; CHECK-NEXT: restore %0 = tail call i32 @bar(i32 %a) nounwind ret i32 %0 @@ -18,7 +18,7 @@ entry: ; CHECK: test_jmpl ; CHECK: call ; CHECK-NOT: nop -; CHECK: ret +; CHECK: jmp ; CHECK-NEXT: restore %0 = tail call i32 %f(i32 %a, i32 %b) nounwind ret i32 %0 @@ -47,7 +47,7 @@ bb: ; preds = %entry, %bb bb5: ; preds = %bb, %entry %a_addr.1.lcssa = phi i32 [ %a, %entry ], [ %a_addr.0, %bb ] -;CHECK: ret +;CHECK: jmp ;CHECK-NEXT: restore ret i32 %a_addr.1.lcssa } diff --git a/test/CodeGen/SPARC/2011-01-22-SRet.ll b/test/CodeGen/SPARC/2011-01-22-SRet.ll index 2f684b009c960..506d3a8f87afb 100644 --- a/test/CodeGen/SPARC/2011-01-22-SRet.ll +++ b/test/CodeGen/SPARC/2011-01-22-SRet.ll @@ -7,7 +7,7 @@ entry: ;CHECK: make_foo ;CHECK: ld [%fp+64], {{.+}} ;CHECK: or {{.+}}, {{.+}}, %i0 -;CHECK: ret +;CHECK: jmp %i7+12 %0 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 0 store i32 %a, i32* %0, align 4 %1 = getelementptr inbounds %struct.foo_t* %agg.result, i32 0, i32 1 @@ -22,6 +22,7 @@ entry: ;CHECK: test ;CHECK: st {{.+}}, [%sp+64] ;CHECK: make_foo +;CHECK: unimp 12 %f = alloca %struct.foo_t, align 8 call void @make_foo(%struct.foo_t* noalias sret %f, i32 10, i32 20, i32 30) nounwind %0 = getelementptr inbounds %struct.foo_t* %f, i32 0, i32 0 diff --git a/test/CodeGen/X86/2009-10-16-Scope.ll b/test/CodeGen/X86/2009-10-16-Scope.ll new file mode 100644 index 0000000000000..86c20243c8748 --- /dev/null +++ b/test/CodeGen/X86/2009-10-16-Scope.ll @@ -0,0 +1,32 @@ +; RUN: llc %s -O0 -o /dev/null -mtriple=x86_64-apple-darwin +; PR 5197 +; There is not any llvm instruction assocated with !5. The code generator +; should be able to handle this. + +define void @bar() nounwind ssp { +entry: + %count_ = alloca i32, align 4 ; [#uses=2] + br label %do.body, !dbg !0 + +do.body: ; preds = %entry + call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4) + %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; [#uses=1] + %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; [#uses=0] + br label %do.end, !dbg !0 + +do.end: ; preds = %do.body + ret void, !dbg !7 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare i32 @foo(i32) ssp + +!0 = metadata !{i32 5, i32 2, metadata !1, null} +!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ] +!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar", metadata !"bar", metadata !"bar", metadata !3, i32 4, null, i1 false, i1 true}; [DW_TAG_subprogram ] +!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"genmodes.i", metadata !"/Users/yash/Downloads", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ] +!4 = metadata !{i32 459008, metadata !5, metadata !"count_", metadata !3, i32 5, metadata !6}; [ DW_TAG_auto_variable ] +!5 = metadata !{i32 458763, metadata !1}; [DW_TAG_lexical_block ] +!6 = metadata !{i32 458788, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ] +!7 = metadata !{i32 6, i32 1, metadata !2, null} diff --git a/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll b/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll index 9b9d63609ab45..2ba12dfc56804 100644 --- a/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll +++ b/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll @@ -7,7 +7,7 @@ ; CHECK-NEXT: .byte 37 ## DW_AT_producer ; CHECK-NEXT: .byte 8 ## DW_FORM_string ; CHECK-NEXT: .byte 19 ## DW_AT_language -; CHECK-NEXT: .byte 11 ## DW_FORM_data1 +; CHECK-NEXT: .byte 5 ## DW_FORM_data2 ; CHECK-NEXT: .byte 3 ## DW_AT_name ; CHECK-NEXT: .byte 8 ## DW_FORM_string ; CHECK-NEXT: .byte 82 ## DW_AT_entry_pc diff --git a/test/CodeGen/X86/2010-08-04-StackVariable.ll b/test/CodeGen/X86/2010-08-04-StackVariable.ll new file mode 100644 index 0000000000000..edfd1b8687371 --- /dev/null +++ b/test/CodeGen/X86/2010-08-04-StackVariable.ll @@ -0,0 +1,124 @@ +; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_fbreg +; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot. + +%struct.SVal = type { i8*, i32 } + +define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp { +entry: + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24 + call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24 + %0 = icmp ne i32 %i, 0, !dbg !27 ; [#uses=1] + br i1 %0, label %bb, label %bb1, !dbg !27 + +bb: ; preds = %entry + %1 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !29 ; [#uses=1] + %2 = load i32* %1, align 8, !dbg !29 ; [#uses=1] + %3 = add i32 %2, %i, !dbg !29 ; [#uses=1] + br label %bb2, !dbg !29 + +bb1: ; preds = %entry + %4 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !30 ; [#uses=1] + %5 = load i32* %4, align 8, !dbg !30 ; [#uses=1] + %6 = sub i32 %5, 1, !dbg !30 ; [#uses=1] + br label %bb2, !dbg !30 + +bb2: ; preds = %bb1, %bb + %.0 = phi i32 [ %3, %bb ], [ %6, %bb1 ] ; [#uses=1] + br label %return, !dbg !29 + +return: ; preds = %bb2 + ret i32 %.0, !dbg !29 +} + +define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { +entry: + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34 + %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; [#uses=1] + store i8* null, i8** %0, align 8, !dbg !34 + %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; [#uses=1] + store i32 0, i32* %1, align 8, !dbg !34 + br label %return, !dbg !34 + +return: ; preds = %entry + ret void, !dbg !35 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +define i32 @main() nounwind ssp { +entry: + %0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3] + %v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4] + %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] + call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41 + call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41 + %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; [#uses=1] + store i32 1, i32* %1, align 8, !dbg !42 + %2 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 0, !dbg !43 ; [#uses=1] + %3 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 0, !dbg !43 ; [#uses=1] + %4 = load i8** %3, align 8, !dbg !43 ; [#uses=1] + store i8* %4, i8** %2, align 8, !dbg !43 + %5 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 1, !dbg !43 ; [#uses=1] + %6 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !43 ; [#uses=1] + %7 = load i32* %6, align 8, !dbg !43 ; [#uses=1] + store i32 %7, i32* %5, align 8, !dbg !43 + %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; [#uses=0] + call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43 + br label %return, !dbg !45 + +return: ; preds = %entry + ret i32 0, !dbg !45 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.sp = !{!0, !9, !16, !17, !20} + +!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 524307, metadata !2, metadata !"SVal", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_structure_type ] +!2 = metadata !{i32 524329, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !3} ; [ DW_TAG_file_type ] +!3 = metadata !{i32 524305, i32 0, i32 4, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] +!4 = metadata !{metadata !5, metadata !7, metadata !0, metadata !9} +!5 = metadata !{i32 524301, metadata !1, metadata !"Data", metadata !2, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] +!6 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] +!7 = metadata !{i32 524301, metadata !1, metadata !"Kind", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !8} ; [ DW_TAG_member ] +!8 = metadata !{i32 524324, metadata !2, metadata !"unsigned int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 524334, i32 0, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] +!11 = metadata !{null, metadata !12, metadata !13} +!12 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ] +!13 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, null} ; [ DW_TAG_subroutine_type ] +!15 = metadata !{null, metadata !12} +!16 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev} ; [ DW_TAG_subprogram ] +!17 = metadata !{i32 524334, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal} ; [ DW_TAG_subprogram ] +!18 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !19, i32 0, null} ; [ DW_TAG_subroutine_type ] +!19 = metadata !{metadata !13, metadata !13, metadata !1} +!20 = metadata !{i32 524334, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!21 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_subroutine_type ] +!22 = metadata !{metadata !13} +!23 = metadata !{i32 524545, metadata !17, metadata !"i", metadata !2, i32 16, metadata !13} ; [ DW_TAG_arg_variable ] +!24 = metadata !{i32 16, i32 0, metadata !17, null} +!25 = metadata !{i32 524545, metadata !17, metadata !"location", metadata !2, i32 16, metadata !26} ; [ DW_TAG_arg_variable ] +!26 = metadata !{i32 524304, metadata !2, metadata !"SVal", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_reference_type ] +!27 = metadata !{i32 17, i32 0, metadata !28, null} +!28 = metadata !{i32 524299, metadata !17, i32 16, i32 0, metadata !2, i32 2} ; [ DW_TAG_lexical_block ] +!29 = metadata !{i32 18, i32 0, metadata !28, null} +!30 = metadata !{i32 20, i32 0, metadata !28, null} +!31 = metadata !{i32 524545, metadata !16, metadata !"this", metadata !2, i32 11, metadata !32} ; [ DW_TAG_arg_variable ] +!32 = metadata !{i32 524326, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !33} ; [ DW_TAG_const_type ] +!33 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_pointer_type ] +!34 = metadata !{i32 11, i32 0, metadata !16, null} +!35 = metadata !{i32 11, i32 0, metadata !36, null} +!36 = metadata !{i32 524299, metadata !37, i32 11, i32 0, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] +!37 = metadata !{i32 524299, metadata !16, i32 11, i32 0, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!38 = metadata !{i32 524544, metadata !39, metadata !"v", metadata !2, i32 24, metadata !1} ; [ DW_TAG_auto_variable ] +!39 = metadata !{i32 524299, metadata !40, i32 23, i32 0, metadata !2, i32 4} ; [ DW_TAG_lexical_block ] +!40 = metadata !{i32 524299, metadata !20, i32 23, i32 0, metadata !2, i32 3} ; [ DW_TAG_lexical_block ] +!41 = metadata !{i32 24, i32 0, metadata !39, null} +!42 = metadata !{i32 25, i32 0, metadata !39, null} +!43 = metadata !{i32 26, i32 0, metadata !39, null} +!44 = metadata !{i32 524544, metadata !39, metadata !"k", metadata !2, i32 26, metadata !13} ; [ DW_TAG_auto_variable ] +!45 = metadata !{i32 27, i32 0, metadata !39, null} diff --git a/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll b/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll new file mode 100644 index 0000000000000..f982723781ea8 --- /dev/null +++ b/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -O2 -march=x86 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s +; PR9237: Assertion in VirtRegRewriter.cpp, ResurrectConfirmedKill +; `KillOps[*SR] == KillOp && "invalid subreg kill flags"' + +%t = type { i32 } + +define i32 @foo(%t* %s) nounwind { +entry: + br label %if.then735 + +if.then735: + %call747 = call i32 undef(%t* %s, i8* null, i8* undef, i32 128, i8* undef, i32 516) nounwind + br i1 undef, label %if.then751, label %if.then758 + +if.then751: + unreachable + +if.then758: + %add761 = add i32 %call747, 4 + %add763 = add i32 %add761, %call747 + %add.ptr768 = getelementptr inbounds [516 x i8]* null, i32 0, i32 %add761 + br i1 undef, label %cond.false783, label %cond.true771 + +cond.true771: + %call782 = call i8* @__memmove_chk(i8* %add.ptr768, i8* undef, i32 %call747, i32 undef) + br label %cond.end791 + +; CHECK: calll __memmove_chk +cond.false783: + %call.i1035 = call i8* @__memmove_chk(i8* %add.ptr768, i8* undef, i32 %call747, i32 undef) nounwind + br label %cond.end791 + +cond.end791: + %conv801 = trunc i32 %call747 to i8 + %add.ptr822.sum = add i32 %call747, 3 + %arrayidx833 = getelementptr inbounds [516 x i8]* null, i32 0, i32 %add.ptr822.sum + store i8 %conv801, i8* %arrayidx833, align 1 + %cmp841 = icmp eq i8* undef, null + br i1 %cmp841, label %if.end849, label %if.then843 + +if.then843: + unreachable + +if.end849: + %call921 = call i32 undef(%t* %s, i8* undef, i8* undef, i32 %add763) nounwind + unreachable + +} + +declare i8* @__memmove_chk(i8*, i8*, i32, i32) nounwind diff --git a/test/CodeGen/X86/2011-02-23-UnfoldBug.ll b/test/CodeGen/X86/2011-02-23-UnfoldBug.ll new file mode 100644 index 0000000000000..900106aac351d --- /dev/null +++ b/test/CodeGen/X86/2011-02-23-UnfoldBug.ll @@ -0,0 +1,42 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 +; rdar://9045024 +; PR9305 + +define void @calc_gb_rad_still_sse2_double() nounwind ssp { +entry: + br label %for.cond.outer + +for.cond.outer: ; preds = %if.end71, %entry + %theta.0.ph = phi <2 x double> [ undef, %entry ], [ %theta.1, %if.end71 ] + %mul.i97 = fmul <2 x double> %theta.0.ph, undef + %mul.i96 = fmul <2 x double> %mul.i97, fmul (<2 x double> , <2 x double> undef) + br i1 undef, label %for.body, label %for.end82 + +for.body: ; preds = %for.cond.outer + br i1 undef, label %for.body33.lr.ph, label %for.end + +for.body33.lr.ph: ; preds = %for.body + %dccf.2 = select i1 undef, <2 x double> %mul.i96, <2 x double> undef + unreachable + +for.end: ; preds = %for.body + %vecins.i94 = insertelement <2 x double> undef, double 0.000000e+00, i32 0 + %cmpsd.i = tail call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %vecins.i94, <2 x double> , i8 2) nounwind + tail call void (...)* @_mm_movemask_pd(<2 x double> %cmpsd.i) nounwind + br i1 undef, label %if.then67, label %if.end71 + +if.then67: ; preds = %for.end + %vecins.i91 = insertelement <2 x double> %vecins.i94, double undef, i32 0 + br label %if.end71 + +if.end71: ; preds = %if.then67, %for.end + %theta.1 = phi <2 x double> [ %vecins.i91, %if.then67 ], [ %theta.0.ph, %for.end ] + br label %for.cond.outer + +for.end82: ; preds = %for.cond.outer + ret void +} + +declare void @_mm_movemask_pd(...) + +declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll index 3ec5358affb32..62c898025c80a 100644 --- a/test/CodeGen/X86/add.ll +++ b/test/CodeGen/X86/add.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 ; The immediate can be encoded in a smaller way if the ; instruction is a sub instead of an add. @@ -43,7 +44,7 @@ overflow: ; X32-NEXT: jo ; X64: test4: -; X64: addl %esi, %edi +; X64: addl %e[[A1:si|dx]], %e[[A0:di|cx]] ; X64-NEXT: jo } @@ -66,7 +67,7 @@ carry: ; X32-NEXT: jb ; X64: test5: -; X64: addl %esi, %edi +; X64: addl %e[[A1]], %e[[A0]] ; X64-NEXT: jb } @@ -87,8 +88,8 @@ define i64 @test6(i64 %A, i32 %B) nounwind { ; X32-NEXT: ret ; X64: test6: -; X64: shlq $32, %rsi -; X64: leaq (%rsi,%rdi), %rax +; X64: shlq $32, %r[[A1]] +; X64: leaq (%r[[A1]],%r[[A0]]), %rax ; X64: ret } @@ -98,7 +99,7 @@ define {i32, i1} @test7(i32 %v1, i32 %v2) nounwind { } ; X64: test7: -; X64: addl %esi, %eax +; X64: addl %e[[A1]], %eax ; X64-NEXT: setb %dl ; X64-NEXT: ret diff --git a/test/CodeGen/X86/break-sse-dep.ll b/test/CodeGen/X86/break-sse-dep.ll index 094cbc7bdefc0..2dee5754256a1 100644 --- a/test/CodeGen/X86/break-sse-dep.ll +++ b/test/CodeGen/X86/break-sse-dep.ll @@ -1,9 +1,10 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse2 | FileCheck %s define double @t1(float* nocapture %x) nounwind readonly ssp { entry: ; CHECK: t1: -; CHECK: movss (%rdi), %xmm0 +; CHECK: movss ([[A0:%rdi|%rcx]]), %xmm0 ; CHECK: cvtss2sd %xmm0, %xmm0 %0 = load float* %x, align 4 @@ -14,7 +15,7 @@ entry: define float @t2(double* nocapture %x) nounwind readonly ssp optsize { entry: ; CHECK: t2: -; CHECK: cvtsd2ss (%rdi), %xmm0 +; CHECK: cvtsd2ss ([[A0]]), %xmm0 %0 = load double* %x, align 8 %1 = fptrunc double %0 to float ret float %1 @@ -23,7 +24,7 @@ entry: define float @squirtf(float* %x) nounwind { entry: ; CHECK: squirtf: -; CHECK: movss (%rdi), %xmm0 +; CHECK: movss ([[A0]]), %xmm0 ; CHECK: sqrtss %xmm0, %xmm0 %z = load float* %x %t = call float @llvm.sqrt.f32(float %z) @@ -33,7 +34,7 @@ entry: define double @squirt(double* %x) nounwind { entry: ; CHECK: squirt: -; CHECK: movsd (%rdi), %xmm0 +; CHECK: movsd ([[A0]]), %xmm0 ; CHECK: sqrtsd %xmm0, %xmm0 %z = load double* %x %t = call double @llvm.sqrt.f64(double %z) @@ -43,7 +44,7 @@ entry: define float @squirtf_size(float* %x) nounwind optsize { entry: ; CHECK: squirtf_size: -; CHECK: sqrtss (%rdi), %xmm0 +; CHECK: sqrtss ([[A0]]), %xmm0 %z = load float* %x %t = call float @llvm.sqrt.f32(float %z) ret float %t @@ -52,7 +53,7 @@ entry: define double @squirt_size(double* %x) nounwind optsize { entry: ; CHECK: squirt_size: -; CHECK: sqrtsd (%rdi), %xmm0 +; CHECK: sqrtsd ([[A0]]), %xmm0 %z = load double* %x %t = call double @llvm.sqrt.f64(double %z) ret double %t diff --git a/test/CodeGen/X86/codegen-dce.ll b/test/CodeGen/X86/codegen-dce.ll deleted file mode 100644 index d83efaf577661..0000000000000 --- a/test/CodeGen/X86/codegen-dce.ll +++ /dev/null @@ -1,43 +0,0 @@ -; RUN: llc < %s -march=x86 -stats |& grep {codegen-dce} | grep {Number of dead instructions deleted} - - %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] } - %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* } - %struct.node = type { i16, double, [3 x double], i32, i32 } - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { -entry: - %0 = malloc %struct.anon ; <%struct.anon*> [#uses=2] - %1 = getelementptr %struct.anon* %0, i32 0, i32 2 ; <%struct.node**> [#uses=1] - br label %bb14.i - -bb14.i: ; preds = %bb14.i, %entry - %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %2, %bb14.i ] ; [#uses=1] - %2 = add i32 %i8.0.reg2mem.0.i, 1 ; [#uses=2] - %exitcond74.i = icmp eq i32 %2, 32 ; [#uses=1] - br i1 %exitcond74.i, label %bb32.i, label %bb14.i - -bb32.i: ; preds = %bb32.i, %bb14.i - %tmp.0.reg2mem.0.i = phi i32 [ %indvar.next63.i, %bb32.i ], [ 0, %bb14.i ] ; [#uses=1] - %indvar.next63.i = add i32 %tmp.0.reg2mem.0.i, 1 ; [#uses=2] - %exitcond64.i = icmp eq i32 %indvar.next63.i, 64 ; [#uses=1] - br i1 %exitcond64.i, label %bb47.loopexit.i, label %bb32.i - -bb.i.i: ; preds = %bb47.loopexit.i - unreachable - -stepsystem.exit.i: ; preds = %bb47.loopexit.i - store %struct.node* null, %struct.node** %1, align 4 - br label %bb.i6.i - -bb.i6.i: ; preds = %bb.i6.i, %stepsystem.exit.i - br i1 false, label %bb107.i.i, label %bb.i6.i - -bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i - %q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %3, %bb.i6.i ] ; <%struct.bnode**> [#uses=0] - br label %bb107.i.i - -bb47.loopexit.i: ; preds = %bb32.i - %3 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 0 ; <%struct.bnode**> [#uses=1] - %4 = icmp eq %struct.node* null, null ; [#uses=1] - br i1 %4, label %stepsystem.exit.i, label %bb.i.i -} diff --git a/test/CodeGen/X86/codegen-prepare-extload.ll b/test/CodeGen/X86/codegen-prepare-extload.ll index 9f57d53178f3d..14df815663e3d 100644 --- a/test/CodeGen/X86/codegen-prepare-extload.ll +++ b/test/CodeGen/X86/codegen-prepare-extload.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win64 | FileCheck %s ; rdar://7304838 ; CodeGenPrepare should move the zext into the block with the load ; so that SelectionDAG can select it with the load. -; CHECK: movzbl (%rdi), %eax +; CHECK: movzbl ({{%rdi|%rcx}}), %eax define void @foo(i8* %p, i32* %q) { entry: diff --git a/test/CodeGen/X86/constant-pool-sharing.ll b/test/CodeGen/X86/constant-pool-sharing.ll index 33de5767ad65a..f979945835ffc 100644 --- a/test/CodeGen/X86/constant-pool-sharing.ll +++ b/test/CodeGen/X86/constant-pool-sharing.ll @@ -1,11 +1,12 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; llc should share constant pool entries between this integer vector ; and this floating-point vector since they have the same encoding. ; CHECK: LCPI0_0(%rip), %xmm0 -; CHECK: movaps %xmm0, (%rdi) -; CHECK: movaps %xmm0, (%rsi) +; CHECK: movaps %xmm0, ({{%rdi|%rcx}}) +; CHECK: movaps %xmm0, ({{%rsi|%rdx}}) define void @foo(<4 x i32>* %p, <4 x float>* %q, i1 %t) nounwind { entry: diff --git a/test/CodeGen/X86/ctpop-combine.ll b/test/CodeGen/X86/ctpop-combine.ll index c957d385a24a1..6406cc73e4128 100644 --- a/test/CodeGen/X86/ctpop-combine.ll +++ b/test/CodeGen/X86/ctpop-combine.ll @@ -9,7 +9,7 @@ define i32 @test1(i64 %x) nounwind readnone { %conv = zext i1 %cmp to i32 ret i32 %conv ; CHECK: test1: -; CHECK: leaq -1(%rdi) +; CHECK: leaq -1([[A0:%rdi|%rcx]]) ; CHECK-NEXT: testq ; CHECK-NEXT: setne ; CHECK: ret @@ -22,7 +22,7 @@ define i32 @test2(i64 %x) nounwind readnone { %conv = zext i1 %cmp to i32 ret i32 %conv ; CHECK: test2: -; CHECK: leaq -1(%rdi) +; CHECK: leaq -1([[A0]]) ; CHECK-NEXT: testq ; CHECK-NEXT: sete ; CHECK: ret diff --git a/test/CodeGen/X86/dbg-live-in-location.ll b/test/CodeGen/X86/dbg-live-in-location.ll deleted file mode 100644 index 9b1464d415f98..0000000000000 --- a/test/CodeGen/X86/dbg-live-in-location.ll +++ /dev/null @@ -1,84 +0,0 @@ -; RUN: llc < %s | FileCheck %s -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-apple-darwin10.0.0" - -@str = internal constant [3 x i8] c"Hi\00" - -define void @foo() nounwind ssp { -entry: - %puts = tail call i32 @puts(i8* getelementptr inbounds ([3 x i8]* @str, i64 0, i64 0)) - ret void, !dbg !17 -} - -; CHECK: arg.c:5:14 - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { -entry: - tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !9), !dbg !19 - tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !10), !dbg !20 - %cmp = icmp sgt i32 %argc, 1, !dbg !21 - br i1 %cmp, label %cond.end, label %for.body.lr.ph, !dbg !21 - -cond.end: ; preds = %entry - %arrayidx = getelementptr inbounds i8** %argv, i64 1, !dbg !21 - %tmp2 = load i8** %arrayidx, align 8, !dbg !21, !tbaa !22 - %call = tail call i32 (...)* @atoi(i8* %tmp2) nounwind, !dbg !21 - tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !16), !dbg !21 - tail call void @llvm.dbg.value(metadata !25, i64 0, metadata !14), !dbg !26 - %cmp57 = icmp sgt i32 %call, 0, !dbg !26 - br i1 %cmp57, label %for.body.lr.ph, label %for.end, !dbg !26 - -for.body.lr.ph: ; preds = %entry, %cond.end - %cond10 = phi i32 [ %call, %cond.end ], [ 300, %entry ] - br label %for.body - -for.body: ; preds = %for.body, %for.body.lr.ph - %i.08 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] - %puts.i = tail call i32 @puts(i8* getelementptr inbounds ([3 x i8]* @str, i64 0, i64 0)) nounwind - %inc = add nsw i32 %i.08, 1, !dbg !27 - %exitcond = icmp eq i32 %inc, %cond10 - br i1 %exitcond, label %for.end, label %for.body, !dbg !26 - -for.end: ; preds = %for.body, %cond.end - ret i32 0, !dbg !29 -} - -declare i32 @atoi(...) - -declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone - -declare i32 @puts(i8* nocapture) nounwind - -!llvm.dbg.sp = !{!0, !5} -!llvm.dbg.lv.main = !{!9, !10, !14, !16} - -!0 = metadata !{i32 589870, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, void ()* @foo} ; [ DW_TAG_subprogram ] -!1 = metadata !{i32 589865, metadata !"arg.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 589841, i32 0, i32 12, metadata !"arg.c", metadata !"/private/tmp", metadata !"clang version 2.9 (trunk 124504)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] -!4 = metadata !{null} -!5 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 6, metadata !6, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main} ; [ DW_TAG_subprogram ] -!6 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !7, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] -!7 = metadata !{metadata !8} -!8 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!9 = metadata !{i32 590081, metadata !5, metadata !"argc", metadata !1, i32 5, metadata !8, i32 0} ; [ DW_TAG_arg_variable ] -!10 = metadata !{i32 590081, metadata !5, metadata !"argv", metadata !1, i32 5, metadata !11, i32 0} ; [ DW_TAG_arg_variable ] -!11 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !12} ; [ DW_TAG_pointer_type ] -!12 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !13} ; [ DW_TAG_pointer_type ] -!13 = metadata !{i32 589860, metadata !2, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] -!14 = metadata !{i32 590080, metadata !15, metadata !"i", metadata !1, i32 7, metadata !8, i32 0} ; [ DW_TAG_auto_variable ] -!15 = metadata !{i32 589835, metadata !5, i32 6, i32 1, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] -!16 = metadata !{i32 590080, metadata !15, metadata !"iterations", metadata !1, i32 8, metadata !8, i32 0} ; [ DW_TAG_auto_variable ] -!17 = metadata !{i32 4, i32 1, metadata !18, null} -!18 = metadata !{i32 589835, metadata !0, i32 2, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] -!19 = metadata !{i32 5, i32 14, metadata !5, null} -!20 = metadata !{i32 5, i32 26, metadata !5, null} -!21 = metadata !{i32 8, i32 51, metadata !15, null} -!22 = metadata !{metadata !"any pointer", metadata !23} -!23 = metadata !{metadata !"omnipotent char", metadata !24} -!24 = metadata !{metadata !"Simple C/C++ TBAA", null} -!25 = metadata !{i32 0} -!26 = metadata !{i32 9, i32 2, metadata !15, null} -!27 = metadata !{i32 9, i32 30, metadata !28, null} -!28 = metadata !{i32 589835, metadata !15, i32 9, i32 2, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] -!29 = metadata !{i32 12, i32 9, metadata !15, null} diff --git a/test/CodeGen/X86/dbg-value-location.ll b/test/CodeGen/X86/dbg-value-location.ll index 2449046c65fb1..87d7e910c3391 100644 --- a/test/CodeGen/X86/dbg-value-location.ll +++ b/test/CodeGen/X86/dbg-value-location.ll @@ -5,10 +5,10 @@ target triple = "x86_64-apple-darwin10.0.0" ;CHECK: .ascii "var" ## DW_AT_name ;CHECK-NEXT: .byte 0 -;CHECK-NEXT: .byte 2 ## DW_AT_decl_file -;CHECK-NEXT: .short 19509 ## DW_AT_decl_line -;CHECK-NEXT: .long 68 ## DW_AT_type -;CHECK-NEXT: .byte 1 ## DW_AT_location +;CHECK-NEXT: ## DW_AT_decl_file +;CHECK-NEXT: ## DW_AT_decl_line +;CHECK-NEXT: ## DW_AT_type +;CHECK-NEXT: ## DW_AT_location @dfm = external global i32, align 4 diff --git a/test/CodeGen/X86/divide-by-constant.ll b/test/CodeGen/X86/divide-by-constant.ll index 7ceb972f61bbf..fe335b9369cbc 100644 --- a/test/CodeGen/X86/divide-by-constant.ll +++ b/test/CodeGen/X86/divide-by-constant.ll @@ -40,7 +40,7 @@ entry: %div = sdiv i16 %x, 33 ; [#uses=1] ret i16 %div ; CHECK: test4: -; CHECK: imull $-1985, %ecx, %ecx +; CHECK: imull $1986, %eax, %eax } define i32 @test5(i32 %A) nounwind { diff --git a/test/CodeGen/X86/dll-linkage.ll b/test/CodeGen/X86/dll-linkage.ll index 913617585206b..a0c2a54a99a46 100644 --- a/test/CodeGen/X86/dll-linkage.ll +++ b/test/CodeGen/X86/dll-linkage.ll @@ -1,9 +1,14 @@ ; RUN: llc < %s -mtriple=i386-pc-mingw32 | FileCheck %s +; RUN: llc < %s -mtriple=i386-pc-mingw32 -O0 | FileCheck %s -check-prefix=FAST +; PR6275 + declare dllimport void @foo() define void @bar() nounwind { ; CHECK: calll *__imp__foo +; FAST: movl __imp__foo, [[R:%[a-z]{3}]] +; FAST: calll *[[R]] call void @foo() ret void } diff --git a/test/CodeGen/X86/fast-isel-cmp-branch.ll b/test/CodeGen/X86/fast-isel-cmp-branch.ll index 4ab1bc61c7e2c..12312e8a581c4 100644 --- a/test/CodeGen/X86/fast-isel-cmp-branch.ll +++ b/test/CodeGen/X86/fast-isel-cmp-branch.ll @@ -1,13 +1,14 @@ -; RUN: llc -O0 -march=x86-64 -asm-verbose=false < %s | FileCheck %s +; RUN: llc -O0 -mtriple=x86_64-linux -asm-verbose=false < %s | FileCheck %s +; RUN: llc -O0 -mtriple=x86_64-win32 -asm-verbose=false < %s | FileCheck %s ; rdar://8337108 ; Fast-isel shouldn't try to look through the compare because it's in a ; different basic block, so its operands aren't necessarily exported ; for cross-block usage. -; CHECK: movb %al, 7(%rsp) +; CHECK: movb %al, [[OFS:[0-9]*]](%rsp) ; CHECK: callq {{_?}}bar -; CHECK: movb 7(%rsp), %al +; CHECK: movb [[OFS]](%rsp), %al declare void @bar() diff --git a/test/CodeGen/X86/fast-isel-gep.ll b/test/CodeGen/X86/fast-isel-gep.ll index 622a1ff831d03..fbe0243716bd6 100644 --- a/test/CodeGen/X86/fast-isel-gep.ll +++ b/test/CodeGen/X86/fast-isel-gep.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 -O0 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux -O0 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 -O0 | FileCheck %s --check-prefix=X64 ; RUN: llc < %s -march=x86 -O0 | FileCheck %s --check-prefix=X32 ; GEP indices are interpreted as signed integers, so they @@ -13,8 +14,8 @@ define i32 @test1(i32 %t3, i32* %t1) nounwind { ; X32: ret ; X64: test1: -; X64: movslq %edi, %rax -; X64: movl (%rsi,%rax,4), %eax +; X64: movslq %e[[A0:di|cx]], %rax +; X64: movl (%r[[A1:si|dx]],%rax,4), %eax ; X64: ret } @@ -27,7 +28,7 @@ define i32 @test2(i64 %t3, i32* %t1) nounwind { ; X32: ret ; X64: test2: -; X64: movl (%rsi,%rdi,4), %eax +; X64: movl (%r[[A1]],%r[[A0]],4), %eax ; X64: ret } @@ -47,7 +48,7 @@ entry: ; X32: ret ; X64: test3: -; X64: movb -2(%rdi), %al +; X64: movb -2(%r[[A0]]), %al ; X64: ret } @@ -80,9 +81,9 @@ define i64 @test5(i8* %A, i32 %I, i64 %B) nounwind { %v11 = add i64 %B, %v10 ret i64 %v11 ; X64: test5: -; X64: movslq %esi, %rax -; X64-NEXT: movq (%rdi,%rax), %rax -; X64-NEXT: addq %rdx, %rax +; X64: movslq %e[[A1]], %rax +; X64-NEXT: movq (%r[[A0]],%rax), %rax +; X64-NEXT: addq %{{rdx|r8}}, %rax ; X64-NEXT: ret } diff --git a/test/CodeGen/X86/gather-addresses.ll b/test/CodeGen/X86/gather-addresses.ll index 134ee28df6c8e..4a6927f6a269b 100644 --- a/test/CodeGen/X86/gather-addresses.ll +++ b/test/CodeGen/X86/gather-addresses.ll @@ -1,20 +1,21 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-win32 < %s | FileCheck %s ; rdar://7398554 ; When doing vector gather-scatter index calculation with 32-bit indices, ; bounce the vector off of cache rather than shuffling each individual ; element out of the index vector. -; CHECK: andps (%rdx), %xmm0 -; CHECK: movaps %xmm0, -24(%rsp) -; CHECK: movslq -24(%rsp), %rax -; CHECK: movsd (%rdi,%rax,8), %xmm0 -; CHECK: movslq -20(%rsp), %rax -; CHECK: movhpd (%rdi,%rax,8), %xmm0 -; CHECK: movslq -16(%rsp), %rax -; CHECK: movsd (%rdi,%rax,8), %xmm1 -; CHECK: movslq -12(%rsp), %rax -; CHECK: movhpd (%rdi,%rax,8), %xmm1 +; CHECK: andps ([[H:%rdx|%r8]]), %xmm0 +; CHECK: movaps %xmm0, {{(-24)?}}(%rsp) +; CHECK: movslq {{(-24)?}}(%rsp), %rax +; CHECK: movsd ([[P:%rdi|%rcx]],%rax,8), %xmm0 +; CHECK: movslq {{-20|4}}(%rsp), %rax +; CHECK: movhpd ([[P]],%rax,8), %xmm0 +; CHECK: movslq {{-16|8}}(%rsp), %rax +; CHECK: movsd ([[P]],%rax,8), %xmm1 +; CHECK: movslq {{-12|12}}(%rsp), %rax +; CHECK: movhpd ([[P]],%rax,8), %xmm1 define <4 x double> @foo(double* %p, <4 x i32>* %i, <4 x i32>* %h) nounwind { %a = load <4 x i32>* %i diff --git a/test/CodeGen/X86/i128-ret.ll b/test/CodeGen/X86/i128-ret.ll index 277f4283328b6..264f07ceb4c85 100644 --- a/test/CodeGen/X86/i128-ret.ll +++ b/test/CodeGen/X86/i128-ret.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86-64 | grep {movq 8(%rdi), %rdx} -; RUN: llc < %s -march=x86-64 | grep {movq (%rdi), %rax} +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s +; CHECK: movq ([[A0:%rdi|%rcx]]), %rax +; CHECK: movq 8([[A0]]), %rdx define i128 @test(i128 *%P) { %A = load i128* %P diff --git a/test/CodeGen/X86/lea.ll b/test/CodeGen/X86/lea.ll index 22a96448f029a..542135529f1d0 100644 --- a/test/CodeGen/X86/lea.ll +++ b/test/CodeGen/X86/lea.ll @@ -1,11 +1,12 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s define i32 @test1(i32 %x) nounwind { %tmp1 = shl i32 %x, 3 %tmp2 = add i32 %tmp1, 7 ret i32 %tmp2 ; CHECK: test1: -; CHECK: leal 7(,%rdi,8), %eax +; CHECK: leal 7(,[[A0:%rdi|%rcx]],8), %eax } @@ -27,8 +28,8 @@ bb.nph: bb2: ret i32 %x_offs ; CHECK: test2: -; CHECK: leal -5(%rdi), %eax +; CHECK: leal -5([[A0]]), %eax ; CHECK: andl $-4, %eax ; CHECK: negl %eax -; CHECK: leal -4(%rdi,%rax), %eax +; CHECK: leal -4([[A0]],%rax), %eax } diff --git a/test/CodeGen/X86/lsr-overflow.ll b/test/CodeGen/X86/lsr-overflow.ll index 0b0214c6d9f8a..5bc4f7e96a0b9 100644 --- a/test/CodeGen/X86/lsr-overflow.ll +++ b/test/CodeGen/X86/lsr-overflow.ll @@ -1,10 +1,11 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; The comparison uses the pre-inc value, which could lead LSR to ; try to compute -INT64_MIN. ; CHECK: movabsq $-9223372036854775808, %rax -; CHECK: cmpq %rax, %rbx +; CHECK: cmpq %rax, ; CHECK: sete %al declare i64 @bar() diff --git a/test/CodeGen/X86/lsr-reuse-trunc.ll b/test/CodeGen/X86/lsr-reuse-trunc.ll index d1d714491faab..29f03d68daded 100644 --- a/test/CodeGen/X86/lsr-reuse-trunc.ll +++ b/test/CodeGen/X86/lsr-reuse-trunc.ll @@ -1,12 +1,13 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; Full strength reduction wouldn't reduce register pressure, so LSR should ; stick with indexing here. -; CHECK: movaps (%rsi,%rax,4), %xmm3 -; CHECK: movaps %xmm3, (%rdi,%rax,4) +; CHECK: movaps (%{{rsi|rdx}},%rax,4), %xmm3 +; CHECK: movaps %xmm3, (%{{rdi|rcx}},%rax,4) ; CHECK: addq $4, %rax -; CHECK: cmpl %eax, (%rdx) +; CHECK: cmpl %eax, (%{{rdx|r8}}) ; CHECK-NEXT: jg define void @vvfloorf(float* nocapture %y, float* nocapture %x, i32* nocapture %n) nounwind { diff --git a/test/CodeGen/X86/memcmp.ll b/test/CodeGen/X86/memcmp.ll index 36be1f308ccd5..f4bc1bb7015a0 100644 --- a/test/CodeGen/X86/memcmp.ll +++ b/test/CodeGen/X86/memcmp.ll @@ -1,4 +1,5 @@ -; RUN: llc %s -o - -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; This tests codegen time inlining/optimization of memcmp ; rdar://6480398 @@ -20,8 +21,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp2: -; CHECK: movw (%rdi), %ax -; CHECK: cmpw (%rsi), %ax +; CHECK: movw ([[A0:%rdi|%rcx]]), %ax +; CHECK: cmpw ([[A1:%rsi|%rdx]]), %ax } define void @memcmp2a(i8* %X, i32* nocapture %P) nounwind { @@ -37,7 +38,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp2a: -; CHECK: cmpw $28527, (%rdi) +; CHECK: cmpw $28527, ([[A0]]) } @@ -54,8 +55,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp4: -; CHECK: movl (%rdi), %eax -; CHECK: cmpl (%rsi), %eax +; CHECK: movl ([[A0]]), %eax +; CHECK: cmpl ([[A1]]), %eax } define void @memcmp4a(i8* %X, i32* nocapture %P) nounwind { @@ -71,7 +72,7 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp4a: -; CHECK: cmpl $1869573999, (%rdi) +; CHECK: cmpl $1869573999, ([[A0]]) } define void @memcmp8(i8* %X, i8* %Y, i32* nocapture %P) nounwind { @@ -87,8 +88,8 @@ bb: ; preds = %entry return: ; preds = %entry ret void ; CHECK: memcmp8: -; CHECK: movq (%rdi), %rax -; CHECK: cmpq (%rsi), %rax +; CHECK: movq ([[A0]]), %rax +; CHECK: cmpq ([[A1]]), %rax } define void @memcmp8a(i8* %X, i32* nocapture %P) nounwind { @@ -105,6 +106,6 @@ return: ; preds = %entry ret void ; CHECK: memcmp8a: ; CHECK: movabsq $8029759185026510694, %rax -; CHECK: cmpq %rax, (%rdi) +; CHECK: cmpq %rax, ([[A0]]) } diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index 00190e802fc94..97b7fe70d8589 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mattr=sse41 | FileCheck %s --check-prefix=X32 -; RUN: llc < %s -march=x86-64 -mattr=sse41 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux -mattr=sse41 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse41 | FileCheck %s --check-prefix=X64 define i32 @test1() nounwind readonly { entry: @@ -30,7 +31,7 @@ entry: ; X32: calll *%gs:(%eax) ; X64: test2: -; X64: callq *%gs:(%rdi) +; X64: callq *%gs:([[A0:%rdi|%rcx]]) @@ -50,7 +51,7 @@ entry: ; X32: ret ; X64: pmovsxwd_1: -; X64: pmovsxwd %gs:(%rdi), %xmm0 +; X64: pmovsxwd %gs:([[A0]]), %xmm0 ; X64: ret } diff --git a/test/CodeGen/X86/non-globl-eh-frame.ll b/test/CodeGen/X86/non-globl-eh-frame.ll deleted file mode 100644 index 71349ecafeb68..0000000000000 --- a/test/CodeGen/X86/non-globl-eh-frame.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: llc < %s -mtriple x86_64-apple-darwin10 -march x86 | not grep {{.globl\[\[:space:\]\]*__Z4funcv.eh}} -; RUN: llc < %s -mtriple x86_64-apple-darwin9 -march x86 | FileCheck %s -check-prefix=DARWIN9 - -%struct.__pointer_type_info_pseudo = type { %struct.__type_info_pseudo, i32, %"struct.std::type_info"* } -%struct.__type_info_pseudo = type { i8*, i8* } -%"struct.std::type_info" = type opaque - -@.str = private constant [12 x i8] c"hello world\00", align 1 -@_ZTIPc = external constant %struct.__pointer_type_info_pseudo - -define void @_Z4funcv() noreturn optsize ssp { -entry: - %0 = tail call i8* @__cxa_allocate_exception(i64 8) nounwind - %1 = bitcast i8* %0 to i8** - store i8* getelementptr inbounds ([12 x i8]* @.str, i64 0, i64 0), i8** %1, align 8 - tail call void @__cxa_throw(i8* %0, i8* bitcast (%struct.__pointer_type_info_pseudo* @_ZTIPc to i8*), void (i8*)* null) noreturn - unreachable -} - -; DARWIN9: .globl __Z4funcv.eh - -declare i8* @__cxa_allocate_exception(i64) nounwind - -declare void @__cxa_throw(i8*, i8*, void (i8*)*) noreturn diff --git a/test/CodeGen/X86/optimize-max-3.ll b/test/CodeGen/X86/optimize-max-3.ll index f1e3c2772ac9e..b90413d40a0f9 100644 --- a/test/CodeGen/X86/optimize-max-3.ll +++ b/test/CodeGen/X86/optimize-max-3.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux -asm-verbose=false | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 -asm-verbose=false | FileCheck %s ; LSR's OptimizeMax should eliminate the select (max). @@ -40,13 +41,13 @@ for.end: ; preds = %for.body, %entry ; CHECK: jle ; CHECK-NOT: cmov -; CHECK: xorl %edi, %edi +; CHECK: xorl {{%edi, %edi|%ecx, %ecx}} ; CHECK-NEXT: align ; CHECK-NEXT: BB1_2: ; CHECK-NEXT: callq -; CHECK-NEXT: incl %ebx -; CHECK-NEXT: cmpl %r14d, %ebx -; CHECK-NEXT: movq %rax, %rdi +; CHECK-NEXT: incl [[BX:%ebx|%esi]] +; CHECK-NEXT: cmpl [[R14:%r14d|%edi]], [[BX]] +; CHECK-NEXT: movq %rax, %r{{di|cx}} ; CHECK-NEXT: jl define void @_Z18GenerateStatusPagei(i32 %jobs_to_display) nounwind { diff --git a/test/CodeGen/X86/phi-constants.ll b/test/CodeGen/X86/phi-constants.ll new file mode 100644 index 0000000000000..da9652f734043 --- /dev/null +++ b/test/CodeGen/X86/phi-constants.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +%"class.std::bitset" = type { [8 x i8] } + +define zeroext i1 @_Z3fooPjmS_mRSt6bitsetILm32EE(i32* nocapture %a, i64 %asize, i32* nocapture %b, i64 %bsize, %"class.std::bitset"* %bits) nounwind readonly ssp noredzone { +entry: + %tmp.i.i.i.i = bitcast %"class.std::bitset"* %bits to i64* + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %0 = phi i32 [ 0, %entry ], [ %inc, %for.inc ] + %conv = zext i32 %0 to i64 + %cmp = icmp eq i64 %conv, %bsize + br i1 %cmp, label %return, label %for.body + +for.body: ; preds = %for.cond + %arrayidx = getelementptr inbounds i32* %b, i64 %conv + %tmp5 = load i32* %arrayidx, align 4 + %conv6 = zext i32 %tmp5 to i64 + %rem.i.i.i.i = and i64 %conv6, 63 + %tmp3.i = load i64* %tmp.i.i.i.i, align 8 + %shl.i.i = shl i64 1, %rem.i.i.i.i + %and.i = and i64 %shl.i.i, %tmp3.i + %cmp.i = icmp eq i64 %and.i, 0 + br i1 %cmp.i, label %for.inc, label %return + +for.inc: ; preds = %for.body + %inc = add i32 %0, 1 + br label %for.cond + +return: ; preds = %for.body, %for.cond +; CHECK-NOT: and + %retval.0 = phi i1 [ true, %for.body ], [ false, %for.cond ] + ret i1 %retval.0 +} diff --git a/test/CodeGen/X86/pr9127.ll b/test/CodeGen/X86/pr9127.ll index 45b0c6c78706c..9b251f57e0e33 100644 --- a/test/CodeGen/X86/pr9127.ll +++ b/test/CodeGen/X86/pr9127.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=x86-64 < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s +; RUN: llc -mtriple=x86_64-win32 < %s | FileCheck %s define i8 @foobar(double %d, double* %x) { entry: @@ -9,4 +10,4 @@ entry: } ; test that the load is folded. -; CHECK: ucomisd (%rdi), %xmm0 +; CHECK: ucomisd (%{{rdi|rdx}}), %xmm0 diff --git a/test/CodeGen/X86/red-zone.ll b/test/CodeGen/X86/red-zone.ll index 1ffb4e3c78f67..d93697123596d 100644 --- a/test/CodeGen/X86/red-zone.ll +++ b/test/CodeGen/X86/red-zone.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s ; First without noredzone. ; CHECK: f0: diff --git a/test/CodeGen/X86/remat-mov-0.ll b/test/CodeGen/X86/remat-mov-0.ll index 5fb445c9357c8..f89cd330803d8 100644 --- a/test/CodeGen/X86/remat-mov-0.ll +++ b/test/CodeGen/X86/remat-mov-0.ll @@ -1,12 +1,13 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; CodeGen should remat the zero instead of spilling it. declare void @foo(i64 %p) ; CHECK: bar: -; CHECK: xorl %edi, %edi -; CHECK: xorl %edi, %edi +; CHECK: xorl %e[[A0:di|cx]], %e +; CHECK: xorl %e[[A0]], %e[[A0]] define void @bar() nounwind { call void @foo(i64 0) call void @foo(i64 0) @@ -14,8 +15,8 @@ define void @bar() nounwind { } ; CHECK: bat: -; CHECK: movq $-1, %rdi -; CHECK: movq $-1, %rdi +; CHECK: movq $-1, %r[[A0]] +; CHECK: movq $-1, %r[[A0]] define void @bat() nounwind { call void @foo(i64 -1) call void @foo(i64 -1) @@ -23,8 +24,8 @@ define void @bat() nounwind { } ; CHECK: bau: -; CHECK: movl $1, %edi -; CHECK: movl $1, %edi +; CHECK: movl $1, %e[[A0]] +; CHECK: movl $1, %e[[A0]] define void @bau() nounwind { call void @foo(i64 1) call void @foo(i64 1) diff --git a/test/CodeGen/X86/test-shrink.ll b/test/CodeGen/X86/test-shrink.ll index 1d636930641f8..5bc28ecbc48c8 100644 --- a/test/CodeGen/X86/test-shrink.ll +++ b/test/CodeGen/X86/test-shrink.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=CHECK-64 +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=CHECK-64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=CHECK-64 ; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=CHECK-32 ; CHECK-64: g64xh: -; CHECK-64: testb $8, %ah +; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret ; CHECK-32: g64xh: ; CHECK-32: testb $8, %ah @@ -19,7 +20,7 @@ no: ret void } ; CHECK-64: g64xl: -; CHECK-64: testb $8, %dil +; CHECK-64: testb $8, [[A0L:%dil|%cl]] ; CHECK-64: ret ; CHECK-32: g64xl: ; CHECK-32: testb $8, %al @@ -36,7 +37,7 @@ no: ret void } ; CHECK-64: g32xh: -; CHECK-64: testb $8, %ah +; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret ; CHECK-32: g32xh: ; CHECK-32: testb $8, %ah @@ -53,7 +54,7 @@ no: ret void } ; CHECK-64: g32xl: -; CHECK-64: testb $8, %dil +; CHECK-64: testb $8, [[A0L]] ; CHECK-64: ret ; CHECK-32: g32xl: ; CHECK-32: testb $8, %al @@ -70,7 +71,7 @@ no: ret void } ; CHECK-64: g16xh: -; CHECK-64: testb $8, %ah +; CHECK-64: testb $8, {{%ah|%ch}} ; CHECK-64: ret ; CHECK-32: g16xh: ; CHECK-32: testb $8, %ah @@ -87,7 +88,7 @@ no: ret void } ; CHECK-64: g16xl: -; CHECK-64: testb $8, %dil +; CHECK-64: testb $8, [[A0L]] ; CHECK-64: ret ; CHECK-32: g16xl: ; CHECK-32: testb $8, %al @@ -104,7 +105,7 @@ no: ret void } ; CHECK-64: g64x16: -; CHECK-64: testw $-32640, %di +; CHECK-64: testw $-32640, %[[A0W:di|cx]] ; CHECK-64: ret ; CHECK-32: g64x16: ; CHECK-32: testw $-32640, %ax @@ -121,7 +122,7 @@ no: ret void } ; CHECK-64: g32x16: -; CHECK-64: testw $-32640, %di +; CHECK-64: testw $-32640, %[[A0W]] ; CHECK-64: ret ; CHECK-32: g32x16: ; CHECK-32: testw $-32640, %ax @@ -138,7 +139,7 @@ no: ret void } ; CHECK-64: g64x32: -; CHECK-64: testl $268468352, %edi +; CHECK-64: testl $268468352, %e[[A0W]] ; CHECK-64: ret ; CHECK-32: g64x32: ; CHECK-32: testl $268468352, %eax diff --git a/test/CodeGen/X86/use-add-flags.ll b/test/CodeGen/X86/use-add-flags.ll index c2f0c23fe1d3e..8fbbd397b8af2 100644 --- a/test/CodeGen/X86/use-add-flags.ll +++ b/test/CodeGen/X86/use-add-flags.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -march=x86-64 -o - | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; Reuse the flags value from the add instructions instead of emitting separate ; testl instructions. @@ -6,9 +7,9 @@ ; Use the flags on the add. ; CHECK: test1: -; CHECK: addl (%rdi), %esi -; CHECK-NEXT: movl %edx, %eax -; CHECK-NEXT: cmovnsl %ecx, %eax +; CHECK: addl (%r[[A0:di|cx]]), {{%esi|%edx}} +; CHECK-NEXT: movl {{%edx|%r8d}}, %eax +; CHECK-NEXT: cmovnsl {{%ecx|%r9d}}, %eax ; CHECK-NEXT: ret define i32 @test1(i32* %x, i32 %y, i32 %a, i32 %b) nounwind { @@ -25,7 +26,7 @@ declare void @foo(i32) ; other use. A simple test is better. ; CHECK: test2: -; CHECK: testb $16, %dil +; CHECK: testb $16, {{%dil|%cl}} define void @test2(i32 %x) nounwind { %y = and i32 %x, 16 @@ -41,7 +42,7 @@ false: ; Do use the flags result of the and here, since the and has another use. ; CHECK: test3: -; CHECK: andl $16, %edi +; CHECK: andl $16, %e[[A0]] ; CHECK-NEXT: jne define void @test3(i32 %x) nounwind { diff --git a/test/CodeGen/X86/vec_anyext.ll b/test/CodeGen/X86/vec_anyext.ll new file mode 100644 index 0000000000000..d2a4c7f60dd7c --- /dev/null +++ b/test/CodeGen/X86/vec_anyext.ll @@ -0,0 +1,77 @@ +; RUN: llc < %s -march=x86-64 +; PR 9267 + +define<4 x i16> @func_16_32() { + %F = load <4 x i32>* undef + %G = trunc <4 x i32> %F to <4 x i16> + %H = load <4 x i32>* undef + %Y = trunc <4 x i32> %H to <4 x i16> + %T = add <4 x i16> %Y, %G + store <4 x i16>%T , <4 x i16>* undef + ret <4 x i16> %T +} + +define<4 x i16> @func_16_64() { + %F = load <4 x i64>* undef + %G = trunc <4 x i64> %F to <4 x i16> + %H = load <4 x i64>* undef + %Y = trunc <4 x i64> %H to <4 x i16> + %T = xor <4 x i16> %Y, %G + store <4 x i16>%T , <4 x i16>* undef + ret <4 x i16> %T +} + +define<4 x i32> @func_32_64() { + %F = load <4 x i64>* undef + %G = trunc <4 x i64> %F to <4 x i32> + %H = load <4 x i64>* undef + %Y = trunc <4 x i64> %H to <4 x i32> + %T = or <4 x i32> %Y, %G + ret <4 x i32> %T +} + +define<4 x i8> @func_8_16() { + %F = load <4 x i16>* undef + %G = trunc <4 x i16> %F to <4 x i8> + %H = load <4 x i16>* undef + %Y = trunc <4 x i16> %H to <4 x i8> + %T = add <4 x i8> %Y, %G + ret <4 x i8> %T +} + +define<4 x i8> @func_8_32() { + %F = load <4 x i32>* undef + %G = trunc <4 x i32> %F to <4 x i8> + %H = load <4 x i32>* undef + %Y = trunc <4 x i32> %H to <4 x i8> + %T = sub <4 x i8> %Y, %G + ret <4 x i8> %T +} + +define<4 x i8> @func_8_64() { + %F = load <4 x i64>* undef + %G = trunc <4 x i64> %F to <4 x i8> + %H = load <4 x i64>* undef + %Y = trunc <4 x i64> %H to <4 x i8> + %T = add <4 x i8> %Y, %G + ret <4 x i8> %T +} + +define<4 x i16> @const_16_32() { + %G = trunc <4 x i32> to <4 x i16> + ret <4 x i16> %G +} + +define<4 x i16> @const_16_64() { + %G = trunc <4 x i64> to <4 x i16> + ret <4 x i16> %G +} + +define void @bugOnTruncBitwidthReduce() nounwind { +meh: + %0 = xor <4 x i64> zeroinitializer, zeroinitializer + %1 = trunc <4 x i64> %0 to <4 x i32> + %2 = lshr <4 x i32> %1, + %3 = xor <4 x i32> %2, %1 + ret void +} diff --git a/test/CodeGen/X86/vec_sext.ll b/test/CodeGen/X86/vec_sext.ll new file mode 100644 index 0000000000000..776ddec2e63bd --- /dev/null +++ b/test/CodeGen/X86/vec_sext.ll @@ -0,0 +1,69 @@ +; RUN: llc < %s -march=x86-64 +; PR 9267 + +define<4 x i32> @func_16_32() { + %F = load <4 x i16>* undef + %G = sext <4 x i16> %F to <4 x i32> + %H = load <4 x i16>* undef + %Y = sext <4 x i16> %H to <4 x i32> + %T = add <4 x i32> %Y, %G + store <4 x i32>%T , <4 x i32>* undef + ret <4 x i32> %T +} + +define<4 x i64> @func_16_64() { + %F = load <4 x i16>* undef + %G = sext <4 x i16> %F to <4 x i64> + %H = load <4 x i16>* undef + %Y = sext <4 x i16> %H to <4 x i64> + %T = xor <4 x i64> %Y, %G + store <4 x i64>%T , <4 x i64>* undef + ret <4 x i64> %T +} + +define<4 x i64> @func_32_64() { + %F = load <4 x i32>* undef + %G = sext <4 x i32> %F to <4 x i64> + %H = load <4 x i32>* undef + %Y = sext <4 x i32> %H to <4 x i64> + %T = or <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i16> @func_8_16() { + %F = load <4 x i8>* undef + %G = sext <4 x i8> %F to <4 x i16> + %H = load <4 x i8>* undef + %Y = sext <4 x i8> %H to <4 x i16> + %T = add <4 x i16> %Y, %G + ret <4 x i16> %T +} + +define<4 x i32> @func_8_32() { + %F = load <4 x i8>* undef + %G = sext <4 x i8> %F to <4 x i32> + %H = load <4 x i8>* undef + %Y = sext <4 x i8> %H to <4 x i32> + %T = sub <4 x i32> %Y, %G + ret <4 x i32> %T +} + +define<4 x i64> @func_8_64() { + %F = load <4 x i8>* undef + %G = sext <4 x i8> %F to <4 x i64> + %H = load <4 x i8>* undef + %Y = sext <4 x i8> %H to <4 x i64> + %T = add <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i32> @const_16_32() { + %G = sext <4 x i16> to <4 x i32> + ret <4 x i32> %G +} + +define<4 x i64> @const_16_64() { + %G = sext <4 x i16> to <4 x i64> + ret <4 x i64> %G +} + diff --git a/test/CodeGen/X86/vec_shuffle-37.ll b/test/CodeGen/X86/vec_shuffle-37.ll index b09093089c5aa..2efdb14b40446 100644 --- a/test/CodeGen/X86/vec_shuffle-37.ll +++ b/test/CodeGen/X86/vec_shuffle-37.ll @@ -1,9 +1,10 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; RUN: llc -O0 < %s -march=x86 -mcpu=core2 | FileCheck %s --check-prefix=CHECK_O0 define <4 x i32> @t00(<4 x i32>* %a0) nounwind ssp { entry: -; CHECK: movaps (%rdi), %xmm0 +; CHECK: movaps ({{%rdi|%rcx}}), %xmm0 ; CHECK-NEXT: movaps %xmm0, %xmm1 ; CHECK-NEXT: movlps (%rax), %xmm1 ; CHECK-NEXT: shufps $36, %xmm1, %xmm0 diff --git a/test/CodeGen/X86/vec_zext.ll b/test/CodeGen/X86/vec_zext.ll new file mode 100644 index 0000000000000..615a50b7afc33 --- /dev/null +++ b/test/CodeGen/X86/vec_zext.ll @@ -0,0 +1,69 @@ +; RUN: llc < %s -march=x86-64 +; PR 9267 + +define<4 x i32> @func_16_32() { + %F = load <4 x i16>* undef + %G = zext <4 x i16> %F to <4 x i32> + %H = load <4 x i16>* undef + %Y = zext <4 x i16> %H to <4 x i32> + %T = add <4 x i32> %Y, %G + store <4 x i32>%T , <4 x i32>* undef + ret <4 x i32> %T +} + +define<4 x i64> @func_16_64() { + %F = load <4 x i16>* undef + %G = zext <4 x i16> %F to <4 x i64> + %H = load <4 x i16>* undef + %Y = zext <4 x i16> %H to <4 x i64> + %T = xor <4 x i64> %Y, %G + store <4 x i64>%T , <4 x i64>* undef + ret <4 x i64> %T +} + +define<4 x i64> @func_32_64() { + %F = load <4 x i32>* undef + %G = zext <4 x i32> %F to <4 x i64> + %H = load <4 x i32>* undef + %Y = zext <4 x i32> %H to <4 x i64> + %T = or <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i16> @func_8_16() { + %F = load <4 x i8>* undef + %G = zext <4 x i8> %F to <4 x i16> + %H = load <4 x i8>* undef + %Y = zext <4 x i8> %H to <4 x i16> + %T = add <4 x i16> %Y, %G + ret <4 x i16> %T +} + +define<4 x i32> @func_8_32() { + %F = load <4 x i8>* undef + %G = zext <4 x i8> %F to <4 x i32> + %H = load <4 x i8>* undef + %Y = zext <4 x i8> %H to <4 x i32> + %T = sub <4 x i32> %Y, %G + ret <4 x i32> %T +} + +define<4 x i64> @func_8_64() { + %F = load <4 x i8>* undef + %G = zext <4 x i8> %F to <4 x i64> + %H = load <4 x i8>* undef + %Y = zext <4 x i8> %H to <4 x i64> + %T = add <4 x i64> %Y, %G + ret <4 x i64> %T +} + +define<4 x i32> @const_16_32() { + %G = zext <4 x i16> to <4 x i32> + ret <4 x i32> %G +} + +define<4 x i64> @const_16_64() { + %G = zext <4 x i16> to <4 x i64> + ret <4 x i64> %G +} + diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll index 6c623cb155388..b90d81ac9b188 100644 --- a/test/CodeGen/X86/xor.ll +++ b/test/CodeGen/X86/xor.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=X64 ; Though it is undefined, we want xor undef,undef to produce zero. define <4 x i32> @test1() nounwind { @@ -28,9 +29,9 @@ entry: ret i32 %tmp4 ; X64: test3: -; X64: notl %esi -; X64: andl %edi, %esi -; X64: movl %esi, %eax +; X64: notl [[A1:%esi|%edx]] +; X64: andl [[A0:%edi|%ecx]], [[A1]] +; X64: movl [[A1]], %eax ; X64: shrl %eax ; X64: ret diff --git a/test/CodeGen/XCore/events.ll b/test/CodeGen/XCore/events.ll new file mode 100644 index 0000000000000..4fc2f26d1b6be --- /dev/null +++ b/test/CodeGen/XCore/events.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s -march=xcore | FileCheck %s + +declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p) +declare i8* @llvm.xcore.waitevent() +declare void @llvm.xcore.clre() + +define i32 @f(i8 addrspace(1)* %r) nounwind { +; CHECK: f: +entry: +; CHECK: clre + call void @llvm.xcore.clre() + call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L1)) + call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* blockaddress(@f, %L2)) + %goto_addr = call i8* @llvm.xcore.waitevent() +; CHECK: waiteu + indirectbr i8* %goto_addr, [label %L1, label %L2] +L1: + br label %ret +L2: + br label %ret +ret: + %retval = phi i32 [1, %L1], [2, %L2] + ret i32 %retval +} diff --git a/test/CodeGen/XCore/resources.ll b/test/CodeGen/XCore/resources.ll index 3114bdcd17771..3389912b8c0b2 100644 --- a/test/CodeGen/XCore/resources.ll +++ b/test/CodeGen/XCore/resources.ll @@ -11,6 +11,14 @@ declare void @llvm.xcore.outct.p1i8(i8 addrspace(1)* %r, i32 %value) declare void @llvm.xcore.chkct.p1i8(i8 addrspace(1)* %r, i32 %value) declare void @llvm.xcore.setd.p1i8(i8 addrspace(1)* %r, i32 %value) declare void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 %value) +declare i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value) +declare i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value) +declare i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r) +declare void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r) +declare void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value) +declare void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p) +declare void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r) define i8 addrspace(1)* @getr() { ; CHECK: getr: @@ -109,3 +117,60 @@ define void @setci(i8 addrspace(1)* %r) { call void @llvm.xcore.setc.p1i8(i8 addrspace(1)* %r, i32 2) ret void } + +define i32 @inshr(i32 %value, i8 addrspace(1)* %r) { +; CHECK: inshr: +; CHECK: inshr r0, res[r1] + %result = call i32 @llvm.xcore.inshr.p1i8(i8 addrspace(1)* %r, i32 %value) + ret i32 %result +} + +define i32 @outshr(i32 %value, i8 addrspace(1)* %r) { +; CHECK: outshr: +; CHECK: outshr res[r1], r0 + %result = call i32 @llvm.xcore.outshr.p1i8(i8 addrspace(1)* %r, i32 %value) + ret i32 %result +} + +define void @setpt(i8 addrspace(1)* %r, i32 %value) { +; CHECK: setpt: +; CHECK: setpt res[r0], r1 + call void @llvm.xcore.setpt.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define i32 @getts(i8 addrspace(1)* %r) { +; CHECK: getts: +; CHECK: getts r0, res[r0] + %result = call i32 @llvm.xcore.getts.p1i8(i8 addrspace(1)* %r) + ret i32 %result +} + +define void @syncr(i8 addrspace(1)* %r) { +; CHECK: syncr: +; CHECK: syncr res[r0] + call void @llvm.xcore.syncr.p1i8(i8 addrspace(1)* %r) + ret void +} + +define void @settw(i8 addrspace(1)* %r, i32 %value) { +; CHECK: settw: +; CHECK: settw res[r0], r1 + call void @llvm.xcore.settw.p1i8(i8 addrspace(1)* %r, i32 %value) + ret void +} + +define void @setv(i8 addrspace(1)* %r, i8* %p) { +; CHECK: setv: +; CHECK: mov r11, r1 +; CHECK-NEXT: setv res[r0], r11 + call void @llvm.xcore.setv.p1i8(i8 addrspace(1)* %r, i8* %p) + ret void +} + +define void @eeu(i8 addrspace(1)* %r) { +; CHECK: eeu: +; CHECK: eeu res[r0] + call void @llvm.xcore.eeu.p1i8(i8 addrspace(1)* %r) + ret void +} diff --git a/test/DebugInfo/2009-03-03-deadstore.ll b/test/DebugInfo/2009-03-03-deadstore.ll deleted file mode 100644 index 0705c155f9f7c..0000000000000 --- a/test/DebugInfo/2009-03-03-deadstore.ll +++ /dev/null @@ -1,108 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep alloca -; ModuleID = '' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin9.6" - - type { } ; type %0 - type <{ i8 }> ; type %1 - type { i32 (...)**, %3 } ; type %2 - type { %4, %2*, i8, i8, %10*, %11*, %12*, %12* } ; type %3 - type { i32 (...)**, i32, i32, i32, i32, i32, %5*, %6, [8 x %6], i32, %6*, %7 } ; type %4 - type { %5*, void (i32, %4*, i32)*, i32, i32 } ; type %5 - type { i8*, i32 } ; type %6 - type { %8* } ; type %7 - type { i32, %9**, i32, %9**, i8** } ; type %8 - type { i32 (...)**, i32 } ; type %9 - type { i32 (...)**, i8*, i8*, i8*, i8*, i8*, i8*, %7 } ; type %10 - type { %9, i32*, i8, i32*, i32*, i32*, i8, [256 x i8], [256 x i8], i8 } ; type %11 - type { %9 } ; type %12 - type { i32, void ()* } ; type %13 - type { %15 } ; type %14 - type { %16 } ; type %15 - type { %17 } ; type %16 - type { i32*, i32*, i32* } ; type %17 - type { %19 } ; type %18 - type { %20 } ; type %19 - type { %21 } ; type %20 - type { %14*, %14*, %14* } ; type %21 - type { i32 } ; type %22 - type { i8 } ; type %23 - type { i32* } ; type %24 - type { %14* } ; type %25 - type { %27 } ; type %26 - type { i8* } ; type %27 - type { %29, %30, %3 } ; type %28 - type { i32 (...)** } ; type %29 - type { %10, i32, %26 } ; type %30 - %llvm.dbg.anchor.type = type { i32, i32 } - %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 } - %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 } - %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 } - %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* } - %llvm.dbg.enumerator.type = type { i32, i8*, i64 } - %llvm.dbg.global_variable.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1, %0* } - %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 } - %llvm.dbg.subrange.type = type { i32, i64, i64 } - %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* } - -@llvm.dbg.compile_units = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -@llvm.dbg.subprograms = linkonce constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -internal constant [11 x i8] c"bigfib.cpp\00", section "llvm.metadata" ; <[11 x i8]*>:0 [#uses=1] -internal constant [84 x i8] c"/Volumes/Nanpura/mainline/llvm/projects/llvm-test/SingleSource/Benchmarks/Misc-C++/\00", section "llvm.metadata" ; <[84 x i8]*>:1 [#uses=1] -internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 2099)\00", section "llvm.metadata" ; <[57 x i8]*>:2 [#uses=1] -@llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @0, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [23 x i8] c"/usr/include/c++/4.0.0\00", section "llvm.metadata" ; <[23 x i8]*>:3 [#uses=1] - - -internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*>:4 [#uses=1] -@llvm.dbg.basictype103 = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @4, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] -internal constant [8 x i8] c"iomanip\00", section "llvm.metadata" ; <[8 x i8]*>:5 [#uses=1] -@llvm.dbg.compile_unit1548 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @5, i32 0, i32 0), i8* getelementptr ([23 x i8]* @3, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [6 x i8] c"_Setw\00", section "llvm.metadata" ; <[6 x i8]*>:6 [#uses=1] -internal constant [5 x i8] c"_M_n\00", section "llvm.metadata" ; <[5 x i8]*>:7 [#uses=1] -@llvm.dbg.derivedtype1552 = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 232, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1553 = internal constant [1 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1552 to %0*)], section "llvm.metadata" ; <[1 x %0*]*> [#uses=1] -@llvm.dbg.composite1554 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @6, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 232, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([1 x %0*]* @llvm.dbg.array1553 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.array1555 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1554 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1556 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1555 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [5 x i8] c"setw\00", section "llvm.metadata" ; <[5 x i8]*>:8 [#uses=2] -internal constant [11 x i8] c"_ZSt4setwi\00", section "llvm.metadata" ; <[11 x i8]*>:9 [#uses=1] -@llvm.dbg.subprogram1559 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @8, i32 0, i32 0), i8* getelementptr ([5 x i8]* @8, i32 0, i32 0), i8* getelementptr ([11 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 242, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1556 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [4 x i8] c"__x\00", section "llvm.metadata" ; <[4 x i8]*>:10 [#uses=1] -@llvm.dbg.variable1563 = internal constant %llvm.dbg.variable.type { i32 459008, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*), i8* getelementptr ([4 x i8]* @10, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*), i32 244, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1554 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] - -define linkonce i32 @_ZSt4setwi(i32) nounwind { - %2 = alloca %22 ; <%22*> [#uses=2] - %3 = alloca %22 ; <%22*> [#uses=3] - %4 = alloca %22 ; <%22*> [#uses=2] - %5 = bitcast i32 0 to i32 ; [#uses=0] - call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*)) - %6 = bitcast %22* %3 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %6, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable1563 to %0*)) - call void @llvm.dbg.stoppoint(i32 245, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*)) - %7 = getelementptr %22* %3, i32 0, i32 0 ; [#uses=1] - store i32 %0, i32* %7, align 4 - call void @llvm.dbg.stoppoint(i32 246, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*)) - %8 = getelementptr %22* %4, i32 0, i32 0 ; [#uses=1] - %9 = getelementptr %22* %3, i32 0, i32 0 ; [#uses=1] - %10 = load i32* %9, align 4 ; [#uses=1] - store i32 %10, i32* %8, align 4 - %11 = getelementptr %22* %2, i32 0, i32 0 ; [#uses=1] - %12 = getelementptr %22* %4, i32 0, i32 0 ; [#uses=1] - %13 = load i32* %12, align 4 ; [#uses=1] - store i32 %13, i32* %11, align 4 - %14 = bitcast %22* %2 to i32* ; [#uses=1] - %15 = load i32* %14 ; [#uses=1] - call void @llvm.dbg.stoppoint(i32 246, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1548 to %0*)) - call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1559 to %0*)) - ret i32 %15 -} - -declare void @llvm.dbg.func.start(%0*) nounwind - -declare void @llvm.dbg.declare(%0*, %0*) nounwind - -declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind - -declare void @llvm.dbg.region.end(%0*) nounwind - diff --git a/test/DebugInfo/2009-03-03-store-to-load-forward.ll b/test/DebugInfo/2009-03-03-store-to-load-forward.ll deleted file mode 100644 index 75d3a6943393b..0000000000000 --- a/test/DebugInfo/2009-03-03-store-to-load-forward.ll +++ /dev/null @@ -1,260 +0,0 @@ -; RUN: opt < %s -instcombine -S | not grep alloca -; ModuleID = '' -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" -target triple = "i386-apple-darwin9.6" - type { } ; type %0 - type <{ i8 }> ; type %1 - type { i32* } ; type %2 - %llvm.dbg.anchor.type = type { i32, i32 } - %llvm.dbg.basictype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, i32 } - %llvm.dbg.compile_unit.type = type { i32, %0*, i32, i8*, i8*, i8*, i1, i1, i8*, i32 } - %llvm.dbg.composite.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0*, %0*, i32 } - %llvm.dbg.derivedtype.type = type { i32, %0*, i8*, %0*, i32, i64, i64, i64, i32, %0* } - %llvm.dbg.subprogram.type = type { i32, %0*, %0*, i8*, i8*, i8*, %0*, i32, %0*, i1, i1 } - %llvm.dbg.variable.type = type { i32, %0*, i8*, %0*, i32, %0* } -@llvm.dbg.compile_units = internal constant %llvm.dbg.anchor.type { i32 458752, i32 17 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -internal constant [11 x i8] c"bigfib.cpp\00", section "llvm.metadata" ; <[11 x i8]*>:0 [#uses=1] -internal constant [84 x i8] c"/Volumes/Nanpura/mainline/llvm/projects/llvm-test/SingleSource/Benchmarks/Misc-C++/\00", section "llvm.metadata" ; <[84 x i8]*>:1 [#uses=1] -internal constant [57 x i8] c"4.2.1 (Based on Apple Inc. build 5636) (LLVM build 2099)\00", section "llvm.metadata" ; <[57 x i8]*>:2 [#uses=1] -@llvm.dbg.compile_unit = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @0, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 true, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [18 x i8] c"long unsigned int\00", section "llvm.metadata" ; <[18 x i8]*>:3 [#uses=1] -@llvm.dbg.basictype = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @3, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 7 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] -internal constant [69 x i8] c"/Developer/usr/llvm-gcc-4.2/lib/gcc/i686-apple-darwin9/4.2.1/include\00", section "llvm.metadata" ; <[69 x i8]*>:4 [#uses=1] -@llvm.dbg.subprograms = internal constant %llvm.dbg.anchor.type { i32 458752, i32 46 }, section "llvm.metadata" ; <%llvm.dbg.anchor.type*> [#uses=1] -internal constant [12 x i8] c"unnamed_arg\00", section "llvm.metadata" ; <[12 x i8]*>:5 [#uses=1] -internal constant [28 x i8] c"/usr/include/c++/4.0.0/bits\00", section "llvm.metadata" ; <[28 x i8]*>:6 [#uses=1] -internal constant [4 x i8] c"int\00", section "llvm.metadata" ; <[4 x i8]*>:7 [#uses=1] -@llvm.dbg.basictype103 = internal constant %llvm.dbg.basictype.type { i32 458788, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([4 x i8]* @7, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, i32 5 }, section "llvm.metadata" ; <%llvm.dbg.basictype.type*> [#uses=1] -@llvm.dbg.derivedtype110 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"\00", section "llvm.metadata" ; <[11 x i8]*>:8 [#uses=1] -@llvm.dbg.compile_unit112 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @8, i32 0, i32 0), i8* getelementptr ([84 x i8]* @1, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [10 x i8] c"ptrdiff_t\00", section "llvm.metadata" ; <[10 x i8]*>:9 [#uses=1] -@llvm.dbg.derivedtype114 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit112 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype110 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [9 x i8] c"_types.h\00", section "llvm.metadata" ; <[9 x i8]*>:10 [#uses=1] -internal constant [18 x i8] c"/usr/include/i386\00", section "llvm.metadata" ; <[18 x i8]*>:11 [#uses=1] -@llvm.dbg.compile_unit117 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([18 x i8]* @11, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [10 x i8] c"__int32_t\00", section "llvm.metadata" ; <[10 x i8]*>:12 [#uses=1] -@llvm.dbg.derivedtype119 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @12, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 43, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype114 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_ct_rune_t\00", section "llvm.metadata" ; <[19 x i8]*>:13 [#uses=1] -@llvm.dbg.derivedtype121 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @13, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 50, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype119 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_ptrdiff_t\00", section "llvm.metadata" ; <[19 x i8]*>:14 [#uses=1] -@llvm.dbg.derivedtype123 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @14, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 81, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype121 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [17 x i8] c"__darwin_wchar_t\00", section "llvm.metadata" ; <[17 x i8]*>:15 [#uses=1] -@llvm.dbg.derivedtype125 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @15, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 96, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype123 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [16 x i8] c"__darwin_rune_t\00", section "llvm.metadata" ; <[16 x i8]*>:16 [#uses=1] -@llvm.dbg.derivedtype127 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @16, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 102, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype125 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [16 x i8] c"__darwin_wint_t\00", section "llvm.metadata" ; <[16 x i8]*>:17 [#uses=1] -@llvm.dbg.derivedtype129 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([16 x i8]* @17, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit117 to %0*), i32 107, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype127 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [17 x i8] c"/usr/include/sys\00", section "llvm.metadata" ; <[17 x i8]*>:18 [#uses=1] -@llvm.dbg.compile_unit131 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_blksize_t\00", section "llvm.metadata" ; <[19 x i8]*>:19 [#uses=1] -@llvm.dbg.derivedtype133 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @19, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 94, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype129 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"__darwin_dev_t\00", section "llvm.metadata" ; <[15 x i8]*>:20 [#uses=1] -@llvm.dbg.derivedtype135 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @20, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype133 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"__darwin_pid_t\00", section "llvm.metadata" ; <[15 x i8]*>:21 [#uses=1] -@llvm.dbg.derivedtype137 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([15 x i8]* @21, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 110, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype135 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [21 x i8] c"__darwin_suseconds_t\00", section "llvm.metadata" ; <[21 x i8]*>:22 [#uses=1] -@llvm.dbg.derivedtype139 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([21 x i8]* @22, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 131, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype137 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [17 x i8] c"__darwin_nl_item\00", section "llvm.metadata" ; <[17 x i8]*>:23 [#uses=1] -@llvm.dbg.derivedtype141 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([17 x i8]* @23, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit131 to %0*), i32 135, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype139 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [13 x i8] c"/usr/include\00", section "llvm.metadata" ; <[13 x i8]*>:24 [#uses=1] -@llvm.dbg.compile_unit143 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @10, i32 0, i32 0), i8* getelementptr ([13 x i8]* @24, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [19 x i8] c"__darwin_wctrans_t\00", section "llvm.metadata" ; <[19 x i8]*>:25 [#uses=1] -@llvm.dbg.derivedtype145 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([19 x i8]* @25, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit143 to %0*), i32 29, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype141 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [7 x i8] c"wait.h\00", section "llvm.metadata" ; <[7 x i8]*>:26 [#uses=1] -@llvm.dbg.compile_unit147 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([7 x i8]* @26, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [6 x i8] c"pid_t\00", section "llvm.metadata" ; <[6 x i8]*>:27 [#uses=1] -@llvm.dbg.derivedtype149 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @27, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 83, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype145 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [13 x i8] c"sig_atomic_t\00", section "llvm.metadata" ; <[13 x i8]*>:28 [#uses=1] -@llvm.dbg.derivedtype151 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @28, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype149 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [10 x i8] c"ct_rune_t\00", section "llvm.metadata" ; <[10 x i8]*>:29 [#uses=1] -@llvm.dbg.derivedtype153 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @29, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit147 to %0*), i32 262, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype151 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [9 x i8] c"stdlib.h\00", section "llvm.metadata" ; <[9 x i8]*>:30 [#uses=1] -@llvm.dbg.compile_unit155 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @30, i32 0, i32 0), i8* getelementptr ([13 x i8]* @24, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [7 x i8] c"rune_t\00", section "llvm.metadata" ; <[7 x i8]*>:31 [#uses=1] -@llvm.dbg.derivedtype157 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @31, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit155 to %0*), i32 81, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype153 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [8 x i8] c"types.h\00", section "llvm.metadata" ; <[8 x i8]*>:32 [#uses=1] -@llvm.dbg.compile_unit159 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([8 x i8]* @32, i32 0, i32 0), i8* getelementptr ([18 x i8]* @11, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [8 x i8] c"int32_t\00", section "llvm.metadata" ; <[8 x i8]*>:33 [#uses=1] -@llvm.dbg.derivedtype161 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([8 x i8]* @33, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 85, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype157 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"register_t\00", section "llvm.metadata" ; <[11 x i8]*>:34 [#uses=1] -@llvm.dbg.derivedtype163 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @34, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 95, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype161 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [6 x i8] c"dev_t\00", section "llvm.metadata" ; <[6 x i8]*>:35 [#uses=1] -@llvm.dbg.derivedtype165 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([6 x i8]* @35, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit159 to %0*), i32 125, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype163 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"_structs.h\00", section "llvm.metadata" ; <[11 x i8]*>:36 [#uses=1] -@llvm.dbg.compile_unit167 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @36, i32 0, i32 0), i8* getelementptr ([17 x i8]* @18, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [12 x i8] c"suseconds_t\00", section "llvm.metadata" ; <[12 x i8]*>:37 [#uses=1] -@llvm.dbg.derivedtype169 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @37, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit167 to %0*), i32 191, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype165 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"gthr-default.h\00", section "llvm.metadata" ; <[15 x i8]*>:38 [#uses=1] -internal constant [47 x i8] c"/usr/include/c++/4.0.0/i686-apple-darwin9/bits\00", section "llvm.metadata" ; <[47 x i8]*>:39 [#uses=1] -@llvm.dbg.compile_unit172 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @38, i32 0, i32 0), i8* getelementptr ([47 x i8]* @39, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [7 x i8] c"wint_t\00", section "llvm.metadata" ; <[7 x i8]*>:40 [#uses=1] -@llvm.dbg.derivedtype174 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([7 x i8]* @40, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit172 to %0*), i32 567, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype169 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [9 x i8] c"stdint.h\00", section "llvm.metadata" ; <[9 x i8]*>:41 [#uses=1] -@llvm.dbg.compile_unit176 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([9 x i8]* @41, i32 0, i32 0), i8* getelementptr ([69 x i8]* @4, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [14 x i8] c"int_least32_t\00", section "llvm.metadata" ; <[14 x i8]*>:42 [#uses=1] -@llvm.dbg.derivedtype178 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([14 x i8]* @42, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit176 to %0*), i32 60, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype174 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [13 x i8] c"int_fast32_t\00", section "llvm.metadata" ; <[13 x i8]*>:43 [#uses=1] -@llvm.dbg.derivedtype180 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([13 x i8]* @43, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit176 to %0*), i32 71, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype178 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"postypes.h\00", section "llvm.metadata" ; <[11 x i8]*>:44 [#uses=1] -@llvm.dbg.compile_unit182 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([11 x i8]* @44, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [11 x i8] c"streamsize\00", section "llvm.metadata" ; <[11 x i8]*>:45 [#uses=1] -@llvm.dbg.derivedtype184 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @45, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit182 to %0*), i32 72, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype180 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype230 = internal constant %llvm.dbg.derivedtype.type { i32 458774, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @9, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit112 to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype184 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [15 x i8] c"stl_iterator.h\00", section "llvm.metadata" ; <[15 x i8]*>:46 [#uses=1] -@llvm.dbg.compile_unit709 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([15 x i8]* @46, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [11 x i8] c"_M_current\00", section "llvm.metadata" ; <[11 x i8]*>:47 [#uses=1] -internal constant [18 x i8] c"__normal_iterator\00", section "llvm.metadata" ; <[18 x i8]*>:48 [#uses=1] -internal constant [10 x i8] c"operator*\00", section "llvm.metadata" ; <[10 x i8]*>:49 [#uses=1] -internal constant [11 x i8] c"operator->\00", section "llvm.metadata" ; <[11 x i8]*>:50 [#uses=1] -internal constant [11 x i8] c"operator++\00", section "llvm.metadata" ; <[11 x i8]*>:51 [#uses=1] -internal constant [11 x i8] c"operator--\00", section "llvm.metadata" ; <[11 x i8]*>:52 [#uses=1] -@llvm.dbg.derivedtype759 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype230 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [11 x i8] c"operator[]\00", section "llvm.metadata" ; <[11 x i8]*>:53 [#uses=1] -internal constant [11 x i8] c"operator+=\00", section "llvm.metadata" ; <[11 x i8]*>:54 [#uses=1] -internal constant [10 x i8] c"operator+\00", section "llvm.metadata" ; <[10 x i8]*>:55 [#uses=1] -internal constant [11 x i8] c"operator-=\00", section "llvm.metadata" ; <[11 x i8]*>:56 [#uses=1] -internal constant [10 x i8] c"operator-\00", section "llvm.metadata" ; <[10 x i8]*>:57 [#uses=1] -internal constant [5 x i8] c"base\00", section "llvm.metadata" ; <[5 x i8]*>:58 [#uses=1] -internal constant [18 x i8] c"cpp_type_traits.h\00", section "llvm.metadata" ; <[18 x i8]*>:59 [#uses=1] -@llvm.dbg.compile_unit1192 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([18 x i8]* @59, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -internal constant [12 x i8] c"__true_type\00", section "llvm.metadata" ; <[12 x i8]*>:60 [#uses=1] -@llvm.dbg.array1195 = internal constant [0 x %0*] zeroinitializer, section "llvm.metadata" ; <[0 x %0*]*> [#uses=1] -@llvm.dbg.composite1196 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([12 x i8]* @60, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit1192 to %0*), i32 93, i64 8, i64 8, i64 0, i32 0, %0* null, %0* bitcast ([0 x %0*]* @llvm.dbg.array1195 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.derivedtype1631 = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1633 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -internal constant [106 x i8] c"__normal_iterator > >\00", section "llvm.metadata" ; <[106 x i8]*>:61 [#uses=1] -@llvm.dbg.derivedtype1768 = internal constant %llvm.dbg.derivedtype.type { i32 458765, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @47, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 589, i64 32, i64 32, i64 0, i32 2, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1769 = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1770 = internal constant [2 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1771 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1770 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.subprogram1772 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 600, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1771 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.derivedtype1773 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1774 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1773 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1775 = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1774 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1776 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1775 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.subprogram1777 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 603, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1776 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.composite1778 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 587, i64 0, i64 0, i64 0, i32 4, %0* null, %0* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.derivedtype1779 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 8, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1778 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1780 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1779 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1781 = internal constant [3 x %0*] [%0* null, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1780 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1782 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1781 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -@llvm.dbg.subprogram1783 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* getelementptr ([18 x i8]* @48, i32 0, i32 0), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 608, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1782 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.derivedtype1784 = internal constant %llvm.dbg.derivedtype.type { i32 458790, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.derivedtype1785 = internal constant %llvm.dbg.derivedtype.type { i32 458767, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1784 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1786 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1633 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1787 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1786 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [59 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEdeEv\00", section "llvm.metadata" ; <[59 x i8]*>:62 [#uses=1] -@llvm.dbg.subprogram1789 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @49, i32 0, i32 0), i8* getelementptr ([10 x i8]* @49, i32 0, i32 0), i8* getelementptr ([59 x i8]* @62, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 613, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1787 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1790 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1631 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1791 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1790 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [59 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEptEv\00", section "llvm.metadata" ; <[59 x i8]*>:63 [#uses=1] -@llvm.dbg.subprogram1793 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @50, i32 0, i32 0), i8* getelementptr ([11 x i8]* @50, i32 0, i32 0), i8* getelementptr ([59 x i8]* @63, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 617, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1791 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.derivedtype1794 = internal constant %llvm.dbg.derivedtype.type { i32 458768, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 32, i64 32, i64 0, i32 0, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.derivedtype.type*> [#uses=1] -@llvm.dbg.array1795 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1794 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1796 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1795 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEppEv\00", section "llvm.metadata" ; <[58 x i8]*>:64 [#uses=1] -@llvm.dbg.subprogram1798 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([58 x i8]* @64, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 621, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1796 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1799 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.basictype.type* @llvm.dbg.basictype103 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1800 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1799 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEppEi\00", section "llvm.metadata" ; <[58 x i8]*>:65 [#uses=1] -@llvm.dbg.subprogram1802 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([11 x i8]* @51, i32 0, i32 0), i8* getelementptr ([58 x i8]* @65, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 628, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1800 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmmEv\00", section "llvm.metadata" ; <[58 x i8]*>:66 [#uses=1] -@llvm.dbg.subprogram1804 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([58 x i8]* @66, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 633, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1796 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [58 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmmEi\00", section "llvm.metadata" ; <[58 x i8]*>:67 [#uses=1] -@llvm.dbg.subprogram1806 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([11 x i8]* @52, i32 0, i32 0), i8* getelementptr ([58 x i8]* @67, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 640, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1800 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1807 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1633 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1808 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1807 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEixERKi\00", section "llvm.metadata" ; <[61 x i8]*>:68 [#uses=1] -@llvm.dbg.subprogram1810 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @53, i32 0, i32 0), i8* getelementptr ([11 x i8]* @53, i32 0, i32 0), i8* getelementptr ([61 x i8]* @68, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 645, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1808 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1811 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1794 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1769 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1812 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1811 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [60 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEpLERKi\00", section "llvm.metadata" ; <[60 x i8]*>:69 [#uses=1] -@llvm.dbg.subprogram1814 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @54, i32 0, i32 0), i8* getelementptr ([11 x i8]* @54, i32 0, i32 0), i8* getelementptr ([60 x i8]* @69, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 649, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1812 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1815 = internal constant [3 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype759 to %0*)], section "llvm.metadata" ; <[3 x %0*]*> [#uses=1] -@llvm.dbg.composite1816 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([3 x %0*]* @llvm.dbg.array1815 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEplERKi\00", section "llvm.metadata" ; <[61 x i8]*>:70 [#uses=1] -@llvm.dbg.subprogram1818 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @55, i32 0, i32 0), i8* getelementptr ([10 x i8]* @55, i32 0, i32 0), i8* getelementptr ([61 x i8]* @70, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 653, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1816 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [60 x i8] c"_ZN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmIERKi\00", section "llvm.metadata" ; <[60 x i8]*>:71 [#uses=1] -@llvm.dbg.subprogram1820 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([11 x i8]* @56, i32 0, i32 0), i8* getelementptr ([11 x i8]* @56, i32 0, i32 0), i8* getelementptr ([60 x i8]* @71, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 657, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1812 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -internal constant [61 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEmiERKi\00", section "llvm.metadata" ; <[61 x i8]*>:72 [#uses=1] -@llvm.dbg.subprogram1822 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([10 x i8]* @57, i32 0, i32 0), i8* getelementptr ([10 x i8]* @57, i32 0, i32 0), i8* getelementptr ([61 x i8]* @72, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 661, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1816 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1823 = internal constant [2 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1774 to %0*), %0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1785 to %0*)], section "llvm.metadata" ; <[2 x %0*]*> [#uses=1] -@llvm.dbg.composite1824 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([2 x %0*]* @llvm.dbg.array1823 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [62 x i8] c"_ZNK9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEE4baseEv\00", section "llvm.metadata" ; <[62 x i8]*>:73 [#uses=1] -@llvm.dbg.subprogram1826 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([5 x i8]* @58, i32 0, i32 0), i8* getelementptr ([5 x i8]* @58, i32 0, i32 0), i8* getelementptr ([62 x i8]* @73, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 665, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1824 to %0*), i1 false, i1 false }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.array1827 = internal constant [16 x %0*] [%0* bitcast (%llvm.dbg.derivedtype.type* @llvm.dbg.derivedtype1768 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1772 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1777 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1783 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1789 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1793 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1798 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1802 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1804 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1806 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1810 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1814 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1818 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1820 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1822 to %0*), %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram1826 to %0*)], section "llvm.metadata" ; <[16 x %0*]*> [#uses=1] -@llvm.dbg.composite1828 = internal constant %llvm.dbg.composite.type { i32 458771, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([106 x i8]* @61, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit709 to %0*), i32 587, i64 32, i64 32, i64 0, i32 0, %0* null, %0* bitcast ([16 x %0*]* @llvm.dbg.array1827 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [8 x i8] c"__first\00", section "llvm.metadata" ; <[8 x i8]*>:74 [#uses=1] -internal constant [7 x i8] c"__last\00", section "llvm.metadata" ; <[7 x i8]*>:75 [#uses=1] -internal constant [9 x i8] c"__result\00", section "llvm.metadata" ; <[9 x i8]*>:76 [#uses=1] -internal constant [20 x i8] c"stl_uninitialized.h\00", section "llvm.metadata" ; <[20 x i8]*>:77 [#uses=1] -@llvm.dbg.compile_unit2900 = internal constant %llvm.dbg.compile_unit.type { i32 458769, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.compile_units to %0*), i32 4, i8* getelementptr ([20 x i8]* @77, i32 0, i32 0), i8* getelementptr ([28 x i8]* @6, i32 0, i32 0), i8* getelementptr ([57 x i8]* @2, i32 0, i32 0), i1 false, i1 false, i8* null, i32 0 }, section "llvm.metadata" ; <%llvm.dbg.compile_unit.type*> [#uses=1] -@llvm.dbg.array4285 = internal constant [5 x %0*] [%0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*), %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1196 to %0*)], section "llvm.metadata" ; <[5 x %0*]*> [#uses=1] -@llvm.dbg.composite4286 = internal constant %llvm.dbg.composite.type { i32 458773, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* null, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i32 0, i64 0, i64 0, i64 0, i32 0, %0* null, %0* bitcast ([5 x %0*]* @llvm.dbg.array4285 to %0*), i32 0 }, section "llvm.metadata" ; <%llvm.dbg.composite.type*> [#uses=1] -internal constant [264 x i8] c"__uninitialized_copy_aux<__gnu_cxx::__normal_iterator > >, __gnu_cxx::__normal_iterator > > >\00", section "llvm.metadata" ; <[264 x i8]*>:78 [#uses=1] -internal constant [112 x i8] c"_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type\00", section "llvm.metadata" ; <[112 x i8]*>:79 [#uses=1] -@llvm.dbg.subprogram4289 = internal constant %llvm.dbg.subprogram.type { i32 458798, %0* bitcast (%llvm.dbg.anchor.type* @llvm.dbg.subprograms to %0*), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit to %0*), i8* getelementptr ([264 x i8]* @78, i32 0, i32 0), i8* getelementptr ([264 x i8]* @78, i32 0, i32 0), i8* getelementptr ([112 x i8]* @79, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite4286 to %0*), i1 false, i1 true }, section "llvm.metadata" ; <%llvm.dbg.subprogram.type*> [#uses=1] -@llvm.dbg.variable4290 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([8 x i8]* @74, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.dbg.variable4291 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([7 x i8]* @75, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.dbg.variable4292 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([9 x i8]* @76, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1828 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.dbg.variable4293 = internal constant %llvm.dbg.variable.type { i32 459009, %0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*), i8* getelementptr ([12 x i8]* @5, i32 0, i32 0), %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*), i32 73, %0* bitcast (%llvm.dbg.composite.type* @llvm.dbg.composite1196 to %0*) }, section "llvm.metadata" ; <%llvm.dbg.variable.type*> [#uses=1] -@llvm.used = appending global [1 x i8*] [i8* bitcast (i32* (i32*, i32*, i32*, %1*)* @_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0] - -define i32* @_ZSt24__uninitialized_copy_auxIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_11__true_type(i32*, i32*, i32*, %1* byval align 4) { - %5 = alloca %2 ; <%2*> [#uses=3] - %6 = alloca %2 ; <%2*> [#uses=3] - %7 = alloca %2 ; <%2*> [#uses=3] - %8 = alloca %2 ; <%2*> [#uses=2] - %9 = alloca %2 ; <%2*> [#uses=2] - %10 = alloca %2 ; <%2*> [#uses=2] - %11 = bitcast i32 0 to i32 ; [#uses=0] - call void @llvm.dbg.func.start(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*)) - %12 = bitcast %2* %5 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %12, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4290 to %0*)) - %13 = getelementptr %2* %5, i32 0, i32 0 ; [#uses=1] - store i32* %0, i32** %13 - %14 = bitcast %2* %6 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %14, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4291 to %0*)) - %15 = getelementptr %2* %6, i32 0, i32 0 ; [#uses=1] - store i32* %1, i32** %15 - %16 = bitcast %2* %7 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %16, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4292 to %0*)) - %17 = getelementptr %2* %7, i32 0, i32 0 ; [#uses=1] - store i32* %2, i32** %17 - %18 = bitcast %1* %3 to %0* ; <%0*> [#uses=1] - call void @llvm.dbg.declare(%0* %18, %0* bitcast (%llvm.dbg.variable.type* @llvm.dbg.variable4293 to %0*)) - call void @llvm.dbg.stoppoint(i32 74, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*)) - %19 = getelementptr %2* %5, i32 0, i32 0 ; [#uses=1] - %20 = load i32** %19 ; [#uses=1] - %21 = getelementptr %2* %6, i32 0, i32 0 ; [#uses=1] - %22 = load i32** %21 ; [#uses=1] - %23 = getelementptr %2* %7, i32 0, i32 0 ; [#uses=1] - %24 = load i32** %23 ; [#uses=1] - %25 = call i32* @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_(i32* %20, i32* %22, i32* %24) ; [#uses=1] - %26 = bitcast %2* %9 to i32** ; [#uses=1] - store i32* %25, i32** %26, align 4 - %27 = getelementptr %2* %10, i32 0, i32 0 ; [#uses=1] - %28 = getelementptr %2* %9, i32 0, i32 0 ; [#uses=1] - %29 = load i32** %28, align 4 ; [#uses=1] - store i32* %29, i32** %27, align 4 - %30 = getelementptr %2* %8, i32 0, i32 0 ; [#uses=1] - %31 = getelementptr %2* %10, i32 0, i32 0 ; [#uses=1] - %32 = load i32** %31, align 4 ; [#uses=1] - store i32* %32, i32** %30, align 4 - %33 = bitcast %2* %8 to i32** ; [#uses=1] - %34 = load i32** %33 ; [#uses=1] - call void @llvm.dbg.stoppoint(i32 74, i32 0, %0* bitcast (%llvm.dbg.compile_unit.type* @llvm.dbg.compile_unit2900 to %0*)) - call void @llvm.dbg.region.end(%0* bitcast (%llvm.dbg.subprogram.type* @llvm.dbg.subprogram4289 to %0*)) - ret i32* %34 -} - -declare void @llvm.dbg.func.start(%0*) nounwind - -declare void @llvm.dbg.declare(%0*, %0*) nounwind - -declare void @llvm.dbg.stoppoint(i32, i32, %0*) nounwind - -declare void @llvm.dbg.region.end(%0*) nounwind - -declare i32* @_ZSt4copyIN9__gnu_cxx17__normal_iteratorIPmSt6vectorImSaImEEEES6_ET0_T_S8_S7_(i32*, i32*, i32*) diff --git a/test/DebugInfo/2009-10-16-Scope.ll b/test/DebugInfo/2009-10-16-Scope.ll deleted file mode 100644 index 037294fc63a41..0000000000000 --- a/test/DebugInfo/2009-10-16-Scope.ll +++ /dev/null @@ -1,33 +0,0 @@ -; RUN: llc %s -O0 -o /dev/null -mtriple=x86_64-apple-darwin -; RUN: llc %s -O0 -o /dev/null -mtriple=arm-apple-darwin -; PR 5197 -; There is not any llvm instruction assocated with !5. The code generator -; should be able to handle this. - -define void @bar() nounwind ssp { -entry: - %count_ = alloca i32, align 4 ; [#uses=2] - br label %do.body, !dbg !0 - -do.body: ; preds = %entry - call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4) - %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; [#uses=1] - %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; [#uses=0] - br label %do.end, !dbg !0 - -do.end: ; preds = %do.body - ret void, !dbg !7 -} - -declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone - -declare i32 @foo(i32) ssp - -!0 = metadata !{i32 5, i32 2, metadata !1, null} -!1 = metadata !{i32 458763, metadata !2}; [DW_TAG_lexical_block ] -!2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"bar", metadata !"bar", metadata !"bar", metadata !3, i32 4, null, i1 false, i1 true}; [DW_TAG_subprogram ] -!3 = metadata !{i32 458769, i32 0, i32 12, metadata !"genmodes.i", metadata !"/Users/yash/Downloads", metadata !"clang 1.1", i1 true, i1 false, metadata !"", i32 0}; [DW_TAG_compile_unit ] -!4 = metadata !{i32 459008, metadata !5, metadata !"count_", metadata !3, i32 5, metadata !6}; [ DW_TAG_auto_variable ] -!5 = metadata !{i32 458763, metadata !1}; [DW_TAG_lexical_block ] -!6 = metadata !{i32 458788, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5}; [DW_TAG_base_type ] -!7 = metadata !{i32 6, i32 1, metadata !2, null} diff --git a/test/DebugInfo/2010-08-04-StackVariable.ll b/test/DebugInfo/2010-08-04-StackVariable.ll deleted file mode 100644 index c35c3d36d261d..0000000000000 --- a/test/DebugInfo/2010-08-04-StackVariable.ll +++ /dev/null @@ -1,125 +0,0 @@ -; RUN: llc -O0 -mtriple=arm-apple-darwin < %s | grep DW_OP_fbreg -; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_fbreg -; Use DW_OP_fbreg in variable's location expression if the variable is in a stack slot. - -%struct.SVal = type { i8*, i32 } - -define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp { -entry: - %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24 - call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24 - %0 = icmp ne i32 %i, 0, !dbg !27 ; [#uses=1] - br i1 %0, label %bb, label %bb1, !dbg !27 - -bb: ; preds = %entry - %1 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !29 ; [#uses=1] - %2 = load i32* %1, align 8, !dbg !29 ; [#uses=1] - %3 = add i32 %2, %i, !dbg !29 ; [#uses=1] - br label %bb2, !dbg !29 - -bb1: ; preds = %entry - %4 = getelementptr inbounds %struct.SVal* %location, i32 0, i32 1, !dbg !30 ; [#uses=1] - %5 = load i32* %4, align 8, !dbg !30 ; [#uses=1] - %6 = sub i32 %5, 1, !dbg !30 ; [#uses=1] - br label %bb2, !dbg !30 - -bb2: ; preds = %bb1, %bb - %.0 = phi i32 [ %3, %bb ], [ %6, %bb1 ] ; [#uses=1] - br label %return, !dbg !29 - -return: ; preds = %bb2 - ret i32 %.0, !dbg !29 -} - -define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { -entry: - %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34 - %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; [#uses=1] - store i8* null, i8** %0, align 8, !dbg !34 - %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; [#uses=1] - store i32 0, i32* %1, align 8, !dbg !34 - br label %return, !dbg !34 - -return: ; preds = %entry - ret void, !dbg !35 -} - -declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone - -define i32 @main() nounwind ssp { -entry: - %0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3] - %v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4] - %"alloca point" = bitcast i32 0 to i32 ; [#uses=0] - call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41 - call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41 - %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; [#uses=1] - store i32 1, i32* %1, align 8, !dbg !42 - %2 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 0, !dbg !43 ; [#uses=1] - %3 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 0, !dbg !43 ; [#uses=1] - %4 = load i8** %3, align 8, !dbg !43 ; [#uses=1] - store i8* %4, i8** %2, align 8, !dbg !43 - %5 = getelementptr inbounds %struct.SVal* %0, i32 0, i32 1, !dbg !43 ; [#uses=1] - %6 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !43 ; [#uses=1] - %7 = load i32* %6, align 8, !dbg !43 ; [#uses=1] - store i32 %7, i32* %5, align 8, !dbg !43 - %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; [#uses=0] - call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43 - br label %return, !dbg !45 - -return: ; preds = %entry - ret i32 0, !dbg !45 -} - -declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone - -!llvm.dbg.sp = !{!0, !9, !16, !17, !20} - -!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] -!1 = metadata !{i32 524307, metadata !2, metadata !"SVal", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_structure_type ] -!2 = metadata !{i32 524329, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !3} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 524305, i32 0, i32 4, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!4 = metadata !{metadata !5, metadata !7, metadata !0, metadata !9} -!5 = metadata !{i32 524301, metadata !1, metadata !"Data", metadata !2, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] -!6 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] -!7 = metadata !{i32 524301, metadata !1, metadata !"Kind", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !8} ; [ DW_TAG_member ] -!8 = metadata !{i32 524324, metadata !2, metadata !"unsigned int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!9 = metadata !{i32 524334, i32 0, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] -!10 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] -!11 = metadata !{null, metadata !12, metadata !13} -!12 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ] -!13 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, null} ; [ DW_TAG_subroutine_type ] -!15 = metadata !{null, metadata !12} -!16 = metadata !{i32 524334, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev} ; [ DW_TAG_subprogram ] -!17 = metadata !{i32 524334, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal} ; [ DW_TAG_subprogram ] -!18 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !19, i32 0, null} ; [ DW_TAG_subroutine_type ] -!19 = metadata !{metadata !13, metadata !13, metadata !1} -!20 = metadata !{i32 524334, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] -!21 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_subroutine_type ] -!22 = metadata !{metadata !13} -!23 = metadata !{i32 524545, metadata !17, metadata !"i", metadata !2, i32 16, metadata !13} ; [ DW_TAG_arg_variable ] -!24 = metadata !{i32 16, i32 0, metadata !17, null} -!25 = metadata !{i32 524545, metadata !17, metadata !"location", metadata !2, i32 16, metadata !26} ; [ DW_TAG_arg_variable ] -!26 = metadata !{i32 524304, metadata !2, metadata !"SVal", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_reference_type ] -!27 = metadata !{i32 17, i32 0, metadata !28, null} -!28 = metadata !{i32 524299, metadata !17, i32 16, i32 0, metadata !2, i32 2} ; [ DW_TAG_lexical_block ] -!29 = metadata !{i32 18, i32 0, metadata !28, null} -!30 = metadata !{i32 20, i32 0, metadata !28, null} -!31 = metadata !{i32 524545, metadata !16, metadata !"this", metadata !2, i32 11, metadata !32} ; [ DW_TAG_arg_variable ] -!32 = metadata !{i32 524326, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !33} ; [ DW_TAG_const_type ] -!33 = metadata !{i32 524303, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_pointer_type ] -!34 = metadata !{i32 11, i32 0, metadata !16, null} -!35 = metadata !{i32 11, i32 0, metadata !36, null} -!36 = metadata !{i32 524299, metadata !37, i32 11, i32 0, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] -!37 = metadata !{i32 524299, metadata !16, i32 11, i32 0, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] -!38 = metadata !{i32 524544, metadata !39, metadata !"v", metadata !2, i32 24, metadata !1} ; [ DW_TAG_auto_variable ] -!39 = metadata !{i32 524299, metadata !40, i32 23, i32 0, metadata !2, i32 4} ; [ DW_TAG_lexical_block ] -!40 = metadata !{i32 524299, metadata !20, i32 23, i32 0, metadata !2, i32 3} ; [ DW_TAG_lexical_block ] -!41 = metadata !{i32 24, i32 0, metadata !39, null} -!42 = metadata !{i32 25, i32 0, metadata !39, null} -!43 = metadata !{i32 26, i32 0, metadata !39, null} -!44 = metadata !{i32 524544, metadata !39, metadata !"k", metadata !2, i32 26, metadata !13} ; [ DW_TAG_auto_variable ] -!45 = metadata !{i32 27, i32 0, metadata !39, null} diff --git a/test/FrontendC/2011-02-21-DATA-common.c b/test/FrontendC/2011-02-21-DATA-common.c new file mode 100644 index 0000000000000..650ae7edddbdc --- /dev/null +++ b/test/FrontendC/2011-02-21-DATA-common.c @@ -0,0 +1,5 @@ +// RUN: %llvmgcc -S %s -o /dev/null +struct rtxc_snapshot { + int a, b, c, d; +}; +__attribute__ ((section("__DATA, __common"))) static struct rtxc_snapshot rtxc_log_A[4]; diff --git a/test/MC/ARM/bracket-darwin.s b/test/MC/ARM/bracket-darwin.s new file mode 100644 index 0000000000000..dc8b34857555e --- /dev/null +++ b/test/MC/ARM/bracket-darwin.s @@ -0,0 +1,5 @@ +// RUN: not llvm-mc -triple arm-apple-darwin %s 2> %t +// RUN: FileCheck -input-file %t %s + +// CHECK: error: brackets expression not supported on this target +.byte [4-3] diff --git a/test/MC/ARM/bracket-exprs.s b/test/MC/ARM/bracket-exprs.s new file mode 100644 index 0000000000000..922bf7037019e --- /dev/null +++ b/test/MC/ARM/bracket-exprs.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -triple arm-unknown-linux %s | FileCheck %s + +// CHECK: .byte 1 +.if [~0 >> 1] == -1 +.byte 1 +.else +.byte 2 +.endif + +// CHECK: .byte 3 +.if 4 * [4 + (3 + [2 * 2] + 1)] == 48 +.byte 3 +.else +.byte 4 +.endif diff --git a/test/MC/ARM/darwin-ARM-reloc.s b/test/MC/ARM/darwin-ARM-reloc.s new file mode 100644 index 0000000000000..86b45e07bf386 --- /dev/null +++ b/test/MC/ARM/darwin-ARM-reloc.s @@ -0,0 +1,171 @@ +@ RUN: llvm-mc -n -triple armv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + + .syntax unified + .text +_f0: + bl _printf + +_f1: + bl _f0 + + .data +_d0: +Ld0_0: + .long Lsc0_0 - Ld0_0 + + .section __TEXT,__cstring,cstring_literals +Lsc0_0: + .long 0 + +@ CHECK: ('cputype', 12) +@ CHECK: ('cpusubtype', 9) +@ CHECK: ('filetype', 1) +@ CHECK: ('num_load_commands', 3) +@ CHECK: ('load_commands_size', 364) +@ CHECK: ('flag', 0) +@ CHECK: ('load_commands', [ +@ CHECK: # Load Command 0 +@ CHECK: (('command', 1) +@ CHECK: ('size', 260) +@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('vm_addr', 0) +@ CHECK: ('vm_size', 16) +@ CHECK: ('file_offset', 392) +@ CHECK: ('file_size', 16) +@ CHECK: ('maxprot', 7) +@ CHECK: ('initprot', 7) +@ CHECK: ('num_sections', 3) +@ CHECK: ('flags', 0) +@ CHECK: ('sections', [ +@ CHECK: # Section 0 +@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 0) +@ CHECK: ('size', 8) +@ CHECK: ('offset', 392) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 408) +@ CHECK: ('num_reloc', 2) +@ CHECK: ('flags', 0x80000400) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0x4), +@ CHECK: ('word-1', 0x55000001)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0x0), +@ CHECK: ('word-1', 0x5d000003)), +@ CHECK: ]) +@ CHECK: ('_section_data', 'feffffeb fdffffeb') +@ CHECK: # Section 1 +@ CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 8) +@ CHECK: ('size', 4) +@ CHECK: ('offset', 400) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 424) +@ CHECK: ('num_reloc', 2) +@ CHECK: ('flags', 0x0) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0xa2000000), +@ CHECK: ('word-1', 0xc)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0xa1000000), +@ CHECK: ('word-1', 0x8)), +@ CHECK: ]) +@ CHECK: ('_section_data', '04000000') +@ CHECK: # Section 2 +@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 12) +@ CHECK: ('size', 4) +@ CHECK: ('offset', 404) +@ CHECK: ('alignment', 0) +@ CHECK: ('reloc_offset', 0) +@ CHECK: ('num_reloc', 0) +@ CHECK: ('flags', 0x2) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: ]) +@ CHECK: ('_section_data', '00000000') +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 1 +@ CHECK: (('command', 2) +@ CHECK: ('size', 24) +@ CHECK: ('symoff', 440) +@ CHECK: ('nsyms', 4) +@ CHECK: ('stroff', 488) +@ CHECK: ('strsize', 24) +@ CHECK: ('_string_data', '\x00_printf\x00_f0\x00_f1\x00_d0\x00\x00\x00\x00') +@ CHECK: ('_symbols', [ +@ CHECK: # Symbol 0 +@ CHECK: (('n_strx', 9) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_f0') +@ CHECK: ), +@ CHECK: # Symbol 1 +@ CHECK: (('n_strx', 13) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 4) +@ CHECK: ('_string', '_f1') +@ CHECK: ), +@ CHECK: # Symbol 2 +@ CHECK: (('n_strx', 17) +@ CHECK: ('n_type', 0xe) +@ CHECK: ('n_sect', 2) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 8) +@ CHECK: ('_string', '_d0') +@ CHECK: ), +@ CHECK: # Symbol 3 +@ CHECK: (('n_strx', 1) +@ CHECK: ('n_type', 0x1) +@ CHECK: ('n_sect', 0) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_printf') +@ CHECK: ), +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 2 +@ CHECK: (('command', 11) +@ CHECK: ('size', 80) +@ CHECK: ('ilocalsym', 0) +@ CHECK: ('nlocalsym', 3) +@ CHECK: ('iextdefsym', 3) +@ CHECK: ('nextdefsym', 0) +@ CHECK: ('iundefsym', 3) +@ CHECK: ('nundefsym', 1) +@ CHECK: ('tocoff', 0) +@ CHECK: ('ntoc', 0) +@ CHECK: ('modtaboff', 0) +@ CHECK: ('nmodtab', 0) +@ CHECK: ('extrefsymoff', 0) +@ CHECK: ('nextrefsyms', 0) +@ CHECK: ('indirectsymoff', 0) +@ CHECK: ('nindirectsyms', 0) +@ CHECK: ('extreloff', 0) +@ CHECK: ('nextrel', 0) +@ CHECK: ('locreloff', 0) +@ CHECK: ('nlocrel', 0) +@ CHECK: ('_indirect_symbols', [ +@ CHECK: ]) +@ CHECK: ), +@ CHECK: ]) diff --git a/test/MC/ARM/darwin-Thumb-reloc.s b/test/MC/ARM/darwin-Thumb-reloc.s new file mode 100644 index 0000000000000..567573d9ef197 --- /dev/null +++ b/test/MC/ARM/darwin-Thumb-reloc.s @@ -0,0 +1,139 @@ +@ RUN: llvm-mc -n -triple thumbv7-apple-darwin10 %s -filetype=obj -o %t.obj +@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump +@ RUN: FileCheck < %t.dump %s + + .syntax unified + .section __TEXT,__text,regular,pure_instructions + .globl _main + .align 2 + .code 16 + .thumb_func _main +_main: +LPC0_0: + blx _printf + .align 2 +LCPI0_0: + .long L_.str-(LPC0_0+4) + + .section __TEXT,__cstring,cstring_literals + .align 2 +L_.str: + .asciz "s0" + +.subsections_via_symbols + +@ CHECK: ('cputype', 12) +@ CHECK: ('cpusubtype', 9) +@ CHECK: ('filetype', 1) +@ CHECK: ('num_load_commands', 3) +@ CHECK: ('load_commands_size', 296) +@ CHECK: ('flag', 8192) +@ CHECK: ('load_commands', [ +@ CHECK: # Load Command 0 +@ CHECK: (('command', 1) +@ CHECK: ('size', 192) +@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('vm_addr', 0) +@ CHECK: ('vm_size', 11) +@ CHECK: ('file_offset', 324) +@ CHECK: ('file_size', 11) +@ CHECK: ('maxprot', 7) +@ CHECK: ('initprot', 7) +@ CHECK: ('num_sections', 2) +@ CHECK: ('flags', 0) +@ CHECK: ('sections', [ +@ CHECK: # Section 0 +@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 0) +@ CHECK: ('size', 8) +@ CHECK: ('offset', 324) +@ CHECK: ('alignment', 2) +@ CHECK: ('reloc_offset', 336) +@ CHECK: ('num_reloc', 3) +@ CHECK: ('flags', 0x80000400) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0xa2000004), +@ CHECK: ('word-1', 0x8)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0xa1000000), +@ CHECK: ('word-1', 0x0)), +@ CHECK: # Relocation 2 +@ CHECK: (('word-0', 0x0), +@ CHECK: ('word-1', 0x6d000001)), +@ CHECK: ]) +@ CHECK-FIXME: ('_section_data', 'fff7feef 04000000') +@ CHECK: # Section 1 +@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') +@ CHECK: ('address', 8) +@ CHECK: ('size', 3) +@ CHECK: ('offset', 332) +@ CHECK: ('alignment', 2) +@ CHECK: ('reloc_offset', 0) +@ CHECK: ('num_reloc', 0) +@ CHECK: ('flags', 0x2) +@ CHECK: ('reserved1', 0) +@ CHECK: ('reserved2', 0) +@ CHECK: ), +@ CHECK: ('_relocations', [ +@ CHECK: ]) +@ CHECK: ('_section_data', '733000') +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 1 +@ CHECK: (('command', 2) +@ CHECK: ('size', 24) +@ CHECK: ('symoff', 360) +@ CHECK: ('nsyms', 2) +@ CHECK: ('stroff', 384) +@ CHECK: ('strsize', 16) +@ CHECK: ('_string_data', '\x00_main\x00_printf\x00\x00') +@ CHECK: ('_symbols', [ +@ CHECK: # Symbol 0 +@ CHECK: (('n_strx', 1) +@ CHECK: ('n_type', 0xf) +@ CHECK: ('n_sect', 1) +@ CHECK: ('n_desc', 8) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_main') +@ CHECK: ), +@ CHECK: # Symbol 1 +@ CHECK: (('n_strx', 7) +@ CHECK: ('n_type', 0x1) +@ CHECK: ('n_sect', 0) +@ CHECK: ('n_desc', 0) +@ CHECK: ('n_value', 0) +@ CHECK: ('_string', '_printf') +@ CHECK: ), +@ CHECK: ]) +@ CHECK: ), +@ CHECK: # Load Command 2 +@ CHECK: (('command', 11) +@ CHECK: ('size', 80) +@ CHECK: ('ilocalsym', 0) +@ CHECK: ('nlocalsym', 0) +@ CHECK: ('iextdefsym', 0) +@ CHECK: ('nextdefsym', 1) +@ CHECK: ('iundefsym', 1) +@ CHECK: ('nundefsym', 1) +@ CHECK: ('tocoff', 0) +@ CHECK: ('ntoc', 0) +@ CHECK: ('modtaboff', 0) +@ CHECK: ('nmodtab', 0) +@ CHECK: ('extrefsymoff', 0) +@ CHECK: ('nextrefsyms', 0) +@ CHECK: ('indirectsymoff', 0) +@ CHECK: ('nindirectsyms', 0) +@ CHECK: ('extreloff', 0) +@ CHECK: ('nextrel', 0) +@ CHECK: ('locreloff', 0) +@ CHECK: ('nlocrel', 0) +@ CHECK: ('_indirect_symbols', [ +@ CHECK: ]) +@ CHECK: ), +@ CHECK: ]) diff --git a/test/MC/ARM/full_line_comment.s b/test/MC/ARM/full_line_comment.s new file mode 100644 index 0000000000000..4c91986348305 --- /dev/null +++ b/test/MC/ARM/full_line_comment.s @@ -0,0 +1,8 @@ +// RUN: llvm-mc -triple arm-apple-darwin10 %s | FileCheck %s +# this is a full line comment starting at column 1 + # this starting at column 2 + + .data +// CHECK: .long 0 +.long 0 +# .long 1 this line is commented out diff --git a/test/MC/AsmParser/exprs.s b/test/MC/AsmParser/exprs.s index 0861922b603ce..153701d6852ac 100644 --- a/test/MC/AsmParser/exprs.s +++ b/test/MC/AsmParser/exprs.s @@ -35,8 +35,6 @@ k: check_expr 1 << 1, 2 check_expr 2 >> 1, 1 check_expr (~0 >> 1), -1 - check_expr [~0 >> 1], -1 - check_expr 4 * [4 + (3 + [2 * 2] + 1)], 48 check_expr 3 - 2, 1 check_expr 1 ^ 3, 2 check_expr 1 && 2, 1 diff --git a/test/MC/AsmParser/full_line_comment.s b/test/MC/AsmParser/full_line_comment.s deleted file mode 100644 index 4c91986348305..0000000000000 --- a/test/MC/AsmParser/full_line_comment.s +++ /dev/null @@ -1,8 +0,0 @@ -// RUN: llvm-mc -triple arm-apple-darwin10 %s | FileCheck %s -# this is a full line comment starting at column 1 - # this starting at column 2 - - .data -// CHECK: .long 0 -.long 0 -# .long 1 this line is commented out diff --git a/test/MC/AsmParser/paren.s b/test/MC/AsmParser/paren.s deleted file mode 100644 index 702e309ddeeb3..0000000000000 --- a/test/MC/AsmParser/paren.s +++ /dev/null @@ -1,8 +0,0 @@ -// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t1 > %t2 -// RUN: FileCheck < %t1 %s - -// CHECK: error: expected ']' in brackets expression -.size x, [.-x) - -// CHECK: error: expected ')' in parentheses expression -.size y, (.-y] diff --git a/test/MC/Disassembler/X86/enhanced.txt b/test/MC/Disassembler/X86/enhanced.txt new file mode 100644 index 0000000000000..fc6949901b721 --- /dev/null +++ b/test/MC/Disassembler/X86/enhanced.txt @@ -0,0 +1,6 @@ +# RUN: llvm-mc --edis %s -triple=x86_64-apple-darwin9 |& FileCheck %s + +# CHECK: [o:jne][w: ][0-p:-][0-l:10=10]
0:[RIP/111](pc)=18446744073709551606 +0x0f 0x85 0xf6 0xff 0xff 0xff +# CHECK: [o:movq][w: ][1-r:%gs=r63][1-p::][1-l:8=8][p:,][w: ][0-r:%rcx=r108] 0:[RCX/108]=0 1:[GS/63]=8 +0x65 0x48 0x8b 0x0c 0x25 0x08 0x00 0x00 0x00 diff --git a/test/MC/ELF/bracket-exprs.s b/test/MC/ELF/bracket-exprs.s new file mode 100644 index 0000000000000..96f9f9aa450aa --- /dev/null +++ b/test/MC/ELF/bracket-exprs.s @@ -0,0 +1,15 @@ +// RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s + +// CHECK: .byte 1 +.if [~0 >> 1] == -1 +.byte 1 +.else +.byte 2 +.endif + +// CHECK: .byte 3 +.if 4 * [4 + (3 + [2 * 2] + 1)] == 48 +.byte 3 +.else +.byte 4 +.endif diff --git a/test/MC/ELF/bracket.s b/test/MC/ELF/bracket.s new file mode 100644 index 0000000000000..702e309ddeeb3 --- /dev/null +++ b/test/MC/ELF/bracket.s @@ -0,0 +1,8 @@ +// RUN: not llvm-mc -triple i386-unknown-unknown %s 2> %t1 > %t2 +// RUN: FileCheck < %t1 %s + +// CHECK: error: expected ']' in brackets expression +.size x, [.-x) + +// CHECK: error: expected ')' in parentheses expression +.size y, (.-y] diff --git a/test/MC/ELF/org.s b/test/MC/ELF/org.s new file mode 100644 index 0000000000000..c073fa5d808e2 --- /dev/null +++ b/test/MC/ELF/org.s @@ -0,0 +1,13 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + + .zero 4 +foo: + .zero 4 + .org foo+16 + +// CHECK: (('sh_name', 0x00000001) # '.text' +// CHECK-NEXT: ('sh_type', +// CHECK-NEXT: ('sh_flags', +// CHECK-NEXT: ('sh_addr', +// CHECK-NEXT: ('sh_offset' +// CHECK-NEXT: ('sh_size', 0x00000014) diff --git a/test/MC/ELF/pr9292.s b/test/MC/ELF/pr9292.s new file mode 100644 index 0000000000000..a198fed87949d --- /dev/null +++ b/test/MC/ELF/pr9292.s @@ -0,0 +1,26 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s + +// Test that both foo and bar are undefined. + +.globl foo +.globl bar +mov %eax,bar + + +// CHECK: (('st_name', 0x00000005) # 'bar' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Symbol 0x00000005 +// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' +// CHECK-NEXT: ('st_bind', 0x00000001) +// CHECK-NEXT: ('st_type', 0x00000000) +// CHECK-NEXT: ('st_other', 0x00000000) +// CHECK-NEXT: ('st_shndx', 0x00000000) +// CHECK-NEXT: ('st_value', 0x0000000000000000) +// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK-NEXT: ), diff --git a/test/MC/ELF/relocation-pc.s b/test/MC/ELF/relocation-pc.s new file mode 100644 index 0000000000000..58c5f410b5174 --- /dev/null +++ b/test/MC/ELF/relocation-pc.s @@ -0,0 +1,33 @@ +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s + +// Test that we produce the correct relocation. + + loope 0 # R_X86_64_PC8 + jmp -256 # R_X86_64_PC32 + +// CHECK: # Section 0x00000007 +// CHECK-NEXT: (('sh_name', 0x0000002c) # '.rela.text' +// CHECK-NEXT: ('sh_type', 0x00000004) +// CHECK-NEXT: ('sh_flags', 0x00000000) +// CHECK-NEXT: ('sh_addr', 0x00000000) +// CHECK-NEXT: ('sh_offset', 0x000000e8) +// CHECK-NEXT: ('sh_size', 0x00000030) +// CHECK-NEXT: ('sh_link', 0x00000005) +// CHECK-NEXT: ('sh_info', 0x00000001) +// CHECK-NEXT: ('sh_addralign', 0x00000008) +// CHECK-NEXT: ('sh_entsize', 0x00000018) +// CHECK-NEXT: ('_relocations', [ +// CHECK-NEXT: # Relocation 0x00000000 +// CHECK-NEXT: (('r_offset', 0x00000001) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x0000000f) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: # Relocation 0x00000001 +// CHECK-NEXT: (('r_offset', 0x00000003) +// CHECK-NEXT: ('r_sym', 0x00000000) +// CHECK-NEXT: ('r_type', 0x00000002) +// CHECK-NEXT: ('r_addend', 0x00000000) +// CHECK-NEXT: ), +// CHECK-NEXT: ]) +// CHECK-NEXT: ), diff --git a/test/MC/MachO/darwin-ARM-reloc.s b/test/MC/MachO/darwin-ARM-reloc.s deleted file mode 100644 index 86b45e07bf386..0000000000000 --- a/test/MC/MachO/darwin-ARM-reloc.s +++ /dev/null @@ -1,171 +0,0 @@ -@ RUN: llvm-mc -n -triple armv7-apple-darwin10 %s -filetype=obj -o %t.obj -@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump -@ RUN: FileCheck < %t.dump %s - - .syntax unified - .text -_f0: - bl _printf - -_f1: - bl _f0 - - .data -_d0: -Ld0_0: - .long Lsc0_0 - Ld0_0 - - .section __TEXT,__cstring,cstring_literals -Lsc0_0: - .long 0 - -@ CHECK: ('cputype', 12) -@ CHECK: ('cpusubtype', 9) -@ CHECK: ('filetype', 1) -@ CHECK: ('num_load_commands', 3) -@ CHECK: ('load_commands_size', 364) -@ CHECK: ('flag', 0) -@ CHECK: ('load_commands', [ -@ CHECK: # Load Command 0 -@ CHECK: (('command', 1) -@ CHECK: ('size', 260) -@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('vm_addr', 0) -@ CHECK: ('vm_size', 16) -@ CHECK: ('file_offset', 392) -@ CHECK: ('file_size', 16) -@ CHECK: ('maxprot', 7) -@ CHECK: ('initprot', 7) -@ CHECK: ('num_sections', 3) -@ CHECK: ('flags', 0) -@ CHECK: ('sections', [ -@ CHECK: # Section 0 -@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('address', 0) -@ CHECK: ('size', 8) -@ CHECK: ('offset', 392) -@ CHECK: ('alignment', 0) -@ CHECK: ('reloc_offset', 408) -@ CHECK: ('num_reloc', 2) -@ CHECK: ('flags', 0x80000400) -@ CHECK: ('reserved1', 0) -@ CHECK: ('reserved2', 0) -@ CHECK: ), -@ CHECK: ('_relocations', [ -@ CHECK: # Relocation 0 -@ CHECK: (('word-0', 0x4), -@ CHECK: ('word-1', 0x55000001)), -@ CHECK: # Relocation 1 -@ CHECK: (('word-0', 0x0), -@ CHECK: ('word-1', 0x5d000003)), -@ CHECK: ]) -@ CHECK: ('_section_data', 'feffffeb fdffffeb') -@ CHECK: # Section 1 -@ CHECK: (('section_name', '__data\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('segment_name', '__DATA\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('address', 8) -@ CHECK: ('size', 4) -@ CHECK: ('offset', 400) -@ CHECK: ('alignment', 0) -@ CHECK: ('reloc_offset', 424) -@ CHECK: ('num_reloc', 2) -@ CHECK: ('flags', 0x0) -@ CHECK: ('reserved1', 0) -@ CHECK: ('reserved2', 0) -@ CHECK: ), -@ CHECK: ('_relocations', [ -@ CHECK: # Relocation 0 -@ CHECK: (('word-0', 0xa2000000), -@ CHECK: ('word-1', 0xc)), -@ CHECK: # Relocation 1 -@ CHECK: (('word-0', 0xa1000000), -@ CHECK: ('word-1', 0x8)), -@ CHECK: ]) -@ CHECK: ('_section_data', '04000000') -@ CHECK: # Section 2 -@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('address', 12) -@ CHECK: ('size', 4) -@ CHECK: ('offset', 404) -@ CHECK: ('alignment', 0) -@ CHECK: ('reloc_offset', 0) -@ CHECK: ('num_reloc', 0) -@ CHECK: ('flags', 0x2) -@ CHECK: ('reserved1', 0) -@ CHECK: ('reserved2', 0) -@ CHECK: ), -@ CHECK: ('_relocations', [ -@ CHECK: ]) -@ CHECK: ('_section_data', '00000000') -@ CHECK: ]) -@ CHECK: ), -@ CHECK: # Load Command 1 -@ CHECK: (('command', 2) -@ CHECK: ('size', 24) -@ CHECK: ('symoff', 440) -@ CHECK: ('nsyms', 4) -@ CHECK: ('stroff', 488) -@ CHECK: ('strsize', 24) -@ CHECK: ('_string_data', '\x00_printf\x00_f0\x00_f1\x00_d0\x00\x00\x00\x00') -@ CHECK: ('_symbols', [ -@ CHECK: # Symbol 0 -@ CHECK: (('n_strx', 9) -@ CHECK: ('n_type', 0xe) -@ CHECK: ('n_sect', 1) -@ CHECK: ('n_desc', 0) -@ CHECK: ('n_value', 0) -@ CHECK: ('_string', '_f0') -@ CHECK: ), -@ CHECK: # Symbol 1 -@ CHECK: (('n_strx', 13) -@ CHECK: ('n_type', 0xe) -@ CHECK: ('n_sect', 1) -@ CHECK: ('n_desc', 0) -@ CHECK: ('n_value', 4) -@ CHECK: ('_string', '_f1') -@ CHECK: ), -@ CHECK: # Symbol 2 -@ CHECK: (('n_strx', 17) -@ CHECK: ('n_type', 0xe) -@ CHECK: ('n_sect', 2) -@ CHECK: ('n_desc', 0) -@ CHECK: ('n_value', 8) -@ CHECK: ('_string', '_d0') -@ CHECK: ), -@ CHECK: # Symbol 3 -@ CHECK: (('n_strx', 1) -@ CHECK: ('n_type', 0x1) -@ CHECK: ('n_sect', 0) -@ CHECK: ('n_desc', 0) -@ CHECK: ('n_value', 0) -@ CHECK: ('_string', '_printf') -@ CHECK: ), -@ CHECK: ]) -@ CHECK: ), -@ CHECK: # Load Command 2 -@ CHECK: (('command', 11) -@ CHECK: ('size', 80) -@ CHECK: ('ilocalsym', 0) -@ CHECK: ('nlocalsym', 3) -@ CHECK: ('iextdefsym', 3) -@ CHECK: ('nextdefsym', 0) -@ CHECK: ('iundefsym', 3) -@ CHECK: ('nundefsym', 1) -@ CHECK: ('tocoff', 0) -@ CHECK: ('ntoc', 0) -@ CHECK: ('modtaboff', 0) -@ CHECK: ('nmodtab', 0) -@ CHECK: ('extrefsymoff', 0) -@ CHECK: ('nextrefsyms', 0) -@ CHECK: ('indirectsymoff', 0) -@ CHECK: ('nindirectsyms', 0) -@ CHECK: ('extreloff', 0) -@ CHECK: ('nextrel', 0) -@ CHECK: ('locreloff', 0) -@ CHECK: ('nlocrel', 0) -@ CHECK: ('_indirect_symbols', [ -@ CHECK: ]) -@ CHECK: ), -@ CHECK: ]) diff --git a/test/MC/MachO/darwin-Thumb-reloc.s b/test/MC/MachO/darwin-Thumb-reloc.s deleted file mode 100644 index 567573d9ef197..0000000000000 --- a/test/MC/MachO/darwin-Thumb-reloc.s +++ /dev/null @@ -1,139 +0,0 @@ -@ RUN: llvm-mc -n -triple thumbv7-apple-darwin10 %s -filetype=obj -o %t.obj -@ RUN: macho-dump --dump-section-data < %t.obj > %t.dump -@ RUN: FileCheck < %t.dump %s - - .syntax unified - .section __TEXT,__text,regular,pure_instructions - .globl _main - .align 2 - .code 16 - .thumb_func _main -_main: -LPC0_0: - blx _printf - .align 2 -LCPI0_0: - .long L_.str-(LPC0_0+4) - - .section __TEXT,__cstring,cstring_literals - .align 2 -L_.str: - .asciz "s0" - -.subsections_via_symbols - -@ CHECK: ('cputype', 12) -@ CHECK: ('cpusubtype', 9) -@ CHECK: ('filetype', 1) -@ CHECK: ('num_load_commands', 3) -@ CHECK: ('load_commands_size', 296) -@ CHECK: ('flag', 8192) -@ CHECK: ('load_commands', [ -@ CHECK: # Load Command 0 -@ CHECK: (('command', 1) -@ CHECK: ('size', 192) -@ CHECK: ('segment_name', '\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('vm_addr', 0) -@ CHECK: ('vm_size', 11) -@ CHECK: ('file_offset', 324) -@ CHECK: ('file_size', 11) -@ CHECK: ('maxprot', 7) -@ CHECK: ('initprot', 7) -@ CHECK: ('num_sections', 2) -@ CHECK: ('flags', 0) -@ CHECK: ('sections', [ -@ CHECK: # Section 0 -@ CHECK: (('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('address', 0) -@ CHECK: ('size', 8) -@ CHECK: ('offset', 324) -@ CHECK: ('alignment', 2) -@ CHECK: ('reloc_offset', 336) -@ CHECK: ('num_reloc', 3) -@ CHECK: ('flags', 0x80000400) -@ CHECK: ('reserved1', 0) -@ CHECK: ('reserved2', 0) -@ CHECK: ), -@ CHECK: ('_relocations', [ -@ CHECK: # Relocation 0 -@ CHECK: (('word-0', 0xa2000004), -@ CHECK: ('word-1', 0x8)), -@ CHECK: # Relocation 1 -@ CHECK: (('word-0', 0xa1000000), -@ CHECK: ('word-1', 0x0)), -@ CHECK: # Relocation 2 -@ CHECK: (('word-0', 0x0), -@ CHECK: ('word-1', 0x6d000001)), -@ CHECK: ]) -@ CHECK-FIXME: ('_section_data', 'fff7feef 04000000') -@ CHECK: # Section 1 -@ CHECK: (('section_name', '__cstring\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('segment_name', '__TEXT\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') -@ CHECK: ('address', 8) -@ CHECK: ('size', 3) -@ CHECK: ('offset', 332) -@ CHECK: ('alignment', 2) -@ CHECK: ('reloc_offset', 0) -@ CHECK: ('num_reloc', 0) -@ CHECK: ('flags', 0x2) -@ CHECK: ('reserved1', 0) -@ CHECK: ('reserved2', 0) -@ CHECK: ), -@ CHECK: ('_relocations', [ -@ CHECK: ]) -@ CHECK: ('_section_data', '733000') -@ CHECK: ]) -@ CHECK: ), -@ CHECK: # Load Command 1 -@ CHECK: (('command', 2) -@ CHECK: ('size', 24) -@ CHECK: ('symoff', 360) -@ CHECK: ('nsyms', 2) -@ CHECK: ('stroff', 384) -@ CHECK: ('strsize', 16) -@ CHECK: ('_string_data', '\x00_main\x00_printf\x00\x00') -@ CHECK: ('_symbols', [ -@ CHECK: # Symbol 0 -@ CHECK: (('n_strx', 1) -@ CHECK: ('n_type', 0xf) -@ CHECK: ('n_sect', 1) -@ CHECK: ('n_desc', 8) -@ CHECK: ('n_value', 0) -@ CHECK: ('_string', '_main') -@ CHECK: ), -@ CHECK: # Symbol 1 -@ CHECK: (('n_strx', 7) -@ CHECK: ('n_type', 0x1) -@ CHECK: ('n_sect', 0) -@ CHECK: ('n_desc', 0) -@ CHECK: ('n_value', 0) -@ CHECK: ('_string', '_printf') -@ CHECK: ), -@ CHECK: ]) -@ CHECK: ), -@ CHECK: # Load Command 2 -@ CHECK: (('command', 11) -@ CHECK: ('size', 80) -@ CHECK: ('ilocalsym', 0) -@ CHECK: ('nlocalsym', 0) -@ CHECK: ('iextdefsym', 0) -@ CHECK: ('nextdefsym', 1) -@ CHECK: ('iundefsym', 1) -@ CHECK: ('nundefsym', 1) -@ CHECK: ('tocoff', 0) -@ CHECK: ('ntoc', 0) -@ CHECK: ('modtaboff', 0) -@ CHECK: ('nmodtab', 0) -@ CHECK: ('extrefsymoff', 0) -@ CHECK: ('nextrefsyms', 0) -@ CHECK: ('indirectsymoff', 0) -@ CHECK: ('nindirectsyms', 0) -@ CHECK: ('extreloff', 0) -@ CHECK: ('nextrel', 0) -@ CHECK: ('locreloff', 0) -@ CHECK: ('nlocrel', 0) -@ CHECK: ('_indirect_symbols', [ -@ CHECK: ]) -@ CHECK: ), -@ CHECK: ]) diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s index de6b96389eadd..723983da6de6a 100644 --- a/test/MC/X86/x86-32.s +++ b/test/MC/X86/x86-32.s @@ -808,3 +808,11 @@ pshufw $90, %mm4, %mm0 // CHECK: ud2b // CHECK: encoding: [0x0f,0xb9] ud2b + +// CHECK: loope 0 +// CHECK: encoding: [0xe1,A] + loopz 0 + +// CHECK: loopne 0 +// CHECK: encoding: [0xe0,A] + loopnz 0 diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index c8b6414d59a6c..ee9757fa31762 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -241,13 +241,32 @@ inl %dx // PR8114 // CHECK: outb %al, %dx +// CHECK: outb %al, %dx +// CHECK: outw %ax, %dx // CHECK: outw %ax, %dx // CHECK: outl %eax, %dx +// CHECK: outl %eax, %dx -out %al, (%dx) -out %ax, (%dx) -outl %eax, (%dx) +out %al, (%dx) +outb %al, (%dx) +out %ax, (%dx) +outw %ax, (%dx) +out %eax, (%dx) +outl %eax, (%dx) +// CHECK: inb %dx, %al +// CHECK: inb %dx, %al +// CHECK: inw %dx, %ax +// CHECK: inw %dx, %ax +// CHECK: inl %dx, %eax +// CHECK: inl %dx, %eax + +in (%dx), %al +inb (%dx), %al +in (%dx), %ax +inw (%dx), %ax +in (%dx), %eax +inl (%dx), %eax // rdar://8431422 @@ -942,3 +961,15 @@ movq 18446744073709551615,%rbx // CHECK: movq -1, %rbx // PR8946 movdqu %xmm0, %xmm1 // CHECK: movdqu %xmm0, %xmm1 # encoding: [0xf3,0x0f,0x6f,0xc8] + +// PR8935 +xgetbv // CHECK: xgetbv # encoding: [0x0f,0x01,0xd0] +xsetbv // CHECK: xsetbv # encoding: [0x0f,0x01,0xd1] + +// CHECK: loope 0 +// CHECK: encoding: [0xe1,A] + loopz 0 + +// CHECK: loopne 0 +// CHECK: encoding: [0xe0,A] + loopnz 0 diff --git a/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll b/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll deleted file mode 100644 index fdb8fd9363c66..0000000000000 --- a/test/Transforms/InstCombine/2003-11-13-ConstExprCastCall.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: opt < %s -instcombine -S | FileCheck %s -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128" - -declare void @free(i8*) - -define void @test(i32* %X) { - call void (...)* bitcast (void (i8*)* @free to void (...)*)( i32* %X ) ; :1 [#uses=0] -; CHECK: %tmp = bitcast i32* %X to i8* -; CHECK: call void @free(i8* %tmp) - ret void -; CHECK: ret void -} diff --git a/test/Transforms/InstCombine/call.ll b/test/Transforms/InstCombine/call.ll index c256724a08ee3..2ef8dc0670f02 100644 --- a/test/Transforms/InstCombine/call.ll +++ b/test/Transforms/InstCombine/call.ll @@ -32,7 +32,7 @@ define i32 @test2(i32 %A) { ; Resolving this should insert a cast from sbyte to int, following the C ; promotion rules. -declare void @test3a(i8, ...) +define void @test3a(i8, ...) {unreachable } define void @test3(i8 %A, i8 %B) { call void bitcast (void (i8, ...)* @test3a to void (i8, i8)*)( i8 %A, i8 %B @@ -116,3 +116,17 @@ try.handler: ; preds = %entry ; CHECK: @test8() { ; CHECK-NEXT: invoke void @test8a() + + +; Don't turn this into a direct call, because test9x is just a prototype and +; doing so will make it varargs. +; rdar://9038601 +declare i8* @test9x(i8*, i8*, ...) noredzone +define i8* @test9(i8* %arg, i8* %tmp3) nounwind ssp noredzone { +entry: + %call = call i8* bitcast (i8* (i8*, i8*, ...)* @test9x to i8* (i8*, i8*)*)(i8* %arg, i8* %tmp3) noredzone + ret i8* %call +; CHECK: @test9( +; CHECK: call i8* bitcast +} + diff --git a/test/Transforms/InstCombine/or-xor.ll b/test/Transforms/InstCombine/or-xor.ll new file mode 100644 index 0000000000000..f496dd48c4026 --- /dev/null +++ b/test/Transforms/InstCombine/or-xor.ll @@ -0,0 +1,94 @@ +; RUN: opt -S -instcombine < %s | FileCheck %s + +define i32 @test1(i32 %x, i32 %y) nounwind { + %or = or i32 %x, %y + %not = xor i32 %or, -1 + %z = or i32 %x, %not + ret i32 %z +; CHECK: @test1 +; CHECK-NEXT: %y.not = xor i32 %y, -1 +; CHECK-NEXT: %z = or i32 %y.not, %x +; CHECK-NEXT: ret i32 %z +} + +define i32 @test2(i32 %x, i32 %y) nounwind { + %or = or i32 %x, %y + %not = xor i32 %or, -1 + %z = or i32 %y, %not + ret i32 %z +; CHECK: @test2 +; CHECK-NEXT: %x.not = xor i32 %x, -1 +; CHECK-NEXT: %z = or i32 %x.not, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test3(i32 %x, i32 %y) nounwind { + %xor = xor i32 %x, %y + %not = xor i32 %xor, -1 + %z = or i32 %x, %not + ret i32 %z +; CHECK: @test3 +; CHECK-NEXT: %y.not = xor i32 %y, -1 +; CHECK-NEXT: %z = or i32 %y.not, %x +; CHECK-NEXT: ret i32 %z +} + +define i32 @test4(i32 %x, i32 %y) nounwind { + %xor = xor i32 %x, %y + %not = xor i32 %xor, -1 + %z = or i32 %y, %not + ret i32 %z +; CHECK: @test4 +; CHECK-NEXT: %x.not = xor i32 %x, -1 +; CHECK-NEXT: %z = or i32 %x.not, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test5(i32 %x, i32 %y) nounwind { + %and = and i32 %x, %y + %not = xor i32 %and, -1 + %z = or i32 %x, %not + ret i32 %z +; CHECK: @test5 +; CHECK-NEXT: ret i32 -1 +} + +define i32 @test6(i32 %x, i32 %y) nounwind { + %and = and i32 %x, %y + %not = xor i32 %and, -1 + %z = or i32 %y, %not + ret i32 %z +; CHECK: @test6 +; CHECK-NEXT: ret i32 -1 +} + +define i32 @test7(i32 %x, i32 %y) nounwind { + %xor = xor i32 %x, %y + %z = or i32 %y, %xor + ret i32 %z +; CHECK: @test7 +; CHECK-NEXT: %z = or i32 %x, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test8(i32 %x, i32 %y) nounwind { + %not = xor i32 %y, -1 + %xor = xor i32 %x, %not + %z = or i32 %y, %xor + ret i32 %z +; CHECK: @test8 +; CHECK-NEXT: %x.not = xor i32 %x, -1 +; CHECK-NEXT: %z = or i32 %x.not, %y +; CHECK-NEXT: ret i32 %z +} + +define i32 @test9(i32 %x, i32 %y) nounwind { + %not = xor i32 %x, -1 + %xor = xor i32 %not, %y + %z = or i32 %x, %xor + ret i32 %z +; CHECK: @test9 +; CHECK-NEXT: %y.not = xor i32 %y, -1 +; CHECK-NEXT: %z = or i32 %y.not, %x +; CHECK-NEXT: ret i32 %z +} diff --git a/test/Transforms/LoopDeletion/multiple-exits.ll b/test/Transforms/LoopDeletion/multiple-exits.ll new file mode 100644 index 0000000000000..6af413b49cd99 --- /dev/null +++ b/test/Transforms/LoopDeletion/multiple-exits.ll @@ -0,0 +1,26 @@ +; RUN: opt < %s -loop-deletion -S | FileCheck %s + +; Checks whether dead loops with multiple exits can be eliminated + +; CHECK: entry: +; CHECK-NEXT: br label %return + +; CHECK: return: +; CHECK-NEXT: ret void + +define void @foo(i64 %n, i64 %m) nounwind { +entry: + br label %bb + +bb: + %x.0 = phi i64 [ 0, %entry ], [ %t0, %bb2 ] + %t0 = add i64 %x.0, 1 + %t1 = icmp slt i64 %x.0, %n + br i1 %t1, label %bb2, label %return +bb2: + %t2 = icmp slt i64 %x.0, %m + br i1 %t1, label %bb, label %return + +return: + ret void +} diff --git a/test/Transforms/SimplifyCFG/select-gep.ll b/test/Transforms/SimplifyCFG/select-gep.ll new file mode 100644 index 0000000000000..009f05e5574cf --- /dev/null +++ b/test/Transforms/SimplifyCFG/select-gep.ll @@ -0,0 +1,40 @@ +; RUN: opt -S -simplifycfg %s | FileCheck %s + +define i8* @test1(i8* %x, i64 %y) nounwind { +entry: + %tmp1 = load i8* %x, align 1 + %cmp = icmp eq i8 %tmp1, 47 + br i1 %cmp, label %if.then, label %if.end + +if.then: + %incdec.ptr = getelementptr inbounds i8* %x, i64 %y + br label %if.end + +if.end: + %x.addr = phi i8* [ %incdec.ptr, %if.then ], [ %x, %entry ] + ret i8* %x.addr + +; CHECK: @test1 +; CHECK-NOT: select +; CHECK: ret i8* %x.addr +} + +%ST = type { i8, i8 } + +define i8* @test2(%ST* %x, i8* %y) nounwind { +entry: + %cmp = icmp eq %ST* %x, null + br i1 %cmp, label %if.then, label %if.end + +if.then: + %incdec.ptr = getelementptr %ST* %x, i32 0, i32 1 + br label %if.end + +if.end: + %x.addr = phi i8* [ %incdec.ptr, %if.then ], [ %y, %entry ] + ret i8* %x.addr + +; CHECK: @test2 +; CHECK: %x.addr = select i1 %cmp, i8* %incdec.ptr, i8* %y +; CHECK: ret i8* %x.addr +} diff --git a/test/lit.cfg b/test/lit.cfg index 21b0a48be9f11..9a2f74c21c93f 100644 --- a/test/lit.cfg +++ b/test/lit.cfg @@ -175,8 +175,12 @@ for sub in ['llvmgcc', 'llvmgxx', 'emitir', 'compile_cxx', 'compile_c', # (llvm_tools_dir in lit parlance). # Don't match 'bugpoint-' or 'clang-'. # Don't match '/clang'. +if os.pathsep == ';': + pathext = os.environ.get('PATHEXT', '').split(';') +else: + pathext = [''] for pattern in [r"\bbugpoint\b(?!-)", r"(? SilencePasses("silence-passes", cl::desc("Suppress output of running passes (both stdout and stderr)")); +cl::opt SilencePasses("silence-passes", + cl::desc("Suppress output of running passes (both stdout and stderr)")); static cl::list OptArgs("opt-args", cl::Positional, cl::desc("..."), diff --git a/tools/gold/gold-plugin.cpp b/tools/gold/gold-plugin.cpp index ad2774a64ef40..7ce176002551b 100644 --- a/tools/gold/gold-plugin.cpp +++ b/tools/gold/gold-plugin.cpp @@ -64,7 +64,7 @@ namespace { std::string output_name = ""; std::list Modules; std::vector Cleanup; - lto_code_gen_t code_gen; + lto_code_gen_t code_gen = NULL; } namespace options { @@ -73,8 +73,6 @@ namespace options { static generate_bc generate_bc_file = BC_NO; static std::string bc_path; static std::string obj_path; - static std::string as_path; - static std::vector as_args; static std::vector pass_through; static std::string extra_library_path; static std::string triple; @@ -96,16 +94,6 @@ namespace options { generate_api_file = true; } else if (opt.startswith("mcpu=")) { mcpu = opt.substr(strlen("mcpu=")); - } else if (opt.startswith("as=")) { - if (!as_path.empty()) { - (*message)(LDPL_WARNING, "Path to as specified twice. " - "Discarding %s", opt_); - } else { - as_path = opt.substr(strlen("as=")); - } - } else if (opt.startswith("as-arg=")) { - llvm::StringRef item = opt.substr(strlen("as-arg=")); - as_args.push_back(item.str()); } else if (opt.startswith("extra-library-path=")) { extra_library_path = opt.substr(strlen("extra_library_path=")); } else if (opt.startswith("pass-through=")) { @@ -196,6 +184,8 @@ ld_plugin_status onload(ld_plugin_tv *tv) { if ((*callback)(all_symbols_read_hook) != LDPS_OK) return LDPS_ERR; + + code_gen = lto_codegen_create(); } break; case LDPT_REGISTER_CLEANUP_HOOK: { ld_plugin_register_cleanup callback; @@ -236,8 +226,6 @@ ld_plugin_status onload(ld_plugin_tv *tv) { return LDPS_ERR; } - code_gen = lto_codegen_create(); - return LDPS_OK; } @@ -322,6 +310,7 @@ static ld_plugin_status claim_file_hook(const ld_plugin_input_file *file, cf.syms.push_back(ld_plugin_symbol()); ld_plugin_symbol &sym = cf.syms.back(); sym.name = const_cast(lto_module_get_symbol_name(M, i)); + sym.name = strdup(sym.name); sym.version = NULL; int scope = attrs & LTO_SYMBOL_SCOPE_MASK; @@ -379,7 +368,11 @@ static ld_plugin_status claim_file_hook(const ld_plugin_input_file *file, } } - lto_codegen_add_module(code_gen, M); + if (code_gen) + lto_codegen_add_module(code_gen, M); + + lto_module_dispose(M); + return LDPS_OK; } @@ -389,6 +382,8 @@ static ld_plugin_status claim_file_hook(const ld_plugin_input_file *file, /// codegen. static ld_plugin_status all_symbols_read_hook(void) { std::ofstream api_file; + assert(code_gen); + if (options::generate_api_file) { api_file.open("apifile.txt", std::ofstream::out | std::ofstream::trunc); if (!api_file.is_open()) { @@ -425,18 +420,6 @@ static ld_plugin_status all_symbols_read_hook(void) { lto_codegen_set_pic_model(code_gen, output_type); lto_codegen_set_debug_model(code_gen, LTO_DEBUG_MODEL_DWARF); - if (!options::as_path.empty()) { - sys::Path p = sys::Program::FindProgramByName(options::as_path); - lto_codegen_set_assembler_path(code_gen, p.c_str()); - } - if (!options::as_args.empty()) { - std::vector as_args_p; - for (std::vector::iterator I = options::as_args.begin(), - E = options::as_args.end(); I != E; ++I) { - as_args_p.push_back(I->c_str()); - } - lto_codegen_set_assembler_args(code_gen, &as_args_p[0], as_args_p.size()); - } if (!options::mcpu.empty()) lto_codegen_set_cpu(code_gen, options::mcpu.c_str()); @@ -469,10 +452,10 @@ static ld_plugin_status all_symbols_read_hook(void) { std::string ErrMsg; const char *objPath; + sys::Path uniqueObjPath("/tmp/llvmgold.o"); if (!options::obj_path.empty()) { objPath = options::obj_path.c_str(); } else { - sys::Path uniqueObjPath("/tmp/llvmgold.o"); if (uniqueObjPath.createTemporaryFileOnDisk(true, &ErrMsg)) { (*message)(LDPL_ERROR, "%s", ErrMsg.c_str()); return LDPS_ERR; @@ -497,6 +480,13 @@ static ld_plugin_status all_symbols_read_hook(void) { objFile.keep(); lto_codegen_dispose(code_gen); + for (std::list::iterator I = Modules.begin(), + E = Modules.end(); I != E; ++I) { + for (unsigned i = 0; i != I->syms.size(); ++i) { + ld_plugin_symbol &sym = I->syms[i]; + free(sym.name); + } + } if ((*add_input_file)(objPath) != LDPS_OK) { (*message)(LDPL_ERROR, "Unable to add .o file to the link."); diff --git a/tools/llvm-config/CMakeLists.txt b/tools/llvm-config/CMakeLists.txt index d33ff0dad8436..b6f42895c171d 100644 --- a/tools/llvm-config/CMakeLists.txt +++ b/tools/llvm-config/CMakeLists.txt @@ -124,8 +124,7 @@ add_custom_command(OUTPUT ${LLVM_CONFIG} add_custom_target(llvm-config.target ALL DEPENDS ${LLVM_CONFIG}) -get_property(llvm_lib_targets GLOBAL PROPERTY LLVM_LIB_TARGETS) -add_dependencies(llvm-config.target ${llvm_lib_targets}) +add_dependencies( llvm-config.target ${llvm_libs} ) # Make sure that llvm-config builds before the llvm tools, so we have # LibDeps.txt and can use it for updating the hard-coded library diff --git a/tools/llvm-mc/Disassembler.cpp b/tools/llvm-mc/Disassembler.cpp index c29d82a2cb384..d98b57ebc6591 100644 --- a/tools/llvm-mc/Disassembler.cpp +++ b/tools/llvm-mc/Disassembler.cpp @@ -227,113 +227,120 @@ int Disassembler::disassembleEnhanced(const std::string &TS, } EDDisassembler::initialize(); - EDDisassembler *disassembler = - EDDisassembler::getDisassembler(TS.c_str(), AS); + OwningPtr + disassembler(EDDisassembler::getDisassembler(TS.c_str(), AS)); if (disassembler == 0) { errs() << "error: couldn't get disassembler for " << TS << '\n'; return -1; } - EDInst *inst = - disassembler->createInst(byteArrayReader, 0, &ByteArray); - - if (inst == 0) { - errs() << "error: Didn't get an instruction\n"; - return -1; - } + while (ByteArray.size()) { + OwningPtr + inst(disassembler->createInst(byteArrayReader, 0, &ByteArray)); - unsigned numTokens = inst->numTokens(); - if ((int)numTokens < 0) { - errs() << "error: couldn't count the instruction's tokens\n"; - return -1; - } - - for (unsigned tokenIndex = 0; tokenIndex != numTokens; ++tokenIndex) { - EDToken *token; - - if (inst->getToken(token, tokenIndex)) { - errs() << "error: Couldn't get token\n"; + ByteArray.erase (ByteArray.begin(), ByteArray.begin() + inst->byteSize()); + + if (inst == 0) { + errs() << "error: Didn't get an instruction\n"; return -1; } - const char *buf; - if (token->getString(buf)) { - errs() << "error: Couldn't get string for token\n"; + unsigned numTokens = inst->numTokens(); + if ((int)numTokens < 0) { + errs() << "error: couldn't count the instruction's tokens\n"; return -1; } - Out << '['; - int operandIndex = token->operandID(); - - if (operandIndex >= 0) - Out << operandIndex << "-"; - - switch (token->type()) { - default: Out << "?"; break; - case EDToken::kTokenWhitespace: Out << "w"; break; - case EDToken::kTokenPunctuation: Out << "p"; break; - case EDToken::kTokenOpcode: Out << "o"; break; - case EDToken::kTokenLiteral: Out << "l"; break; - case EDToken::kTokenRegister: Out << "r"; break; - } - - Out << ":" << buf; - - if (token->type() == EDToken::kTokenLiteral) { - Out << "="; - if (token->literalSign()) - Out << "-"; - uint64_t absoluteValue; - if (token->literalAbsoluteValue(absoluteValue)) { - errs() << "error: Couldn't get the value of a literal token\n"; + for (unsigned tokenIndex = 0; tokenIndex != numTokens; ++tokenIndex) { + EDToken *token; + + if (inst->getToken(token, tokenIndex)) { + errs() << "error: Couldn't get token\n"; return -1; } - Out << absoluteValue; - } else if (token->type() == EDToken::kTokenRegister) { - Out << "="; - unsigned regID; - if (token->registerID(regID)) { - errs() << "error: Couldn't get the ID of a register token\n"; + + const char *buf; + if (token->getString(buf)) { + errs() << "error: Couldn't get string for token\n"; return -1; } - Out << "r" << regID; + + Out << '['; + int operandIndex = token->operandID(); + + if (operandIndex >= 0) + Out << operandIndex << "-"; + + switch (token->type()) { + default: Out << "?"; break; + case EDToken::kTokenWhitespace: Out << "w"; break; + case EDToken::kTokenPunctuation: Out << "p"; break; + case EDToken::kTokenOpcode: Out << "o"; break; + case EDToken::kTokenLiteral: Out << "l"; break; + case EDToken::kTokenRegister: Out << "r"; break; + } + + Out << ":" << buf; + + if (token->type() == EDToken::kTokenLiteral) { + Out << "="; + if (token->literalSign()) + Out << "-"; + uint64_t absoluteValue; + if (token->literalAbsoluteValue(absoluteValue)) { + errs() << "error: Couldn't get the value of a literal token\n"; + return -1; + } + Out << absoluteValue; + } else if (token->type() == EDToken::kTokenRegister) { + Out << "="; + unsigned regID; + if (token->registerID(regID)) { + errs() << "error: Couldn't get the ID of a register token\n"; + return -1; + } + Out << "r" << regID; + } + + Out << "]"; } - Out << "]"; - } - - Out << " "; + Out << " "; + + if (inst->isBranch()) + Out << "
"; + if (inst->isMove()) + Out << " "; - if (inst->isBranch()) - Out << "
"; - if (inst->isMove()) - Out << " "; - - unsigned numOperands = inst->numOperands(); - - if ((int)numOperands < 0) { - errs() << "error: Couldn't count operands\n"; - return -1; - } - - for (unsigned operandIndex = 0; operandIndex != numOperands; ++operandIndex) { - Out << operandIndex << ":"; + unsigned numOperands = inst->numOperands(); - EDOperand *operand; - if (inst->getOperand(operand, operandIndex)) { - errs() << "error: couldn't get operand\n"; + if ((int)numOperands < 0) { + errs() << "error: Couldn't count operands\n"; return -1; } - uint64_t evaluatedResult; - void *Arg[] = { disassembler, &Out }; - evaluatedResult = operand->evaluate(evaluatedResult, verboseEvaluator, Arg); - Out << "=" << evaluatedResult << " "; + for (unsigned operandIndex = 0; operandIndex != numOperands; ++operandIndex) { + Out << operandIndex << ":"; + + EDOperand *operand; + if (inst->getOperand(operand, operandIndex)) { + errs() << "error: couldn't get operand\n"; + return -1; + } + + uint64_t evaluatedResult; + void *Arg[] = { disassembler.get(), &Out }; + if (operand->evaluate(evaluatedResult, verboseEvaluator, Arg)) { + errs() << "error: Couldn't evaluate an operand\n"; + return -1; + } + Out << "=" << evaluatedResult << " "; + } + + Out << '\n'; } - Out << '\n'; - return 0; } diff --git a/tools/lto/LTOCodeGenerator.cpp b/tools/lto/LTOCodeGenerator.cpp index adb7102b3c76f..f72fdb0fca949 100644 --- a/tools/lto/LTOCodeGenerator.cpp +++ b/tools/lto/LTOCodeGenerator.cpp @@ -71,10 +71,11 @@ LTOCodeGenerator::LTOCodeGenerator() _linker("LinkTimeOptimizer", "ld-temp.o", _context), _target(NULL), _emitDwarfDebugInfo(false), _scopeRestrictionsDone(false), _codeModel(LTO_CODEGEN_PIC_MODEL_DYNAMIC), - _nativeObjectFile(NULL), _assemblerPath(NULL) + _nativeObjectFile(NULL) { InitializeAllTargets(); InitializeAllAsmPrinters(); + InitializeAllAsmParsers(); } LTOCodeGenerator::~LTOCodeGenerator() @@ -126,21 +127,6 @@ void LTOCodeGenerator::setCpu(const char* mCpu) _mCpu = mCpu; } -void LTOCodeGenerator::setAssemblerPath(const char* path) -{ - if ( _assemblerPath ) - delete _assemblerPath; - _assemblerPath = new sys::Path(path); -} - -void LTOCodeGenerator::setAssemblerArgs(const char** args, int nargs) -{ - for (int i = 0; i < nargs; ++i) { - const char *arg = args[i]; - _assemblerArgs.push_back(arg); - } -} - void LTOCodeGenerator::addMustPreserveSymbol(const char* sym) { _mustPreserveSymbols[sym] = 1; @@ -183,55 +169,42 @@ bool LTOCodeGenerator::writeMergedModules(const char *path, const void* LTOCodeGenerator::compile(size_t* length, std::string& errMsg) { - // make unique temp .s file to put generated assembly code - sys::Path uniqueAsmPath("lto-llvm.s"); - if ( uniqueAsmPath.createTemporaryFileOnDisk(false, &errMsg) ) - return NULL; - sys::RemoveFileOnSignal(uniqueAsmPath); - - // generate assembly code - bool genResult = false; - { - tool_output_file asmFile(uniqueAsmPath.c_str(), errMsg); - if (!errMsg.empty()) - return NULL; - genResult = this->generateAssemblyCode(asmFile.os(), errMsg); - asmFile.os().close(); - if (asmFile.os().has_error()) { - asmFile.os().clear_error(); - return NULL; - } - asmFile.keep(); - } - if ( genResult ) { - uniqueAsmPath.eraseFromDisk(); - return NULL; - } - // make unique temp .o file to put generated object file sys::PathWithStatus uniqueObjPath("lto-llvm.o"); if ( uniqueObjPath.createTemporaryFileOnDisk(false, &errMsg) ) { - uniqueAsmPath.eraseFromDisk(); + uniqueObjPath.eraseFromDisk(); return NULL; } sys::RemoveFileOnSignal(uniqueObjPath); - // assemble the assembly code - const std::string& uniqueObjStr = uniqueObjPath.str(); - bool asmResult = this->assemble(uniqueAsmPath.str(), uniqueObjStr, errMsg); - if ( !asmResult ) { - // remove old buffer if compile() called twice - delete _nativeObjectFile; - - // read .o file into memory buffer - OwningPtr BuffPtr; - if (error_code ec = MemoryBuffer::getFile(uniqueObjStr.c_str(),BuffPtr)) - errMsg = ec.message(); - _nativeObjectFile = BuffPtr.take(); + // generate object file + bool genResult = false; + tool_output_file objFile(uniqueObjPath.c_str(), errMsg); + if (!errMsg.empty()) + return NULL; + genResult = this->generateObjectFile(objFile.os(), errMsg); + objFile.os().close(); + if (objFile.os().has_error()) { + objFile.os().clear_error(); + return NULL; + } + objFile.keep(); + if ( genResult ) { + uniqueObjPath.eraseFromDisk(); + return NULL; } + const std::string& uniqueObjStr = uniqueObjPath.str(); + // remove old buffer if compile() called twice + delete _nativeObjectFile; + + // read .o file into memory buffer + OwningPtr BuffPtr; + if (error_code ec = MemoryBuffer::getFile(uniqueObjStr.c_str(),BuffPtr)) + errMsg = ec.message(); + _nativeObjectFile = BuffPtr.take(); + // remove temp files - uniqueAsmPath.eraseFromDisk(); uniqueObjPath.eraseFromDisk(); // return buffer, unless error @@ -241,67 +214,6 @@ const void* LTOCodeGenerator::compile(size_t* length, std::string& errMsg) return _nativeObjectFile->getBufferStart(); } - -bool LTOCodeGenerator::assemble(const std::string& asmPath, - const std::string& objPath, std::string& errMsg) -{ - sys::Path tool; - bool needsCompilerOptions = true; - if ( _assemblerPath ) { - tool = *_assemblerPath; - needsCompilerOptions = false; - } else { - // find compiler driver - tool = sys::Program::FindProgramByName("gcc"); - if ( tool.isEmpty() ) { - errMsg = "can't locate gcc"; - return true; - } - } - - // build argument list - std::vector args; - llvm::Triple targetTriple(_linker.getModule()->getTargetTriple()); - const char *arch = targetTriple.getArchNameForAssembler(); - - args.push_back(tool.c_str()); - - if (targetTriple.getOS() == Triple::Darwin) { - // darwin specific command line options - if (arch != NULL) { - args.push_back("-arch"); - args.push_back(arch); - } - // add -static to assembler command line when code model requires - if ( (_assemblerPath != NULL) && - (_codeModel == LTO_CODEGEN_PIC_MODEL_STATIC) ) - args.push_back("-static"); - } - if ( needsCompilerOptions ) { - args.push_back("-c"); - args.push_back("-x"); - args.push_back("assembler"); - } else { - for (std::vector::iterator I = _assemblerArgs.begin(), - E = _assemblerArgs.end(); I != E; ++I) { - args.push_back(I->c_str()); - } - } - args.push_back("-o"); - args.push_back(objPath.c_str()); - args.push_back(asmPath.c_str()); - args.push_back(0); - - // invoke assembler - if ( sys::Program::ExecuteAndWait(tool, &args[0], 0, 0, 0, 0, &errMsg) ) { - errMsg = "error in assembly"; - return true; - } - return false; // success -} - - - bool LTOCodeGenerator::determineTarget(std::string& errMsg) { if ( _target == NULL ) { @@ -357,7 +269,7 @@ void LTOCodeGenerator::applyScopeRestrictions() { mangler.getNameWithPrefix(Buffer, f, false); if (!f->isDeclaration() && _mustPreserveSymbols.count(Buffer)) - mustPreserveList.push_back(::strdup(f->getNameStr().c_str())); + mustPreserveList.push_back(f->getName().data()); } for (Module::global_iterator v = mergedModule->global_begin(), e = mergedModule->global_end(); v != e; ++v) { @@ -365,7 +277,7 @@ void LTOCodeGenerator::applyScopeRestrictions() { mangler.getNameWithPrefix(Buffer, v, false); if (!v->isDeclaration() && _mustPreserveSymbols.count(Buffer)) - mustPreserveList.push_back(::strdup(v->getNameStr().c_str())); + mustPreserveList.push_back(v->getName().data()); } for (Module::alias_iterator a = mergedModule->alias_begin(), e = mergedModule->alias_end(); a != e; ++a) { @@ -373,7 +285,7 @@ void LTOCodeGenerator::applyScopeRestrictions() { mangler.getNameWithPrefix(Buffer, a, false); if (!a->isDeclaration() && _mustPreserveSymbols.count(Buffer)) - mustPreserveList.push_back(::strdup(a->getNameStr().c_str())); + mustPreserveList.push_back(a->getName().data()); } passes.add(createInternalizePass(mustPreserveList)); } @@ -385,8 +297,8 @@ void LTOCodeGenerator::applyScopeRestrictions() { } /// Optimize merged modules using various IPO passes -bool LTOCodeGenerator::generateAssemblyCode(raw_ostream& out, - std::string& errMsg) +bool LTOCodeGenerator::generateObjectFile(raw_ostream& out, + std::string& errMsg) { if ( this->determineTarget(errMsg) ) return true; @@ -423,7 +335,7 @@ bool LTOCodeGenerator::generateAssemblyCode(raw_ostream& out, formatted_raw_ostream Out(out); if (_target->addPassesToEmitFile(*codeGenPasses, Out, - TargetMachine::CGFT_AssemblyFile, + TargetMachine::CGFT_ObjectFile, CodeGenOpt::Aggressive)) { errMsg = "target file type not supported"; return true; @@ -441,6 +353,7 @@ bool LTOCodeGenerator::generateAssemblyCode(raw_ostream& out, codeGenPasses->run(*it); codeGenPasses->doFinalization(); + delete codeGenPasses; return false; // success } diff --git a/tools/lto/LTOCodeGenerator.h b/tools/lto/LTOCodeGenerator.h index f5b78a608a99a..0556520424d7d 100644 --- a/tools/lto/LTOCodeGenerator.h +++ b/tools/lto/LTOCodeGenerator.h @@ -37,18 +37,14 @@ struct LTOCodeGenerator { bool setDebugInfo(lto_debug_model, std::string& errMsg); bool setCodePICModel(lto_codegen_model, std::string& errMsg); void setCpu(const char *cpu); - void setAssemblerPath(const char* path); - void setAssemblerArgs(const char** args, int nargs); void addMustPreserveSymbol(const char* sym); bool writeMergedModules(const char* path, std::string& errMsg); const void* compile(size_t* length, std::string& errMsg); void setCodeGenDebugOptions(const char *opts); private: - bool generateAssemblyCode(llvm::raw_ostream& out, - std::string& errMsg); - bool assemble(const std::string& asmPath, - const std::string& objPath, std::string& errMsg); + bool generateObjectFile(llvm::raw_ostream& out, + std::string& errMsg); void applyScopeRestrictions(); bool determineTarget(std::string& errMsg); @@ -63,9 +59,7 @@ private: StringSet _mustPreserveSymbols; llvm::MemoryBuffer* _nativeObjectFile; std::vector _codegenOptions; - llvm::sys::Path* _assemblerPath; std::string _mCpu; - std::vector _assemblerArgs; }; #endif // LTO_CODE_GENERATOR_H diff --git a/tools/lto/LTOModule.cpp b/tools/lto/LTOModule.cpp index 8562f747d0ee5..1eac22cfaf1c8 100644 --- a/tools/lto/LTOModule.cpp +++ b/tools/lto/LTOModule.cpp @@ -195,26 +195,28 @@ void LTOModule::addObjCClass(GlobalVariable *clgv) { std::string superclassName; if (objcClassNameFromExpression(c->getOperand(1), superclassName)) { NameAndAttributes info; - if (_undefines.find(superclassName.c_str()) == _undefines.end()) { - const char *symbolName = ::strdup(superclassName.c_str()); + StringMap::value_type &entry = + _undefines.GetOrCreateValue(superclassName.c_str()); + if (!entry.getValue().name) { + const char *symbolName = entry.getKey().data(); info.name = symbolName; info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; - // string is owned by _undefines - _undefines[info.name] = info; + entry.setValue(info); } } // third slot in __OBJC,__class is pointer to class name std::string className; if (objcClassNameFromExpression(c->getOperand(2), className)) { - const char *symbolName = ::strdup(className.c_str()); + StringSet::value_type &entry = + _defines.GetOrCreateValue(className.c_str()); + entry.setValue(1); NameAndAttributes info; - info.name = symbolName; + info.name = entry.getKey().data(); info.attributes = (lto_symbol_attributes) (LTO_SYMBOL_PERMISSIONS_DATA | LTO_SYMBOL_DEFINITION_REGULAR | LTO_SYMBOL_SCOPE_DEFAULT); _symbols.push_back(info); - _defines[info.name] = 1; } } } @@ -227,13 +229,17 @@ void LTOModule::addObjCCategory(GlobalVariable *clgv) { std::string targetclassName; if (objcClassNameFromExpression(c->getOperand(1), targetclassName)) { NameAndAttributes info; - if (_undefines.find(targetclassName.c_str()) == _undefines.end()) { - const char *symbolName = ::strdup(targetclassName.c_str()); - info.name = symbolName; - info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; - // string is owned by _undefines - _undefines[info.name] = info; - } + + StringMap::value_type &entry = + _undefines.GetOrCreateValue(targetclassName.c_str()); + + if (entry.getValue().name) + return; + + const char *symbolName = entry.getKey().data(); + info.name = symbolName; + info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; + entry.setValue(info); } } } @@ -244,13 +250,16 @@ void LTOModule::addObjCClassRef(GlobalVariable *clgv) { std::string targetclassName; if (objcClassNameFromExpression(clgv->getInitializer(), targetclassName)) { NameAndAttributes info; - if (_undefines.find(targetclassName.c_str()) == _undefines.end()) { - const char *symbolName = ::strdup(targetclassName.c_str()); - info.name = symbolName; - info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; - // string is owned by _undefines - _undefines[info.name] = info; - } + + StringMap::value_type &entry = + _undefines.GetOrCreateValue(targetclassName.c_str()); + if (entry.getValue().name) + return; + + const char *symbolName = entry.getKey().data(); + info.name = symbolName; + info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; + entry.setValue(info); } } @@ -322,7 +331,6 @@ void LTOModule::addDefinedSymbol(GlobalValue *def, Mangler &mangler, // string is owned by _defines SmallString<64> Buffer; mangler.getNameWithPrefix(Buffer, def, false); - const char *symbolName = ::strdup(Buffer.c_str()); // set alignment part log2() can have rounding errors uint32_t align = def->getAlignment(); @@ -365,26 +373,31 @@ void LTOModule::addDefinedSymbol(GlobalValue *def, Mangler &mangler, // add to table of symbols NameAndAttributes info; - info.name = symbolName; + StringSet::value_type &entry = _defines.GetOrCreateValue(Buffer.c_str()); + entry.setValue(1); + + StringRef Name = entry.getKey(); + info.name = Name.data(); + assert(info.name[Name.size()] == '\0'); info.attributes = (lto_symbol_attributes)attr; _symbols.push_back(info); - _defines[info.name] = 1; } void LTOModule::addAsmGlobalSymbol(const char *name) { + StringSet::value_type &entry = _defines.GetOrCreateValue(name); + // only add new define if not already defined - if (_defines.count(name)) + if (entry.getValue()) return; - // string is owned by _defines - const char *symbolName = ::strdup(name); + entry.setValue(1); + const char *symbolName = entry.getKey().data(); uint32_t attr = LTO_SYMBOL_DEFINITION_REGULAR; attr |= LTO_SYMBOL_SCOPE_DEFAULT; NameAndAttributes info; info.name = symbolName; info.attributes = (lto_symbol_attributes)attr; _symbols.push_back(info); - _defines[info.name] = 1; } void LTOModule::addPotentialUndefinedSymbol(GlobalValue *decl, @@ -400,18 +413,22 @@ void LTOModule::addPotentialUndefinedSymbol(GlobalValue *decl, SmallString<64> name; mangler.getNameWithPrefix(name, decl, false); + StringMap::value_type &entry = + _undefines.GetOrCreateValue(name.c_str()); + // we already have the symbol - if (_undefines.find(name) != _undefines.end()) + if (entry.getValue().name) return; NameAndAttributes info; - // string is owned by _undefines - info.name = ::strdup(name.c_str()); + + info.name = entry.getKey().data(); if (decl->hasExternalWeakLinkage()) info.attributes = LTO_SYMBOL_DEFINITION_WEAKUNDEF; else info.attributes = LTO_SYMBOL_DEFINITION_UNDEFINED; - _undefines[name] = info; + + entry.setValue(info); } diff --git a/tools/lto/lto.cpp b/tools/lto/lto.cpp index 7d4871d9253db..f48570c1495dc 100644 --- a/tools/lto/lto.cpp +++ b/tools/lto/lto.cpp @@ -231,7 +231,7 @@ void lto_codegen_set_cpu(lto_code_gen_t cg, const char* cpu) // void lto_codegen_set_assembler_path(lto_code_gen_t cg, const char* path) { - cg->setAssemblerPath(path); + // In here only for backwards compatibility. We use MC now. } @@ -241,7 +241,7 @@ void lto_codegen_set_assembler_path(lto_code_gen_t cg, const char* path) void lto_codegen_set_assembler_args(lto_code_gen_t cg, const char** args, int nargs) { - cg->setAssemblerArgs(args, nargs); + // In here only for backwards compatibility. We use MC now. } // diff --git a/unittests/ADT/APIntTest.cpp b/unittests/ADT/APIntTest.cpp index 557d835bacda0..e05bdbfc71019 100644 --- a/unittests/ADT/APIntTest.cpp +++ b/unittests/ADT/APIntTest.cpp @@ -332,6 +332,24 @@ TEST(APIntTest, Log2) { EXPECT_EQ(APInt(15, 9).exactLogBase2(), -1); } +TEST(APIntTest, magic) { + EXPECT_EQ(APInt(32, 3).magic().m, APInt(32, "55555556", 16)); + EXPECT_EQ(APInt(32, 3).magic().s, 0U); + EXPECT_EQ(APInt(32, 5).magic().m, APInt(32, "66666667", 16)); + EXPECT_EQ(APInt(32, 5).magic().s, 1U); + EXPECT_EQ(APInt(32, 7).magic().m, APInt(32, "92492493", 16)); + EXPECT_EQ(APInt(32, 7).magic().s, 2U); +} + +TEST(APIntTest, magicu) { + EXPECT_EQ(APInt(32, 3).magicu().m, APInt(32, "AAAAAAAB", 16)); + EXPECT_EQ(APInt(32, 3).magicu().s, 1U); + EXPECT_EQ(APInt(32, 5).magicu().m, APInt(32, "CCCCCCCD", 16)); + EXPECT_EQ(APInt(32, 5).magicu().s, 2U); + EXPECT_EQ(APInt(32, 7).magicu().m, APInt(32, "24924925", 16)); + EXPECT_EQ(APInt(32, 7).magicu().s, 3U); +} + #ifdef GTEST_HAS_DEATH_TEST #ifndef NDEBUG TEST(APIntTest, StringDeath) { diff --git a/unittests/CMakeLists.txt b/unittests/CMakeLists.txt index 5f09fa2483571..da4a6524bd978 100644 --- a/unittests/CMakeLists.txt +++ b/unittests/CMakeLists.txt @@ -12,9 +12,11 @@ function(add_llvm_unittest test_dirname) endif() add_llvm_executable(${test_name}Tests ${ARGN}) add_dependencies(UnitTests ${test_name}Tests) + set_target_properties(${test_name}Tests PROPERTIES FOLDER "Tests") endfunction() add_custom_target(UnitTests) +set_target_properties(UnitTests PROPERTIES FOLDER "Tests") include_directories(${LLVM_MAIN_SRC_DIR}/utils/unittest/googletest/include) add_definitions(-DGTEST_HAS_RTTI=0) diff --git a/unittests/Transforms/Utils/Local.cpp b/unittests/Transforms/Utils/Local.cpp index e969e958a742b..e0322b37d3326 100644 --- a/unittests/Transforms/Utils/Local.cpp +++ b/unittests/Transforms/Utils/Local.cpp @@ -42,6 +42,17 @@ TEST(Local, RecursivelyDeleteDeadPHINodes) { EXPECT_EQ(&bb0->front(), br0); EXPECT_EQ(&bb1->front(), br1); + builder.SetInsertPoint(bb0); + phi = builder.CreatePHI(Type::getInt32Ty(C)); + + EXPECT_TRUE(RecursivelyDeleteDeadPHINode(phi)); + + builder.SetInsertPoint(bb0); + phi = builder.CreatePHI(Type::getInt32Ty(C)); + builder.CreateAdd(phi, phi); + + EXPECT_TRUE(RecursivelyDeleteDeadPHINode(phi)); + bb0->dropAllReferences(); bb1->dropAllReferences(); delete bb0; diff --git a/utils/FileCheck/CMakeLists.txt b/utils/FileCheck/CMakeLists.txt index 54db453e70e8f..fa56f92a8f287 100644 --- a/utils/FileCheck/CMakeLists.txt +++ b/utils/FileCheck/CMakeLists.txt @@ -1,4 +1,4 @@ -add_executable(FileCheck +add_llvm_utility(FileCheck FileCheck.cpp ) diff --git a/utils/FileUpdate/CMakeLists.txt b/utils/FileUpdate/CMakeLists.txt index 5dda49e0e4c58..655aaec3bc2a1 100644 --- a/utils/FileUpdate/CMakeLists.txt +++ b/utils/FileUpdate/CMakeLists.txt @@ -1,4 +1,4 @@ -add_executable(FileUpdate +add_llvm_utility(FileUpdate FileUpdate.cpp ) diff --git a/utils/KillTheDoctor/CMakeLists.txt b/utils/KillTheDoctor/CMakeLists.txt index 99c671e74af90..37c2b7ceb467a 100644 --- a/utils/KillTheDoctor/CMakeLists.txt +++ b/utils/KillTheDoctor/CMakeLists.txt @@ -1,4 +1,4 @@ -add_executable(KillTheDoctor +add_llvm_utility(KillTheDoctor KillTheDoctor.cpp ) diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index 448ebad91f091..cd31e0c3448d6 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -542,7 +542,255 @@ void AsmWriterEmitter::EmitGetInstructionName(raw_ostream &O) { << "}\n\n#endif\n"; } +void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { + CodeGenTarget Target(Records); + Record *AsmWriter = Target.getAsmWriter(); + + O << "\n#ifdef PRINT_ALIAS_INSTR\n"; + O << "#undef PRINT_ALIAS_INSTR\n\n"; + + // Enumerate the register classes. + const std::vector &RegisterClasses = + Target.getRegisterClasses(); + + O << "namespace { // Register classes\n"; + O << " enum RegClass {\n"; + + // Emit the register enum value for each RegisterClass. + for (unsigned I = 0, E = RegisterClasses.size(); I != E; ++I) { + if (I != 0) O << ",\n"; + O << " RC_" << RegisterClasses[I].TheDef->getName(); + } + + O << "\n };\n"; + O << "} // end anonymous namespace\n\n"; + + // Emit a function that returns 'true' if a regsiter is part of a particular + // register class. I.e., RAX is part of GR64 on X86. + O << "static bool regIsInRegisterClass" + << "(unsigned RegClass, unsigned Reg) {\n"; + + // Emit the switch that checks if a register belongs to a particular register + // class. + O << " switch (RegClass) {\n"; + O << " default: break;\n"; + + for (unsigned I = 0, E = RegisterClasses.size(); I != E; ++I) { + const CodeGenRegisterClass &RC = RegisterClasses[I]; + + // Give the register class a legal C name if it's anonymous. + std::string Name = RC.TheDef->getName(); + O << " case RC_" << Name << ":\n"; + + // Emit the register list now. + unsigned IE = RC.Elements.size(); + if (IE == 1) { + O << " if (Reg == " << getQualifiedName(RC.Elements[0]) << ")\n"; + O << " return true;\n"; + } else { + O << " switch (Reg) {\n"; + O << " default: break;\n"; + + for (unsigned II = 0; II != IE; ++II) { + Record *Reg = RC.Elements[II]; + O << " case " << getQualifiedName(Reg) << ":\n"; + } + + O << " return true;\n"; + O << " }\n"; + } + + O << " break;\n"; + } + + O << " }\n\n"; + O << " return false;\n"; + O << "}\n\n"; + + // Emit the method that prints the alias instruction. + std::string ClassName = AsmWriter->getValueAsString("AsmWriterClassName"); + bool isMC = AsmWriter->getValueAsBit("isMCAsmWriter"); + const char *MachineInstrClassName = isMC ? "MCInst" : "MachineInstr"; + + O << "bool " << Target.getName() << ClassName + << "::printAliasInstr(const " << MachineInstrClassName + << " *MI, raw_ostream &OS) {\n"; + + std::vector AllInstAliases = + Records.getAllDerivedDefinitions("InstAlias"); + + // Create a map from the qualified name to a list of potential matches. + std::map > AliasMap; + for (std::vector::iterator + I = AllInstAliases.begin(), E = AllInstAliases.end(); I != E; ++I) { + CodeGenInstAlias *Alias = new CodeGenInstAlias(*I, Target); + const Record *R = *I; + const DagInit *DI = R->getValueAsDag("ResultInst"); + const DefInit *Op = dynamic_cast(DI->getOperator()); + AliasMap[getQualifiedName(Op->getDef())].push_back(Alias); + } + + if (AliasMap.empty() || !isMC) { + // FIXME: Support MachineInstr InstAliases? + O << " return true;\n"; + O << "}\n\n"; + O << "#endif // PRINT_ALIAS_INSTR\n"; + return; + } + + O << " StringRef AsmString;\n"; + O << " std::map OpMap;\n"; + O << " switch (MI->getOpcode()) {\n"; + O << " default: return true;\n"; + + for (std::map >::iterator + I = AliasMap.begin(), E = AliasMap.end(); I != E; ++I) { + std::vector &Aliases = I->second; + + std::map CondCount; + std::map BodyMap; + + std::string AsmString = ""; + + for (std::vector::iterator + II = Aliases.begin(), IE = Aliases.end(); II != IE; ++II) { + const CodeGenInstAlias *CGA = *II; + AsmString = CGA->AsmString; + unsigned Indent = 8; + unsigned LastOpNo = CGA->ResultInstOperandIndex.size(); + + std::string Cond; + raw_string_ostream CondO(Cond); + + CondO << "if (MI->getNumOperands() == " << LastOpNo; + + std::map OpMap; + bool CantHandle = false; + + for (unsigned i = 0, e = LastOpNo; i != e; ++i) { + const CodeGenInstAlias::ResultOperand &RO = CGA->ResultOperands[i]; + + switch (RO.Kind) { + default: assert(0 && "unexpected InstAlias operand kind"); + case CodeGenInstAlias::ResultOperand::K_Record: { + const Record *Rec = RO.getRecord(); + StringRef ROName = RO.getName(); + + if (Rec->isSubClassOf("RegisterClass")) { + CondO << " &&\n"; + CondO.indent(Indent) << "MI->getOperand(" << i << ").isReg() &&\n"; + if (OpMap.find(ROName) == OpMap.end()) { + OpMap[ROName] = i; + CondO.indent(Indent) + << "regIsInRegisterClass(RC_" + << CGA->ResultOperands[i].getRecord()->getName() + << ", MI->getOperand(" << i << ").getReg())"; + } else { + CondO.indent(Indent) + << "MI->getOperand(" << i + << ").getReg() == MI->getOperand(" + << OpMap[ROName] << ").getReg()"; + } + } else { + assert(Rec->isSubClassOf("Operand") && "Unexpected operand!"); + // FIXME: We need to handle these situations. + CantHandle = true; + break; + } + + break; + } + case CodeGenInstAlias::ResultOperand::K_Imm: + CondO << " &&\n"; + CondO.indent(Indent) << "MI->getOperand(" << i << ").getImm() == "; + CondO << CGA->ResultOperands[i].getImm(); + break; + case CodeGenInstAlias::ResultOperand::K_Reg: + CondO << " &&\n"; + CondO.indent(Indent) << "MI->getOperand(" << i << ").getReg() == "; + CondO << Target.getName() << "::" + << CGA->ResultOperands[i].getRegister()->getName(); + break; + } + + if (CantHandle) break; + } + + if (CantHandle) continue; + + CondO << ")"; + + std::string Body; + raw_string_ostream BodyO(Body); + + BodyO << " // " << CGA->Result->getAsString() << "\n"; + BodyO << " AsmString = \"" << AsmString << "\";\n"; + + for (std::map::iterator + III = OpMap.begin(), IIE = OpMap.end(); III != IIE; ++III) + BodyO << " OpMap[\"" << III->first << "\"] = " + << III->second << ";\n"; + + ++CondCount[CondO.str()]; + BodyMap[CondO.str()] = BodyO.str(); + } + + std::string Code; + raw_string_ostream CodeO(Code); + + bool EmitElse = false; + for (std::map::iterator + II = CondCount.begin(), IE = CondCount.end(); II != IE; ++II) { + if (II->second != 1) continue; + CodeO << " "; + if (EmitElse) CodeO << "} else "; + CodeO << II->first << " {\n"; + CodeO << BodyMap[II->first]; + EmitElse = true; + } + + if (CodeO.str().empty()) continue; + + O << " case " << I->first << ":\n"; + O << CodeO.str(); + O << " }\n"; + O << " break;\n"; + } + + O << " }\n\n"; + + // Code that prints the alias, replacing the operands with the ones from the + // MCInst. + O << " if (AsmString.empty()) return true;\n"; + O << " std::pair ASM = AsmString.split(' ');\n"; + O << " OS << '\\t' << ASM.first;\n"; + + O << " if (!ASM.second.empty()) {\n"; + O << " OS << '\\t';\n"; + O << " for (StringRef::iterator\n"; + O << " I = ASM.second.begin(), E = ASM.second.end(); I != E; ) {\n"; + O << " if (*I == '$') {\n"; + O << " StringRef::iterator Start = ++I;\n"; + O << " while (I != E &&\n"; + O << " ((*I >= 'a' && *I <= 'z') ||\n"; + O << " (*I >= 'A' && *I <= 'Z') ||\n"; + O << " (*I >= '0' && *I <= '9') ||\n"; + O << " *I == '_'))\n"; + O << " ++I;\n"; + O << " StringRef Name(Start, I - Start);\n"; + O << " printOperand(MI, OpMap[Name], OS);\n"; + O << " } else {\n"; + O << " OS << *I++;\n"; + O << " }\n"; + O << " }\n"; + O << " }\n\n"; + + O << " return false;\n"; + O << "}\n\n"; + + O << "#endif // PRINT_ALIAS_INSTR\n"; +} void AsmWriterEmitter::run(raw_ostream &O) { EmitSourceFileHeader("Assembly Writer Source Fragment", O); @@ -550,5 +798,6 @@ void AsmWriterEmitter::run(raw_ostream &O) { EmitPrintInstruction(O); EmitGetRegisterName(O); EmitGetInstructionName(O); + EmitPrintAliasInstruction(O); } diff --git a/utils/TableGen/AsmWriterEmitter.h b/utils/TableGen/AsmWriterEmitter.h index 9f7d7761a497f..5e8d6f5b7fe75 100644 --- a/utils/TableGen/AsmWriterEmitter.h +++ b/utils/TableGen/AsmWriterEmitter.h @@ -38,6 +38,7 @@ private: void EmitPrintInstruction(raw_ostream &o); void EmitGetRegisterName(raw_ostream &o); void EmitGetInstructionName(raw_ostream &o); + void EmitPrintAliasInstruction(raw_ostream &O); AsmWriterInst *getAsmWriterInstByID(unsigned ID) const { assert(ID < NumberedInstructions.size()); diff --git a/utils/TableGen/CMakeLists.txt b/utils/TableGen/CMakeLists.txt index e24314c3e0eca..514b1912992a7 100644 --- a/utils/TableGen/CMakeLists.txt +++ b/utils/TableGen/CMakeLists.txt @@ -3,7 +3,7 @@ set(LLVM_REQUIRES_RTTI 1) set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${LLVM_TOOLS_BINARY_DIR}) -add_executable(tblgen +add_llvm_utility(tblgen ARMDecoderEmitter.cpp AsmMatcherEmitter.cpp AsmWriterEmitter.cpp diff --git a/utils/TableGen/ClangSACheckersEmitter.cpp b/utils/TableGen/ClangSACheckersEmitter.cpp index 3e49ab138fcd7..8865db36b6c37 100644 --- a/utils/TableGen/ClangSACheckersEmitter.cpp +++ b/utils/TableGen/ClangSACheckersEmitter.cpp @@ -148,6 +148,7 @@ void ClangSACheckersEmitter::run(raw_ostream &OS) { // Create a pseudo-group to hold this checker. std::string fullName = getCheckerFullName(R); GroupInfo &info = groupInfoByName[fullName]; + info.Hidden = R->getValueAsBit("Hidden"); recordGroupMap[R] = &info; info.Checkers.push_back(R); } else { diff --git a/utils/TableGen/X86RecognizableInstr.cpp b/utils/TableGen/X86RecognizableInstr.cpp index ccd3efd980a26..b0839c33982dc 100644 --- a/utils/TableGen/X86RecognizableInstr.cpp +++ b/utils/TableGen/X86RecognizableInstr.cpp @@ -34,7 +34,9 @@ using namespace llvm; MAP(E8, 39) \ MAP(F0, 40) \ MAP(F8, 41) \ - MAP(F9, 42) + MAP(F9, 42) \ + MAP(D0, 45) \ + MAP(D1, 46) // A clone of X86 since we can't depend on something that is generated. namespace X86Local { diff --git a/utils/buildit/GNUmakefile b/utils/buildit/GNUmakefile index 54577e2ef5384..5140e1508a57e 100644 --- a/utils/buildit/GNUmakefile +++ b/utils/buildit/GNUmakefile @@ -80,6 +80,10 @@ EmbeddedSim: export MACOSX_DEPLOYMENT_TARGET=`sw_vers -productVersion`; \ $(MAKE) IOS_SIM_BUILD=yes PREFIX=$(SDKROOT)/usr/local install +Embedded: + ARM_PLATFORM=`xcodebuild -version -sdk iphoneos PlatformPath` && \ + $(MAKE) DSTROOT=$(DSTROOT)$$ARM_PLATFORM install + # installhdrs does nothing, because the headers aren't useful until # the compiler is installed. installhdrs: @@ -128,4 +132,4 @@ clean: $(OBJROOT) $(SYMROOT) $(DSTROOT): mkdir -p $@ -.PHONY: install installsrc clean EmbeddedHosted EmbeddedSim +.PHONY: install installsrc clean EmbeddedHosted EmbeddedSim Embedded diff --git a/utils/buildit/build_llvm b/utils/buildit/build_llvm index 5e8369cdd326a..38b0bfd3848de 100755 --- a/utils/buildit/build_llvm +++ b/utils/buildit/build_llvm @@ -267,8 +267,9 @@ fi # The Hello dylib is an example of how to build a pass. # The BugpointPasses module is only used to test bugpoint. # These unversioned dylibs cause verification failures, so do not install them. -rm $DEST_DIR$DEST_ROOT/lib/libLLVMHello.dylib -rm $DEST_DIR$DEST_ROOT/lib/libBugpointPasses.dylib +# (The wildcards are used to match a "lib" prefix if it is present.) +rm $DEST_DIR$DEST_ROOT/lib/*LLVMHello.dylib +rm $DEST_DIR$DEST_ROOT/lib/*BugpointPasses.dylib # Compress manpages MDIR=$DEST_DIR$DEST_ROOT/share/man/man1 @@ -341,6 +342,9 @@ else fi rm -f lib/libLTO.a lib/libLTO.la +# Omit lto.h from the result. Clang will supply. +find $DEST_DIR$DEST_ROOT -name lto.h -delete + ################################################################################ # Remove debugging information from DEST_DIR. diff --git a/utils/count/CMakeLists.txt b/utils/count/CMakeLists.txt index e124f61d2409f..4e0d371334e47 100644 --- a/utils/count/CMakeLists.txt +++ b/utils/count/CMakeLists.txt @@ -1,3 +1,3 @@ -add_executable(count +add_llvm_utility(count count.c ) diff --git a/utils/llvmbuild b/utils/llvmbuild new file mode 100755 index 0000000000000..fb8500d38efe5 --- /dev/null +++ b/utils/llvmbuild @@ -0,0 +1,740 @@ +#!/usr/bin/python3 +##===- utils/llvmbuild - Build the LLVM project ----------------*-python-*-===## +# +# The LLVM Compiler Infrastructure +# +# This file is distributed under the University of Illinois Open Source +# License. See LICENSE.TXT for details. +# +##===----------------------------------------------------------------------===## +# +# This script builds many different flavors of the LLVM ecosystem. It +# will build LLVM, Clang, llvm-gcc, and dragonegg as well as run tests +# on them. This script is convenient to use to check builds and tests +# before committing changes to the upstream repository +# +# A typical source setup uses three trees and looks like this: +# +# official +# dragonegg +# trunk +# gcc +# trunk +# llvm +# trunk +# tools +# clang +# tags +# RELEASE_28 +# tools +# clang +# llvm-gcc +# trunk +# tags +# RELEASE_28 +# staging +# dragonegg +# trunk +# gcc +# trunk +# llvm +# trunk +# tools +# clang +# tags +# RELEASE_28 +# tools +# clang +# llvm-gcc +# trunk +# tags +# RELEASE_28 +# commit +# dragonegg +# trunk +# gcc +# trunk +# llvm +# trunk +# tools +# clang +# tags +# RELEASE_28 +# tools +# clang +# llvm-gcc +# trunk +# tags +# RELEASE_28 +# +# "gcc" above is the upstream FSF gcc and "gcc/trunk" refers to the +# 4.5 branch as discussed in the dragonegg build guide. +# +# In a typical workflow, the "official" tree always contains unchanged +# sources from the main LLVM project repositories. The "staging" tree +# is where local work is done. A set of changes resides there waiting +# to be moved upstream. The "commit" tree is where changes from +# "staging" make their way upstream. Individual incremental changes +# from "staging" are applied to "commit" and committed upstream after +# a successful build and test run. A successful build is one in which +# testing results in no more failures than seen in the testing of the +# "official" tree. +# +# A build may be invoked as such: +# +# llvmbuild --src=~/llvm/commit --src=~/llvm/staging +# --src=~/llvm/official --branch=trunk --branch=tags/RELEASE_28 +# --build=debug --build=release --build=paranoid +# --prefix=/home/greened/install --builddir=/home/greened/build +# +# This will build the LLVM ecosystem, including LLVM, Clang, llvm-gcc, +# gcc 4.5 and dragonegg, putting build results in ~/build and +# installing tools in ~/install. llvmbuild creates separate build and +# install directories for each source/branch/build flavor. In the +# above example, llvmbuild will build debug, release and paranoid +# (debug+checks) flavors of the trunk and RELEASE_28 branches from +# each source tree (official, staging and commit) for a total of +# eighteen builds. All builds will be run in parallel. +# +# The user may control parallelism via the --jobs and --threads +# switches. --jobs tells llvmbuild the maximum total number of builds +# to activate in parallel. The user may think of it as equivalent to +# the GNU make -j switch. --threads tells llvmbuild how many worker +# threads to use to accomplish those builds. If --threads is less +# than --jobs, --threads workers will be launched and each one will +# pick a source/branch/flavor combination to build. Then llvmbuild +# will invoke GNU make with -j (--jobs / --threads) to use up the +# remaining job capacity. Once a worker is finished with a build, it +# will pick another combination off the list and start building it. +# +##===----------------------------------------------------------------------===## + +import optparse +import os +import sys +import threading +import queue +import logging +import traceback +import subprocess +import re + +# TODO: Use shutil.which when it is available (3.2 or later) +def find_executable(executable, path=None): + """Try to find 'executable' in the directories listed in 'path' (a + string listing directories separated by 'os.pathsep'; defaults to + os.environ['PATH']). Returns the complete filename or None if not + found + """ + if path is None: + path = os.environ['PATH'] + paths = path.split(os.pathsep) + extlist = [''] + if os.name == 'os2': + (base, ext) = os.path.splitext(executable) + # executable files on OS/2 can have an arbitrary extension, but + # .exe is automatically appended if no dot is present in the name + if not ext: + executable = executable + ".exe" + elif sys.platform == 'win32': + pathext = os.environ['PATHEXT'].lower().split(os.pathsep) + (base, ext) = os.path.splitext(executable) + if ext.lower() not in pathext: + extlist = pathext + for ext in extlist: + execname = executable + ext + if os.path.isfile(execname): + return execname + else: + for p in paths: + f = os.path.join(p, execname) + if os.path.isfile(f): + return f + else: + return None + +def is_executable(fpath): + return os.path.exists(fpath) and os.access(fpath, os.X_OK) + +def add_options(parser): + parser.add_option("-v", "--verbose", action="store_true", + default=False, + help=("Output informational messages" + " [default: %default]")) + parser.add_option("--src", action="append", + help=("Top-level source directory [default: %default]")) + parser.add_option("--build", action="append", + help=("Build types to run [default: %default]")) + parser.add_option("--branch", action="append", + help=("Source branch to build [default: %default]")) + parser.add_option("--cc", default=find_executable("cc"), + help=("The C compiler to use [default: %default]")) + parser.add_option("--cxx", default=find_executable("c++"), + help=("The C++ compiler to use [default: %default]")) + parser.add_option("--threads", default=4, type="int", + help=("The number of worker threads to use " + "[default: %default]")) + parser.add_option("--jobs", "-j", default=8, type="int", + help=("The number of simultaneous build jobs " + "[default: %default]")) + parser.add_option("--prefix", + help=("Root install directory [default: %default]")) + parser.add_option("--builddir", + help=("Root build directory [default: %default]")) + parser.add_option("--extra-llvm-config-flags", default="", + help=("Extra flags to pass to llvm configure [default: %default]")) + parser.add_option("--extra-llvm-gcc-config-flags", default="", + help=("Extra flags to pass to llvm-gcc configure [default: %default]")) + parser.add_option("--extra-gcc-config-flags", default="", + help=("Extra flags to pass to gcc configure [default: %default]")) + parser.add_option("--force-configure", default=False, action="store_true", + help=("Force reconfigure of all components")) + return + +def check_options(parser, options, valid_builds): + # See if we're building valid flavors. + for build in options.build: + if (build not in valid_builds): + parser.error("'" + build + "' is not a valid build flavor " + + str(valid_builds)) + + # See if we can find source directories. + for src in options.src: + for component in ["llvm", "llvm-gcc", "gcc", "dragonegg"]: + compsrc = src + "/" + component + if (not os.path.isdir(compsrc)): + parser.error("'" + compsrc + "' does not exist") + if (options.branch is not None): + for branch in options.branch: + if (not os.path.isdir(os.path.join(compsrc, branch))): + parser.error("'" + os.path.join(compsrc, branch) + + "' does not exist") + + # See if we can find the compilers + options.cc = find_executable(options.cc) + options.cxx = find_executable(options.cxx) + + return + +# Find a unique short name for the given set of paths. This searches +# back through path components until it finds unique component names +# among all given paths. +def get_path_abbrevs(paths): + # Find the number of common starting characters in the last component + # of the paths. + unique_paths = list(paths) + + class NotFoundException(Exception): pass + + # Find a unique component of each path. + unique_bases = unique_paths[:] + found = 0 + while len(unique_paths) > 0: + bases = [os.path.basename(src) for src in unique_paths] + components = { c for c in bases } + # Account for single entry in paths. + if len(components) > 1 or len(components) == len(bases): + # We found something unique. + for c in components: + if bases.count(c) == 1: + index = bases.index(c) + unique_bases[index] = c + # Remove the corresponding path from the set under + # consideration. + unique_paths[index] = None + unique_paths = [ p for p in unique_paths if p is not None ] + unique_paths = [os.path.dirname(src) for src in unique_paths] + + if len(unique_paths) > 0: + raise NotFoundException() + + abbrevs = dict(zip(paths, [base for base in unique_bases])) + + return abbrevs + +# Given a set of unique names, find a short character sequence that +# uniquely identifies them. +def get_short_abbrevs(unique_bases): + # Find a unique start character for each path base. + my_unique_bases = unique_bases[:] + unique_char_starts = unique_bases[:] + while len(my_unique_bases) > 0: + for start, char_tuple in enumerate(zip(*[base + for base in my_unique_bases])): + chars = { c for c in char_tuple } + # Account for single path. + if len(chars) > 1 or len(chars) == len(char_tuple): + # We found something unique. + for c in chars: + if char_tuple.count(c) == 1: + index = char_tuple.index(c) + unique_char_starts[index] = start + # Remove the corresponding path from the set under + # consideration. + my_unique_bases[index] = None + my_unique_bases = [ b for b in my_unique_bases + if b is not None ] + break + + if len(my_unique_bases) > 0: + raise NotFoundException() + + abbrevs = [abbrev[start_index:start_index+3] + for abbrev, start_index + in zip([base for base in unique_bases], + [index for index in unique_char_starts])] + + abbrevs = dict(zip(unique_bases, abbrevs)) + + return abbrevs + +class Builder(threading.Thread): + class ExecutableNotFound(Exception): pass + class FileNotExecutable(Exception): pass + + def __init__(self, work_queue, jobs, + build_abbrev, source_abbrev, branch_abbrev, + options): + super().__init__() + self.work_queue = work_queue + self.jobs = jobs + self.cc = options.cc + self.cxx = options.cxx + self.build_abbrev = build_abbrev + self.source_abbrev = source_abbrev + self.branch_abbrev = branch_abbrev + self.build_prefix = options.builddir + self.install_prefix = options.prefix + self.options = options + self.component_abbrev = dict( + llvm="llvm", + llvm_gcc="lgcc", + llvm2="llv2", + gcc="ugcc", + dagonegg="degg") + def run(self): + while True: + try: + source, branch, build = self.work_queue.get() + self.dobuild(source, branch, build) + except: + traceback.print_exc() + finally: + self.work_queue.task_done() + + def execute(self, command, execdir, env, component): + prefix = self.component_abbrev[component.replace("-", "_")] + pwd = os.getcwd() + if not os.path.exists(execdir): + os.makedirs(execdir) + + execenv = os.environ.copy() + + for key, value in env.items(): + execenv[key] = value + + self.logger.debug("[" + prefix + "] " + "env " + str(env) + " " + + " ".join(command)); + + try: + proc = subprocess.Popen(command, + cwd=execdir, + env=execenv, + stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + + line = proc.stdout.readline() + while line: + self.logger.info("[" + prefix + "] " + + str(line, "utf-8").rstrip()) + line = proc.stdout.readline() + + except: + traceback.print_exc() + + # Get a list of C++ include directories to pass to clang. + def get_includes(self): + # Assume we're building with g++ for now. + command = [self.cxx] + command += ["-v", "-x", "c++", "/dev/null", "-fsyntax-only"] + includes = [] + self.logger.debug(command) + try: + proc = subprocess.Popen(command, + stdout=subprocess.PIPE, + stderr=subprocess.STDOUT) + + gather = False + line = proc.stdout.readline() + while line: + self.logger.debug(line) + if re.search("End of search list", str(line)) is not None: + self.logger.debug("Stop Gather") + gather = False + if gather: + includes.append(str(line, "utf-8").strip()) + if re.search("#include <...> search starts", str(line)) is not None: + self.logger.debug("Start Gather") + gather = True + line = proc.stdout.readline() + except: + traceback.print_exc() + self.logger.debug(includes) + return includes + + def dobuild(self, source, branch, build): + build_suffix = "" + + ssabbrev = get_short_abbrevs([ab for ab in self.source_abbrev.values()]) + + if branch is not None: + sbabbrev = get_short_abbrevs([ab for ab in self.branch_abbrev.values()]) + + prefix = "[" + ssabbrev[self.source_abbrev[source]] + "-" + sbabbrev[self.branch_abbrev[branch]] + "-" + self.build_abbrev[build] + "]" + self.install_prefix += "/" + self.source_abbrev[source] + "/" + branch + "/" + build + build_suffix += self.source_abbrev[source] + "/" + branch + "/" + build + else: + prefix = "[" + ssabbrev[self.source_abbrev[source]] + "-" + self.build_abbrev[build] + "]" + self.install_prefix += "/" + self.source_abbrev[source] + "/" + build + build_suffix += "/" + self.source_abbrev[source] + "/" + build + + self.logger = logging.getLogger(prefix) + + self.logger.debug(self.install_prefix) + + # Assume we're building with gcc for now. + cxxincludes = self.get_includes() + cxxroot = cxxincludes[0] + cxxarch = os.path.basename(cxxincludes[1]) + + configure_flags = dict( + llvm=dict(debug=["--prefix=" + self.install_prefix, + "--with-extra-options=-Werror", + "--with-cxx-include-root=" + cxxroot, + "--with-cxx-include-arch=" + cxxarch], + release=["--prefix=" + self.install_prefix, + "--with-extra-options=-Werror", + "--enable-optimized", + "--with-cxx-include-root=" + cxxroot, + "--with-cxx-include-arch=" + cxxarch], + paranoid=["--prefix=" + self.install_prefix, + "--with-extra-options=-Werror", + "--enable-expensive-checks", + "--with-cxx-include-root=" + cxxroot, + "--with-cxx-include-arch=" + cxxarch]), + llvm_gcc=dict(debug=["--prefix=" + self.install_prefix, + "--enable-checking", + "--program-prefix=llvm-", + "--enable-llvm=" + self.build_prefix + "/llvm/" + build_suffix, +# Fortran install seems to be broken. +# "--enable-languages=c,c++,fortran"], + "--enable-languages=c,c++"], + release=["--prefix=" + self.install_prefix, + "--program-prefix=llvm-", + "--enable-llvm=" + self.build_prefix + "/llvm/" + build_suffix, +# Fortran install seems to be broken. +# "--enable-languages=c,c++,fortran"], + "--enable-languages=c,c++"], + paranoid=["--prefix=" + self.install_prefix, + "--enable-checking", + "--program-prefix=llvm-", + "--enable-llvm=" + self.build_prefix + "/llvm/" + build_suffix, +# Fortran install seems to be broken. +# "--enable-languages=c,c++,fortran"]), + "--enable-languages=c,c++"]), + llvm2=dict(debug=["--prefix=" + self.install_prefix, + "--with-extra-options=-Werror", + "--with-llvmgccdir=" + self.install_prefix + "/bin", + "--with-cxx-include-root=" + cxxroot, + "--with-cxx-include-arch=" + cxxarch], + release=["--prefix=" + self.install_prefix, + "--with-extra-options=-Werror", + "--enable-optimized", + "--with-llvmgccdir=" + self.install_prefix + "/bin", + "--with-cxx-include-root=" + cxxroot, + "--with-cxx-include-arch=" + cxxarch], + paranoid=["--prefix=" + self.install_prefix, + "--with-extra-options=-Werror", + "--enable-expensive-checks", + "--with-llvmgccdir=" + self.install_prefix + "/bin", + "--with-cxx-include-root=" + cxxroot, + "--with-cxx-include-arch=" + cxxarch]), + gcc=dict(debug=["--prefix=" + self.install_prefix, + "--enable-checking"], + release=["--prefix=" + self.install_prefix], + paranoid=["--prefix=" + self.install_prefix, + "--enable-checking"]), + dragonegg=dict(debug=[], + release=[], + paranoid=[])) + + configure_env = dict( + llvm=dict(debug=dict(CC=self.cc, + CXX=self.cxx), + release=dict(CC=self.cc, + CXX=self.cxx), + paranoid=dict(CC=self.cc, + CXX=self.cxx)), + llvm_gcc=dict(debug=dict(CC=self.cc, + CXX=self.cxx), + release=dict(CC=self.cc, + CXX=self.cxx), + paranoid=dict(CC=self.cc, + CXX=self.cxx)), + llvm2=dict(debug=dict(CC=self.cc, + CXX=self.cxx), + release=dict(CC=self.cc, + CXX=self.cxx), + paranoid=dict(CC=self.cc, + CXX=self.cxx)), + gcc=dict(debug=dict(CC=self.cc, + CXX=self.cxx), + release=dict(CC=self.cc, + CXX=self.cxx), + paranoid=dict(CC=self.cc, + CXX=self.cxx)), + dragonegg=dict(debug=dict(CC=self.cc, + CXX=self.cxx), + release=dict(CC=self.cc, + CXX=self.cxx), + paranoid=dict(CC=self.cc, + CXX=self.cxx))) + + make_flags = dict( + llvm=dict(debug=["-j" + str(self.jobs)], + release=["-j" + str(self.jobs)], + paranoid=["-j" + str(self.jobs)]), + llvm_gcc=dict(debug=["-j" + str(self.jobs), + "bootstrap"], + release=["-j" + str(self.jobs), + "bootstrap"], + paranoid=["-j" + str(self.jobs), + "bootstrap"]), + llvm2=dict(debug=["-j" + str(self.jobs)], + release=["-j" + str(self.jobs)], + paranoid=["-j" + str(self.jobs)]), + gcc=dict(debug=["-j" + str(self.jobs), + "bootstrap"], + release=["-j" + str(self.jobs), + "bootstrap"], + paranoid=["-j" + str(self.jobs), + "bootstrap"]), + dragonegg=dict(debug=["-j" + str(self.jobs)], + release=["-j" + str(self.jobs)], + paranoid=["-j" + str(self.jobs)])) + + make_env = dict( + llvm=dict(debug=dict(), + release=dict(), + paranoid=dict()), + llvm_gcc=dict(debug=dict(), + release=dict(), + paranoid=dict()), + llvm2=dict(debug=dict(), + release=dict(), + paranoid=dict()), + gcc=dict(debug=dict(), + release=dict(), + paranoid=dict()), + dragonegg=dict(debug=dict(GCC=self.install_prefix + "/bin/gcc", + LLVM_CONFIG=self.install_prefix + "/bin/llvm-config"), + release=dict(GCC=self.install_prefix + "/bin/gcc", + LLVM_CONFIG=self.install_prefix + "/bin/llvm-config"), + paranoid=dict(GCC=self.install_prefix + "/bin/gcc", + LLVM_CONFIG=self.install_prefix + "/bin/llvm-config"))) + + make_install_flags = dict( + llvm=dict(debug=["install"], + release=["install"], + paranoid=["install"]), + llvm_gcc=dict(debug=["install"], + release=["install"], + paranoid=["install"]), + llvm2=dict(debug=["install"], + release=["install"], + paranoid=["install"]), + gcc=dict(debug=["install"], + release=["install"], + paranoid=["install"]), + dragonegg=dict(debug=["install"], + release=["install"], + paranoid=["install"])) + + make_install_env = dict( + llvm=dict(debug=dict(), + release=dict(), + paranoid=dict()), + llvm_gcc=dict(debug=dict(), + release=dict(), + paranoid=dict()), + llvm2=dict(debug=dict(), + release=dict(), + paranoid=dict()), + gcc=dict(debug=dict(), + release=dict(), + paranoid=dict()), + dragonegg=dict(debug=dict(), + release=dict(), + paranoid=dict())) + + make_check_flags = dict( + llvm=dict(debug=["check"], + release=["check"], + paranoid=["check"]), + llvm_gcc=dict(debug=["check"], + release=["check"], + paranoid=["check"]), + llvm2=dict(debug=["check"], + release=["check"], + paranoid=["check"]), + gcc=dict(debug=["check"], + release=["check"], + paranoid=["check"]), + dragonegg=dict(debug=["check"], + release=["check"], + paranoid=["check"])) + + make_check_env = dict( + llvm=dict(debug=dict(), + release=dict(), + paranoid=dict()), + llvm_gcc=dict(debug=dict(), + release=dict(), + paranoid=dict()), + llvm2=dict(debug=dict(), + release=dict(), + paranoid=dict()), + gcc=dict(debug=dict(), + release=dict(), + paranoid=dict()), + dragonegg=dict(debug=dict(), + release=dict(), + paranoid=dict())) + + for component in ["llvm", "llvm-gcc", "llvm2", "gcc", "dragonegg"]: + comp = component[:] + + srcdir = source + "/" + comp.rstrip("2") + builddir = self.build_prefix + "/" + comp + "/" + build_suffix + installdir = self.install_prefix + + if (branch is not None): + srcdir += "/" + branch + + comp_key = comp.replace("-", "_") + + config_args = configure_flags[comp_key][build][:] + config_args.extend(getattr(self.options, + "extra_" + comp_key + + "_config_flags").split()) + + self.logger.info("Configuring " + component + " in " + builddir) + self.configure(component, srcdir, builddir, + config_args, + configure_env[comp_key][build]) + + self.logger.info("Building " + component + " in " + builddir) + self.make(component, srcdir, builddir, + make_flags[comp_key][build], + make_env[comp_key][build]) + + self.logger.info("Installing " + component + " in " + installdir) + self.make(component, srcdir, builddir, + make_install_flags[comp_key][build], + make_install_env[comp_key][build]) + + self.logger.info("Testing " + component + " in " + builddir) + self.make(component, srcdir, builddir, + make_check_flags[comp_key][build], + make_check_env[comp_key][build]) + + + def configure(self, component, srcdir, builddir, flags, env): + self.logger.debug("Configure " + str(flags)) + + configure_files = dict( + llvm=[(srcdir + "/configure", builddir + "/Makefile")], + llvm_gcc=[(srcdir + "/configure", builddir + "/Makefile"), + (srcdir + "/gcc/configure", builddir + "/gcc/Makefile")], + llvm2=[(srcdir + "/configure", builddir + "/Makefile")], + gcc=[(srcdir + "/configure", builddir + "/Makefile"), + (srcdir + "/gcc/configure", builddir + "/gcc/Makefile")], + dragonegg=[()]) + + + doconfig = False + for conf, mf in configure_files[component.replace("-", "_")]: + if not os.path.exists(conf): + return + if os.path.exists(conf) and os.path.exists(mf): + confstat = os.stat(conf) + makestat = os.stat(mf) + if confstat.st_mtime > makestat.st_mtime: + doconfig = True + break + else: + doconfig = True + break + + if not doconfig and not self.options.force_configure: + return + + program = srcdir + "/configure" + if not is_executable(program): + return + + args = [program] + args += ["--verbose"] + args += flags + self.execute(args, builddir, env, component) + + def make(self, component, srcdir, builddir, flags, env): + program = find_executable("make") + if program is None: + raise ExecutableNotFound + + if not is_executable(program): + raise FileNotExecutable + + args = [program] + args += flags + self.execute(args, builddir, env, component) + +# Global constants +build_abbrev = dict(debug="dbg", release="opt", paranoid="par") + +# Parse options +parser = optparse.OptionParser(version="%prog 1.0") +add_options(parser) +(options, args) = parser.parse_args() +check_options(parser, options, build_abbrev.keys()); + +if options.verbose: + logging.basicConfig(level=logging.DEBUG, + format='%(name)-13s: %(message)s') +else: + logging.basicConfig(level=logging.INFO, + format='%(name)-13s: %(message)s') + +source_abbrev = get_path_abbrevs(set(options.src)) +branch_abbrev = get_path_abbrevs(set(options.branch)) + +work_queue = queue.Queue() + +for t in range(options.threads): + jobs = options.jobs // options.threads + builder = Builder(work_queue, jobs, + build_abbrev, source_abbrev, branch_abbrev, + options) + builder.daemon = True + builder.start() + +for build in set(options.build): + for source in set(options.src): + if options.branch is not None: + for branch in set(options.branch): + work_queue.put((source, branch, build)) + else: + work_queue.put((source, None, build)) + +work_queue.join() diff --git a/utils/not/CMakeLists.txt b/utils/not/CMakeLists.txt index 155d2e3ae7e4f..f4c02290d7d1d 100644 --- a/utils/not/CMakeLists.txt +++ b/utils/not/CMakeLists.txt @@ -1,4 +1,4 @@ -add_executable(not +add_llvm_utility(not not.cpp ) diff --git a/utils/valgrind/i386-pc-linux-gnu.supp b/utils/valgrind/i386-pc-linux-gnu.supp index c9f68a0ab66c3..0509791582bed 100644 --- a/utils/valgrind/i386-pc-linux-gnu.supp +++ b/utils/valgrind/i386-pc-linux-gnu.supp @@ -12,19 +12,19 @@ { ADDRESS_IN_RANGE/Invalid read of size 4 Memcheck:Addr4 - obj:/usr/bin/python2.5 + obj:/usr/bin/python* } { ADDRESS_IN_RANGE/Invalid read of size 4 Memcheck:Value4 - obj:/usr/bin/python2.5 + obj:/usr/bin/python* } { ADDRESS_IN_RANGE/Conditional jump or move depends on uninitialised value Memcheck:Cond - obj:/usr/bin/python2.5 + obj:/usr/bin/python* } { @@ -37,5 +37,5 @@ We don't care if python leaks Memcheck:Leak fun:malloc - obj:/usr/bin/python2.5 + obj:/usr/bin/python* } -- cgit v1.2.3