From 706b4fc47bbc608932d3b491ae19a3b9cde9497b Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Fri, 17 Jan 2020 20:45:01 +0000 Subject: Vendor import of llvm-project master e26a78e70, the last commit before the llvmorg-11-init tag, from which release/10.x was branched. --- llvm/lib/CodeGen/MachineBasicBlock.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp') diff --git a/llvm/lib/CodeGen/MachineBasicBlock.cpp b/llvm/lib/CodeGen/MachineBasicBlock.cpp index 854bef3aab050..f433c4b6c90b5 100644 --- a/llvm/lib/CodeGen/MachineBasicBlock.cpp +++ b/llvm/lib/CodeGen/MachineBasicBlock.cpp @@ -1395,8 +1395,7 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI, --N; - MachineOperandIteratorBase::PhysRegInfo Info = - ConstMIOperands(*I).analyzePhysReg(Reg, TRI); + PhysRegInfo Info = AnalyzePhysRegInBundle(*I, Reg, TRI); // Register is live when we read it here. if (Info.Read) @@ -1434,8 +1433,7 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI, --N; - MachineOperandIteratorBase::PhysRegInfo Info = - ConstMIOperands(*I).analyzePhysReg(Reg, TRI); + PhysRegInfo Info = AnalyzePhysRegInBundle(*I, Reg, TRI); // Defs happen after uses so they take precedence if both are present. @@ -1462,6 +1460,11 @@ MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI, } while (I != begin() && N > 0); } + // If all the instructions before this in the block are debug instructions, + // skip over them. + while (I != begin() && std::prev(I)->isDebugInstr()) + --I; + // Did we get to the start of the block? if (I == begin()) { // If so, the register's state is definitely defined by the live-in state. -- cgit v1.2.3