From cfca06d7963fa0909f90483b42a6d7d194d01e08 Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 26 Jul 2020 19:36:28 +0000 Subject: Vendor import of llvm-project master 2e10b7a39b9, the last commit before the llvmorg-12-init tag, from which release/11.x was branched. --- llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp') diff --git a/llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp index c469cf290e264..884b2e17289c5 100644 --- a/llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp +++ b/llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp @@ -5,6 +5,13 @@ // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// +/// +/// \file +/// This file defines and imlements the class GCNMinRegScheduler, which +/// implements an experimental, simple scheduler whose main goal is to learn +/// ways about consuming less possible registers for a region. +/// +//===----------------------------------------------------------------------===// #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/SmallPtrSet.h" @@ -207,9 +214,8 @@ void GCNMinRegScheduler::bumpPredsPriority(const SUnit *SchedSU, int Priority) { LLVM_DEBUG(dbgs() << "Make the predecessors of SU(" << SchedSU->NodeNum << ")'s non-ready successors of " << Priority << " priority in ready queue: "); - const auto SetEnd = Set.end(); for (auto &C : RQ) { - if (Set.find(C.SU) != SetEnd) { + if (Set.count(C.SU)) { C.Priority = Priority; LLVM_DEBUG(dbgs() << " SU(" << C.SU->NodeNum << ')'); } -- cgit v1.2.3