From 144e07f0e7719b43c21625c8f1174318e62cede9 Mon Sep 17 00:00:00 2001 From: Pyun YongHyeon Date: Tue, 6 Nov 2007 01:01:38 +0000 Subject: Apparently some NVIDIA NICs store ethernet address in reverse order while other variants have inorder ethernet address for the same chipset. Override ethernet address ordering if we already know how it was stored. This fixes the use of inversed ethernet address on MCP67. Submitted by: ariff MFC after: 3 days --- sys/dev/nfe/if_nfe.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'sys/dev') diff --git a/sys/dev/nfe/if_nfe.c b/sys/dev/nfe/if_nfe.c index edac0faa9b9a4..36631337b0f17 100644 --- a/sys/dev/nfe/if_nfe.c +++ b/sys/dev/nfe/if_nfe.c @@ -462,14 +462,14 @@ nfe_attach(device_t dev) case PCI_PRODUCT_NVIDIA_MCP67_LAN3: case PCI_PRODUCT_NVIDIA_MCP67_LAN4: sc->nfe_flags |= NFE_40BIT_ADDR | NFE_PWR_MGMT | - NFE_TX_FLOW_CTRL; + NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL; break; case PCI_PRODUCT_NVIDIA_MCP65_LAN1: case PCI_PRODUCT_NVIDIA_MCP65_LAN2: case PCI_PRODUCT_NVIDIA_MCP65_LAN3: case PCI_PRODUCT_NVIDIA_MCP65_LAN4: sc->nfe_flags |= NFE_JUMBO_SUP | NFE_40BIT_ADDR | - NFE_PWR_MGMT | NFE_TX_FLOW_CTRL; + NFE_PWR_MGMT | NFE_CORRECT_MACADDR | NFE_TX_FLOW_CTRL; break; } -- cgit v1.3