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<title>src-test2/sys/amd64/include, branch master</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src-test2/atom?h=master</id>
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<updated>2020-12-18T16:16:03Z</updated>
<entry>
<title>amd64: use register macros for gdb_cpu_getreg()</title>
<updated>2020-12-18T16:16:03Z</updated>
<author>
<name>Mitchell Horne</name>
<email>mhorne@FreeBSD.org</email>
</author>
<published>2020-12-18T16:16:03Z</published>
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<id>urn:sha1:72939459bdfa930348d0b3397db5d947593ad348</id>
<content type='text'>
Prefer these newly-added definitions to bare values.

MFC after:	2 weeks
Sponsored by:	NetApp, Inc.
Sponsored by:	Klara, Inc.
</content>
</entry>
<entry>
<title>amd64: allow gdb(4) to write to most registers</title>
<updated>2020-12-18T16:09:24Z</updated>
<author>
<name>Mitchell Horne</name>
<email>mhorne@FreeBSD.org</email>
</author>
<published>2020-12-18T16:09:24Z</published>
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<id>urn:sha1:0ef474de88fdb78e3cb7ac9bc0b1b98e5b49b4e4</id>
<content type='text'>
Similar to the recent patch to arm's gdb stub in r368414, allow GDB to
update the contents of most general purpose registers.

Reviewed by:	cem, jhb, markj
MFC after:	2 weeks
Sponsored by:	NetApp, Inc.
Sponsored by:	Klara, Inc.
NetApp PR:	44
Differential Revision:	https://reviews.freebsd.org/D27642
</content>
</entry>
<entry>
<title>Convert vmm_ops calls to IFUNC</title>
<updated>2020-11-28T01:16:59Z</updated>
<author>
<name>Peter Grehan</name>
<email>grehan@FreeBSD.org</email>
</author>
<published>2020-11-28T01:16:59Z</published>
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<id>urn:sha1:15add60d3743ceb019dd1b5fe3ece68608f65949</id>
<content type='text'>
There is no need for these to be function pointers since they are
never modified post-module load.

Rename AMD/Intel ops to be more consistent.

Submitted by:	adam_fenn.io
Reviewed by:	markj, grehan
Approved by:	grehan (bhyve)
MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D27375
</content>
</entry>
<entry>
<title>Unobfuscate "KERNLOAD" parameter on amd64. This change lines-up amd64 with the</title>
<updated>2020-11-25T23:19:01Z</updated>
<author>
<name>Maxim Sobolev</name>
<email>sobomax@FreeBSD.org</email>
</author>
<published>2020-11-25T23:19:01Z</published>
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<id>urn:sha1:fd2ef8ef5a054d9f26b6b36ea56a5414c7683e39</id>
<content type='text'>
i386 and the rest of supported architectures by defining KERNLOAD in the
vmparam.h and getting rid of magic constant in the linker script, which albeit
documented via comment but isn't programmatically accessible at a compile time.

Use KERNLOAD to eliminate another (matching) magic constant 100 lines down
inside unremarkable TU "copy.c" 3 levels deep in the EFI loader tree.

Reviewed by:	markj
Approved by:	markj
MFC after:	1 month
Differential Revision:	https://reviews.freebsd.org/D27355
</content>
</entry>
<entry>
<title>Honor the disabled setting for MSI-X interrupts for passthrough devices.</title>
<updated>2020-11-24T23:18:52Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2020-11-24T23:18:52Z</published>
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<id>urn:sha1:1925586e03bed086b78fda5d8d758912aea7ecc7</id>
<content type='text'>
Add a new ioctl to disable all MSI-X interrupts for a PCI passthrough
device and invoke it if a write to the MSI-X capability registers
disables MSI-X.  This avoids leaving MSI-X interrupts enabled on the
host if a guest device driver has disabled them (e.g. as part of
detaching a guest device driver).

This was found by Chelsio QA when testing that a Linux guest could
switch from MSI-X to MSI interrupts when using the cxgb4vf driver.

While here, explicitly fail requests to enable MSI on a passthrough
device if MSI-X is enabled and vice versa.

Reported by:	Sony Arpita Das @ Chelsio
Reviewed by:	grehan, markj
MFC after:	2 weeks
Sponsored by:	Chelsio Communications
Differential Revision:	https://reviews.freebsd.org/D27212
</content>
</entry>
<entry>
<title>vmm: Make pmap_invalidate_ept() wait synchronously for guest exits</title>
<updated>2020-11-11T15:01:17Z</updated>
<author>
<name>Mark Johnston</name>
<email>markj@FreeBSD.org</email>
</author>
<published>2020-11-11T15:01:17Z</published>
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<id>urn:sha1:6f5a960678dd5330f71100ae379410199e97c665</id>
<content type='text'>
Currently EPT TLB invalidation is done by incrementing a generation
counter and issuing an IPI to all CPUs currently running vCPU threads.
The VMM inner loop caches the most recently observed generation on each
host CPU and invalidates TLB entries before executing the VM if the
cached generation number is not the most recent value.
pmap_invalidate_ept() issues IPIs to force each vCPU to stop executing
guest instructions and reload the generation number.  However, it does
not actually wait for vCPUs to exit, potentially creating a window where
guests may continue to reference stale TLB entries.

Fix the problem by bracketing guest execution with an SMR read section
which is entered before loading the invalidation generation.  Then,
pmap_invalidate_ept() increments the current write sequence before
loading pm_active and sending IPIs, and polls readers to ensure that all
vCPUs potentially operating with stale TLB entries have exited before
pmap_invalidate_ept() returns.

Also ensure that unsynchronized loads of the generation counter are
wrapped with atomic(9), and stop (inconsistently) updating the
invalidation counter and pm_active bitmask with acquire semantics.

Reviewed by:	grehan, kib
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26910
</content>
</entry>
<entry>
<title>amd64: Make it easier to configure exception stack sizes</title>
<updated>2020-11-04T16:42:20Z</updated>
<author>
<name>Mark Johnston</name>
<email>markj@FreeBSD.org</email>
</author>
<published>2020-11-04T16:42:20Z</published>
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<id>urn:sha1:cff169880e88bbb6ee1b39713bdd7acba2aca201</id>
<content type='text'>
The amd64 kernel handles certain types of exceptions on a dedicated
stack.  Currently the sizes of these stacks are all hard-coded to
PAGE_SIZE, but for at least NMI handling it can be useful to use larger
stacks.  Add constants to intr_machdep.h to make this easier to tweak.

No functional change intended.

Reviewed by:	kib
MFC after:	1 week
Sponsored by:	NetApp, Inc.
Sponsored by:	Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D27076
</content>
</entry>
<entry>
<title>amd64 pmap.h: explicitly provide constants values instead of relying</title>
<updated>2020-10-16T16:22:32Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2020-10-16T16:22:32Z</published>
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<id>urn:sha1:546df7a45d0ccc1e532ab1768efad1b8dc64a0ea</id>
<content type='text'>
on some more advanced C features.

This fixes gcc-toolchain build of exception.S.

Reported and tested by:	kevans
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
</content>
</entry>
<entry>
<title>Fix for mis-interpretation of PCB_KERNFPU.</title>
<updated>2020-10-14T23:01:41Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2020-10-14T23:01:41Z</published>
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<id>urn:sha1:e406235000fea46ac447fca91e15b061e8e8ca9d</id>
<content type='text'>
RIght now PCB_KERNFPU is used both as indication that kernel prepared
hardware FPU context to use and that the thread is fpu-kern
thread.  This also breaks fpu_kern_enter(FPU_KERN_NOCTX), since
fpu_kern_leave() then clears PCB_KERNFPU.

Introduce new flag PCB_KERNFPU_THR which indicates that the thread is
fpu-kern.  Do not clear PCB_KERNFPU if fpu-kern thread leaves noctx
fpu region.

Reported and tested by:	jhb (amd64)
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D25511
</content>
</entry>
<entry>
<title>amd64: Store full 64bit of FIP/FDP for 64bit processes when using XSAVE.</title>
<updated>2020-10-03T23:17:29Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2020-10-03T23:17:29Z</published>
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<id>urn:sha1:df01340989f4fc2b1d6cded4729a6c1b4d9ff40b</id>
<content type='text'>
If current process is 64bit, use rex-prefixed version of XSAVE
(XSAVE64).  If current process is 32bit and CPU supports saving
segment registers cs/ds in the FPU save area, use non-prefixed variant
of XSAVE.

Reported and tested by:	Michał Górny &lt;mgorny@mgorny@moritz.systems&gt;
PR:	250043
Reviewed by:	emaste, markj
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D26643
</content>
</entry>
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