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<title>src-test2/sys/amd64, branch releng/11.2</title>
<subtitle>FreeBSD source tree</subtitle>
<id>https://cgit-dev.freebsd.org/src-test2/atom?h=releng%2F11.2</id>
<link rel='self' href='https://cgit-dev.freebsd.org/src-test2/atom?h=releng%2F11.2'/>
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<updated>2019-05-14T23:20:16Z</updated>
<entry>
<title>Mitigations for Microarchitectural Data Sampling.</title>
<updated>2019-05-14T23:20:16Z</updated>
<author>
<name>Gordon Tetlow</name>
<email>gordon@FreeBSD.org</email>
</author>
<published>2019-05-14T23:20:16Z</published>
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<id>urn:sha1:2b339970bb820e532194281f0c493f2d8048dbec</id>
<content type='text'>
Approved by:	so
Security:	FreeBSD-SA-19:07.mds
Security:	CVE-2018-12126
Security:	CVE-2018-12127
Security:	CVE-2018-12130
Security:	CVE-2019-11091
</content>
</entry>
<entry>
<title>amd64: clear callee-preserved registers on syscall exit</title>
<updated>2019-02-05T18:07:45Z</updated>
<author>
<name>Ed Maste</name>
<email>emaste@FreeBSD.org</email>
</author>
<published>2019-02-05T18:07:45Z</published>
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<id>urn:sha1:00508f1dd5a294ec868a14595da0a3428e6b3ef3</id>
<content type='text'>
Submitted by:	kib
Approved by:	so
Security:	CVE-2019-5595
Security:	FreeBSD-SA-19:01.syscall
</content>
</entry>
<entry>
<title>Fix regression in Lazy FPU remediation. [EN-18:08.lazyfpu]</title>
<updated>2018-09-12T05:08:49Z</updated>
<author>
<name>Gordon Tetlow</name>
<email>gordon@FreeBSD.org</email>
</author>
<published>2018-09-12T05:08:49Z</published>
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<id>urn:sha1:27d6d228a408268b9c40a4e6a7498923addf3b06</id>
<content type='text'>
Approved by:	so
Security:	FreeBSD-EN-18:08.lazyfpu
</content>
</entry>
<entry>
<title>Revis manual pages. [SA-18:08.tcp]</title>
<updated>2018-08-15T02:30:11Z</updated>
<author>
<name>Xin LI</name>
<email>delphij@FreeBSD.org</email>
</author>
<published>2018-08-15T02:30:11Z</published>
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<id>urn:sha1:03d43f6591d36e578d46f31b9ae67bd4b4aa386c</id>
<content type='text'>
Fix L1 Terminal Fault (L1TF) kernel information disclosure.
[SA-18:09.l1tf]

Fix resource exhaustion in IP fragment reassembly. [SA-18:10.ip]

Fix unauthenticated EAPOL-Key decryption vulnerability.
[SA-18:11.hostapd]

Approved by:	so
</content>
</entry>
<entry>
<title>MFC rr335072, r335089:</title>
<updated>2018-06-15T13:21:37Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2018-06-15T13:21:37Z</published>
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<id>urn:sha1:6295c65827550f3ae6e3e17d37aacd71d22afd3e</id>
<content type='text'>
Enable eager FPU context switch on i386 and amd64.
CVE:	CVE-2018-3665

MFC r335131
Remove printf() in #NM handler.

MFC r335132:
Reorganize code flow in fpudna()/npxdna().

Approved by:	re (gjb)
</content>
</entry>
<entry>
<title>MFC 333606: Make the common interrupt entry point labels local labels.</title>
<updated>2018-05-29T13:54:34Z</updated>
<author>
<name>John Baldwin</name>
<email>jhb@FreeBSD.org</email>
</author>
<published>2018-05-29T13:54:34Z</published>
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<id>urn:sha1:a2779864973307b3068dea45dc57ec179157f2f6</id>
<content type='text'>
Kernel debuggers depend on symbol names to find stack frames with a
trapframe rather than a normal stack frame.  The labels used for the
shared interrupt entry point for the PTI and non-PTI cases did not
match the existing patterns confusing debuggers.  Add the '.L' prefix
to mark these symbols as local so they are not visible in the symbol
table.

Approved by:	re (kib)
</content>
</entry>
<entry>
<title>MFC r334038:</title>
<updated>2018-05-29T13:24:42Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2018-05-29T13:24:42Z</published>
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<id>urn:sha1:cd72d1f6e3471b4bc420b3aaae494312e71af429</id>
<content type='text'>
Enable IBRS when entering an interrupt handler from usermode.

Approved by:	re (marius)
</content>
</entry>
<entry>
<title>MFC r333990, r333992:</title>
<updated>2018-05-28T10:55:09Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2018-05-28T10:55:09Z</published>
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<id>urn:sha1:e9a1495607f2e34c5e45ddb133c04a6543aee096</id>
<content type='text'>
Add missed barrier for pm_gen/pm_active interaction.

Approved by:	re (marius)
</content>
</entry>
<entry>
<title>MFC r334004:</title>
<updated>2018-05-24T13:17:24Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2018-05-24T13:17:24Z</published>
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<id>urn:sha1:84881e1818a0b0652f41ba66050d261ce2850ec5</id>
<content type='text'>
Add Intel Spec Store Bypass Disable control.

This also includes the i386/include/pcpu.h part of the r334018.

Security:	CVE-2018-3639
Approved by:	re (gjb)
</content>
</entry>
<entry>
<title>MFC r334003:</title>
<updated>2018-05-24T11:59:33Z</updated>
<author>
<name>Konstantin Belousov</name>
<email>kib@FreeBSD.org</email>
</author>
<published>2018-05-24T11:59:33Z</published>
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<id>urn:sha1:ed2ec06701cb1e6354ad9048d7ba33e2a012471e</id>
<content type='text'>
Preserve other bits in IA32_SPEC_CTL MSR when changing the IBRS and
STIBP states.

Approved by:	re (gjb)
</content>
</entry>
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